Running PetaLinux from sd card on ARM cortex A9 based Zynq zc702 board. Zynq is an SoC with ARM and FPGA. Before the log messages (corresponding to U-Boot) starts printing, the screen (serial console) is blank, but power is already given.So there is considerable time delay (actually around 10 seconds) between the point I give power and the u-boot log messages come on the screen.What is happening during this time?How to minimize this time?How to print log messages of this duration?My U-Boot is in BOOT.BIN file, which has three components:First Stage Boot loader (FSBL)download.bit (FPGA configuration file) U-Boot   I have noticed that if I skip download.bit file, the resulting BOOT.BIN file is 500k. But If I keepdownload.bitfile the resultingBOOT.BIN` file is 4.2 MB. Is this  (i.e download.bit) the reason of delay?      Log messagesPower was give at approximately 14:32 and you can see u-boot is starting after 10 seconds. [Tue Apr 08 14:42:30.650 2014] [Tue Apr 08 14:42:30.650 2014] [Tue Apr 08 14:42:30.650 2014] U-Boot 2013.07 (Apr 07 2014 - 13:23:59)[Tue Apr 08 14:42:30.650 2014] [Tue Apr 08 14:42:30.650 2014] Memory: ECC disabled[Tue Apr 08 14:42:30.650 2014] DRAM:  1 GiB[Tue Apr 08 14:42:30.662 2014] SF: Detected N25Q128A with page size 64 KiB, total 16 MiB[Tue Apr 08 14:42:30.683 2014] In:    serial[Tue Apr 08 14:42:30.683 2014] Out:   serial[Tue Apr 08 14:42:30.683 2014] Err:   serial
Why u-boot starts so late after I give power
u boot;fpga