From Section 5.1.4 Direct Memory Access in Modern Operating Systems by Andrew S. Tanenbaum, Herbert Bos, 2014, To simplify the explanation, we assume that the CPU accesses all devices and memory via a single system bus that connects the CPU, the memory, and the I/O devices, as shown in Fig. 5-4.To  explain how DMA works, let us first look at how disk reads occur  when DMA is not used. First the disk controller reads the block (one or more sectors) from the drive serially, bit by bit, until the entire block is in  the  controllers internal buffer. Next, it computes the checksum to verify that no read errors have occurred. Then the controller causes an interrupt. When the  operating  system starts running, it can read the disk block from the  controllers buffer a byte or a word at a time by executing a loop,  with each iteration reading one byte or word from a controller  device register and storing it in main memory.Q: in the second step, isn't the data transferred from the controller's buffer to the main memory? Why does it say both from the controllersbuffer and from a controller device register?in the second step, can the controller transfer data from its buffer to the main memory, without interrupting to the cpu, andwithout involving OS again?When  DMA  is  used,  the  procedure  is  different.  First  the  CPU  programs  the DMA controller by setting its registers so it knows what to transfer where (step 1 in Fig. 5-4).It also issues a command to the disk controller telling it to read  data from the disk into its internal buffer and verify the checksum. When valid data are in the disk controllers buffer, DMA can begin. The DMA controller initiates the transfer by issuing a read  request over the bus to the disk controller (step 2). This read  request  looks like any other read request, and the disk controller does not  know (or care) whether it came from the CPU or from a DMA controller.  Typically, the memory address to write to is on the bus address  lines, so when the disk controller fetches the next word from its  internal buffer, it knows where to write it. The write to memory is  another standard bus cycle (step 3). When the write is complete, the disk controller sends an acknowledgement signal to the DMA controller, also over the bus  (step  4). The DMA controller then increments the memory address to use and  decrements the byte count. If  the  byte  count  is  still  greater   than  0,  steps  2  through  4  are  repeated  until  the count   reaches  0. At  that  time,  the  DMA  controller  interrupts  the  CPU  to  let  it know that the transfer is now complete. When the operating  system  starts up, it does not have to copy the disk block to memory; it is  already there.Q: in the second step, the DMA controller requests the diskcontroller to transfer data from the disk controller's buffer to themain memory. In the first step, the CPU issues a command to the disk controller telling it to read data from the disk into its internal buffer. At the same time, can the CPU also tell the disk controller to transfer datafrom the disk controller's buffer to the main memory, when the disk controller finishes transfer data from the disk to the disk controller's buffer, so that there is no need for the DMA controller to tell the disk controller to transfer data from the disk controller's buffer to the main memory? (I can't understand why we need a DMA controller for data transfer between the disk and the main memory, so guess that I miss something important to understand the quote).A device controller of a device controls the device and performsoperations on the device. What device does a DMA controller controland perform operations on?Thanks!
How does a DMA controller work?
operating systems;io