val va_wp_Aes_counter_loop
      (alg: algorithm)
      (plain_b out_b: buffer128)
      (key: (seq nat32))
      (round_keys: (seq quad32))
      (keys_b: buffer128)
      (va_s0: va_state)
      (va_k: (va_state -> unit -> Type0))
    : Type0
val va_wp_Aes_counter_loop
      (alg: algorithm)
      (plain_b out_b: buffer128)
      (key: (seq nat32))
      (round_keys: (seq quad32))
      (keys_b: buffer128)
      (va_s0: va_state)
      (va_k: (va_state -> unit -> Type0))
    : Type0
let va_wp_Aes_counter_loop (alg:algorithm) (plain_b:buffer128) (out_b:buffer128) (key:(seq nat32))
  (round_keys:(seq quad32)) (keys_b:buffer128) (va_s0:va_state) (va_k:(va_state -> unit -> Type0))
  : Type0 =
  (va_get_ok va_s0 /\ (sse_enabled /\ (0 < va_get_reg64 rRdx va_s0 /\ 4 `op_Multiply` va_get_reg64
    rRdx va_s0 < pow2_32 - 4) /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 1 va_s0)
    (va_get_reg64 rR9 va_s0) plain_b (va_get_reg64 rRdx va_s0 `op_Multiply` 4) (va_get_mem_layout
    va_s0) Secret /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 1 va_s0) (va_get_reg64
    rR10 va_s0) out_b (va_get_reg64 rRdx va_s0 `op_Multiply` 4) (va_get_mem_layout va_s0) Secret /\
    va_get_reg64 rR9 va_s0 + va_get_reg64 rRdx va_s0 `op_Multiply` 64 < pow2_64 /\ va_get_reg64
    rR10 va_s0 + va_get_reg64 rRdx va_s0 `op_Multiply` 64 < pow2_64 /\ Vale.X64.Decls.buffer_length
    #Vale.X64.Memory.vuint128 plain_b <= Vale.X64.Decls.buffer_length #Vale.X64.Memory.vuint128
    out_b /\ Vale.X64.Decls.buffers_disjoint128 plain_b out_b /\ aes_reqs alg key round_keys keys_b
    (va_get_reg64 rR8 va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\
    pclmulqdq_enabled /\ va_get_xmm 8 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32
    202182159 134810123 67438087 66051) /\ (forall (va_x_mem:vale_heap) (va_x_xmm0:quad32)
    (va_x_xmm15:quad32) (va_x_xmm7:quad32) (va_x_xmm9:quad32) (va_x_xmm10:quad32)
    (va_x_xmm6:quad32) (va_x_xmm3:quad32) (va_x_xmm4:quad32) (va_x_xmm5:quad32) (va_x_xmm2:quad32)
    (va_x_xmm12:quad32) (va_x_xmm13:quad32) (va_x_xmm14:quad32) (va_x_rax:nat64) (va_x_r9:nat64)
    (va_x_rdx:nat64) (va_x_r10:nat64) (va_x_rdi:nat64) (va_x_r12:nat64) (va_x_xmm1:quad32)
    (va_x_efl:Vale.X64.Flags.t) (va_x_heap1:vale_heap) . let va_sM = va_upd_mem_heaplet 1
    va_x_heap1 (va_upd_flags va_x_efl (va_upd_xmm 1 va_x_xmm1 (va_upd_reg64 rR12 va_x_r12
    (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rRdx va_x_rdx
    (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rRax va_x_rax (va_upd_xmm 14 va_x_xmm14 (va_upd_xmm 13
    va_x_xmm13 (va_upd_xmm 12 va_x_xmm12 (va_upd_xmm 2 va_x_xmm2 (va_upd_xmm 5 va_x_xmm5
    (va_upd_xmm 4 va_x_xmm4 (va_upd_xmm 3 va_x_xmm3 (va_upd_xmm 6 va_x_xmm6 (va_upd_xmm 10
    va_x_xmm10 (va_upd_xmm 9 va_x_xmm9 (va_upd_xmm 7 va_x_xmm7 (va_upd_xmm 15 va_x_xmm15
    (va_upd_xmm 0 va_x_xmm0 (va_upd_mem va_x_mem va_s0)))))))))))))))))))))) in va_get_ok va_sM /\
    (Vale.X64.Decls.modifies_buffer128 out_b (va_get_mem_heaplet 1 va_s0) (va_get_mem_heaplet 1
    va_sM) /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 1 va_sM) (va_get_reg64 rR10
    va_s0) out_b (va_get_reg64 rRdx va_s0 `op_Multiply` 4) (va_get_mem_layout va_sM) Secret /\
    va_get_reg64 rR9 va_sM == va_get_reg64 rR9 va_s0 + 64 `op_Multiply` va_get_reg64 rRdx va_s0 /\
    va_get_reg64 rR10 va_sM == va_get_reg64 rR10 va_s0 + 64 `op_Multiply` va_get_reg64 rRdx va_s0
    /\ va_get_xmm 8 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123
    67438087 66051 /\ Vale.AES.GCTR.gctr_partial_def alg (4 `op_Multiply` va_get_reg64 rRdx va_s0)
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_s0) plain_b)
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_sM) out_b) key (va_get_xmm 7 va_s0)
    /\ va_get_xmm 7 va_sM == Vale.AES.GCTR_s.inc32 (va_get_xmm 7 va_s0) (4 `op_Multiply`
    va_get_reg64 rRdx va_s0) /\ l_and (FStar.Seq.Base.length #Vale.X64.Decls.quad32
    (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.buffer128_as_seq
    (va_get_mem_heaplet 1 va_sM) out_b) 0 (4 `op_Multiply` va_get_reg64 rRdx va_s0)) > 0)
    (va_get_xmm 1 va_sM == Vale.AES.GHash.ghash_incremental (Vale.Def.Types_s.reverse_bytes_quad32
    (va_get_xmm 11 va_sM)) (va_get_xmm 1 va_s0) (FStar.Seq.Base.slice #Vale.X64.Decls.quad32
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_sM) out_b) 0 (4 `op_Multiply`
    va_get_reg64 rRdx va_s0)))) ==> va_k va_sM (())))
module Vale.AES.X64.AESCTR
open Vale.Def.Prop_s
open Vale.Def.Opaque_s
open Vale.Def.Words_s
open Vale.Def.Types_s
open FStar.Seq
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.AES.AES_s
open Vale.X64.Machine_s
open Vale.X64.Memory
open Vale.X64.State
open Vale.X64.Decls
open Vale.X64.InsBasic
open Vale.X64.InsMem
open Vale.X64.InsVector
open Vale.X64.InsAes
open Vale.X64.QuickCode
open Vale.X64.QuickCodes
open Vale.AES.AES_helpers
open Vale.Poly1305.Math    // For lemma_poly_bits64()
open Vale.AES.GCM_helpers
open Vale.AES.GCTR_s
open Vale.AES.GCTR
open Vale.Arch.TypesNative
open Vale.AES.X64.GHash
open Vale.AES.GHash
open Vale.X64.CPU_Features_s
let aes_reqs
  (alg:algorithm) (key:seq nat32) (round_keys:seq quad32) (keys_b:buffer128)
  (key_ptr:nat64) (heap0:vale_heap) (layout:vale_heap_layout) : prop0
  =
  aesni_enabled /\ avx_enabled /\
  (alg = AES_128 || alg = AES_256) /\
  is_aes_key_LE alg key /\
  length(round_keys) == nr(alg) + 1 /\
  round_keys == key_to_round_keys_LE alg key /\
  key_ptr == buffer_addr keys_b heap0 /\
  validSrcAddrs128 heap0 key_ptr keys_b (nr alg + 1) layout Secret /\
  buffer128_as_seq heap0 keys_b == round_keys
//-- Aes_ctr_encrypt

val va_code_Aes_ctr_encrypt : alg:algorithm -> Tot va_code

val va_codegen_success_Aes_ctr_encrypt : alg:algorithm -> Tot va_pbool

val va_lemma_Aes_ctr_encrypt : va_b0:va_code -> va_s0:va_state -> alg:algorithm -> key:(seq nat32)
  -> round_keys:(seq quad32) -> keys_b:buffer128 -> in1:quad32 -> in2:quad32 -> in3:quad32 ->
  in4:quad32
  -> Ghost (va_state & va_fuel)
  (requires (va_require_total va_b0 (va_code_Aes_ctr_encrypt alg) va_s0 /\ va_get_ok va_s0 /\
    (sse_enabled /\ aes_reqs alg key round_keys keys_b (va_get_reg64 rR8 va_s0) (va_get_mem_heaplet
    0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 2 va_s0 == Vale.Def.Types_s.quad32_xor in1
    (va_get_xmm 3 va_s0) /\ va_get_xmm 12 va_s0 == Vale.Def.Types_s.quad32_xor in2 (va_get_xmm 3
    va_s0) /\ va_get_xmm 13 va_s0 == Vale.Def.Types_s.quad32_xor in3 (va_get_xmm 3 va_s0) /\
    va_get_xmm 14 va_s0 == Vale.Def.Types_s.quad32_xor in4 (va_get_xmm 3 va_s0) /\ va_get_xmm 3
    va_s0 == FStar.Seq.Base.index #quad32 round_keys 0 /\ va_get_xmm 4 va_s0 ==
    FStar.Seq.Base.index #quad32 round_keys 1 /\ va_get_xmm 5 va_s0 == FStar.Seq.Base.index #quad32
    round_keys 2 /\ va_get_xmm 6 va_s0 == FStar.Seq.Base.index #quad32 round_keys 3)))
  (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
    (aes_reqs alg key round_keys keys_b (va_get_reg64 rR8 va_sM) (va_get_mem_heaplet 0 va_sM)
    (va_get_mem_layout va_sM) /\ va_get_xmm 2 va_sM == Vale.AES.AES_s.aes_encrypt_LE alg key in1 /\
    va_get_xmm 12 va_sM == Vale.AES.AES_s.aes_encrypt_LE alg key in2 /\ va_get_xmm 13 va_sM ==
    Vale.AES.AES_s.aes_encrypt_LE alg key in3 /\ va_get_xmm 14 va_sM ==
    Vale.AES.AES_s.aes_encrypt_LE alg key in4) /\ va_state_eq va_sM (va_update_flags va_sM
    (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 2 va_sM
    (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 6 va_sM
    (va_update_ok va_sM va_s0))))))))))))
[@ va_qattr]
let va_wp_Aes_ctr_encrypt (alg:algorithm) (key:(seq nat32)) (round_keys:(seq quad32))
  (keys_b:buffer128) (in1:quad32) (in2:quad32) (in3:quad32) (in4:quad32) (va_s0:va_state)
  (va_k:(va_state -> unit -> Type0)) : Type0 =
  (va_get_ok va_s0 /\ (sse_enabled /\ aes_reqs alg key round_keys keys_b (va_get_reg64 rR8 va_s0)
    (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 2 va_s0 ==
    Vale.Def.Types_s.quad32_xor in1 (va_get_xmm 3 va_s0) /\ va_get_xmm 12 va_s0 ==
    Vale.Def.Types_s.quad32_xor in2 (va_get_xmm 3 va_s0) /\ va_get_xmm 13 va_s0 ==
    Vale.Def.Types_s.quad32_xor in3 (va_get_xmm 3 va_s0) /\ va_get_xmm 14 va_s0 ==
    Vale.Def.Types_s.quad32_xor in4 (va_get_xmm 3 va_s0) /\ va_get_xmm 3 va_s0 ==
    FStar.Seq.Base.index #quad32 round_keys 0 /\ va_get_xmm 4 va_s0 == FStar.Seq.Base.index #quad32
    round_keys 1 /\ va_get_xmm 5 va_s0 == FStar.Seq.Base.index #quad32 round_keys 2 /\ va_get_xmm 6
    va_s0 == FStar.Seq.Base.index #quad32 round_keys 3) /\ (forall (va_x_xmm6:quad32)
    (va_x_xmm3:quad32) (va_x_xmm4:quad32) (va_x_xmm5:quad32) (va_x_xmm2:quad32) (va_x_xmm12:quad32)
    (va_x_xmm13:quad32) (va_x_xmm14:quad32) (va_x_efl:Vale.X64.Flags.t) . let va_sM = va_upd_flags
    va_x_efl (va_upd_xmm 14 va_x_xmm14 (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12
    (va_upd_xmm 2 va_x_xmm2 (va_upd_xmm 5 va_x_xmm5 (va_upd_xmm 4 va_x_xmm4 (va_upd_xmm 3 va_x_xmm3
    (va_upd_xmm 6 va_x_xmm6 va_s0)))))))) in va_get_ok va_sM /\ (aes_reqs alg key round_keys keys_b
    (va_get_reg64 rR8 va_sM) (va_get_mem_heaplet 0 va_sM) (va_get_mem_layout va_sM) /\ va_get_xmm 2
    va_sM == Vale.AES.AES_s.aes_encrypt_LE alg key in1 /\ va_get_xmm 12 va_sM ==
    Vale.AES.AES_s.aes_encrypt_LE alg key in2 /\ va_get_xmm 13 va_sM ==
    Vale.AES.AES_s.aes_encrypt_LE alg key in3 /\ va_get_xmm 14 va_sM ==
    Vale.AES.AES_s.aes_encrypt_LE alg key in4) ==> va_k va_sM (())))

val va_wpProof_Aes_ctr_encrypt : alg:algorithm -> key:(seq nat32) -> round_keys:(seq quad32) ->
  keys_b:buffer128 -> in1:quad32 -> in2:quad32 -> in3:quad32 -> in4:quad32 -> va_s0:va_state ->
  va_k:(va_state -> unit -> Type0)
  -> Ghost (va_state & va_fuel & unit)
  (requires (va_t_require va_s0 /\ va_wp_Aes_ctr_encrypt alg key round_keys keys_b in1 in2 in3 in4
    va_s0 va_k))
  (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Aes_ctr_encrypt alg) ([va_Mod_flags;
    va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 2; va_Mod_xmm 5; va_Mod_xmm 4;
    va_Mod_xmm 3; va_Mod_xmm 6]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Aes_ctr_encrypt (alg:algorithm) (key:(seq nat32)) (round_keys:(seq quad32))
  (keys_b:buffer128) (in1:quad32) (in2:quad32) (in3:quad32) (in4:quad32) : (va_quickCode unit
  (va_code_Aes_ctr_encrypt alg)) =
  (va_QProc (va_code_Aes_ctr_encrypt alg) ([va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm
    12; va_Mod_xmm 2; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 6])
    (va_wp_Aes_ctr_encrypt alg key round_keys keys_b in1 in2 in3 in4) (va_wpProof_Aes_ctr_encrypt
    alg key round_keys keys_b in1 in2 in3 in4))
//--
//-- Aes_counter_loop

val va_code_Aes_counter_loop : alg:algorithm -> Tot va_code

val va_codegen_success_Aes_counter_loop : alg:algorithm -> Tot va_pbool

val va_lemma_Aes_counter_loop : va_b0:va_code -> va_s0:va_state -> alg:algorithm ->
  plain_b:buffer128 -> out_b:buffer128 -> key:(seq nat32) -> round_keys:(seq quad32) ->
  keys_b:buffer128
  -> Ghost (va_state & va_fuel)
  (requires (va_require_total va_b0 (va_code_Aes_counter_loop alg) va_s0 /\ va_get_ok va_s0 /\
    (sse_enabled /\ (0 < va_get_reg64 rRdx va_s0 /\ 4 `op_Multiply` va_get_reg64 rRdx va_s0 <
    pow2_32 - 4) /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 1 va_s0) (va_get_reg64 rR9
    va_s0) plain_b (va_get_reg64 rRdx va_s0 `op_Multiply` 4) (va_get_mem_layout va_s0) Secret /\
    Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 1 va_s0) (va_get_reg64 rR10 va_s0) out_b
    (va_get_reg64 rRdx va_s0 `op_Multiply` 4) (va_get_mem_layout va_s0) Secret /\ va_get_reg64 rR9
    va_s0 + va_get_reg64 rRdx va_s0 `op_Multiply` 64 < pow2_64 /\ va_get_reg64 rR10 va_s0 +
    va_get_reg64 rRdx va_s0 `op_Multiply` 64 < pow2_64 /\ Vale.X64.Decls.buffer_length
    #Vale.X64.Memory.vuint128 plain_b <= Vale.X64.Decls.buffer_length #Vale.X64.Memory.vuint128
    out_b /\ Vale.X64.Decls.buffers_disjoint128 plain_b out_b /\ aes_reqs alg key round_keys keys_b
    (va_get_reg64 rR8 va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\
    pclmulqdq_enabled /\ va_get_xmm 8 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32
    202182159 134810123 67438087 66051)))
  (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
    (Vale.X64.Decls.modifies_buffer128 out_b (va_get_mem_heaplet 1 va_s0) (va_get_mem_heaplet 1
    va_sM) /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 1 va_sM) (va_get_reg64 rR10
    va_s0) out_b (va_get_reg64 rRdx va_s0 `op_Multiply` 4) (va_get_mem_layout va_sM) Secret /\
    va_get_reg64 rR9 va_sM == va_get_reg64 rR9 va_s0 + 64 `op_Multiply` va_get_reg64 rRdx va_s0 /\
    va_get_reg64 rR10 va_sM == va_get_reg64 rR10 va_s0 + 64 `op_Multiply` va_get_reg64 rRdx va_s0
    /\ va_get_xmm 8 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123
    67438087 66051 /\ Vale.AES.GCTR.gctr_partial_def alg (4 `op_Multiply` va_get_reg64 rRdx va_s0)
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_s0) plain_b)
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_sM) out_b) key (va_get_xmm 7 va_s0)
    /\ va_get_xmm 7 va_sM == Vale.AES.GCTR_s.inc32 (va_get_xmm 7 va_s0) (4 `op_Multiply`
    va_get_reg64 rRdx va_s0) /\ l_and (FStar.Seq.Base.length #Vale.X64.Decls.quad32
    (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.buffer128_as_seq
    (va_get_mem_heaplet 1 va_sM) out_b) 0 (4 `op_Multiply` va_get_reg64 rRdx va_s0)) > 0)
    (va_get_xmm 1 va_sM == Vale.AES.GHash.ghash_incremental (Vale.Def.Types_s.reverse_bytes_quad32
    (va_get_xmm 11 va_sM)) (va_get_xmm 1 va_s0) (FStar.Seq.Base.slice #Vale.X64.Decls.quad32
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_sM) out_b) 0 (4 `op_Multiply`
    va_get_reg64 rRdx va_s0)))) /\ va_state_eq va_sM (va_update_mem_heaplet 1 va_sM
    (va_update_flags va_sM (va_update_xmm 1 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rRdi
    va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rR9 va_sM
    (va_update_reg64 rRax va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12
    va_sM (va_update_xmm 2 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3
    va_sM (va_update_xmm 6 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 7
    va_sM (va_update_xmm 15 va_sM (va_update_xmm 0 va_sM (va_update_ok va_sM (va_update_mem va_sM
    va_s0))))))))))))))))))))))))))
/
Vale.X64.State.fsti.checked Vale.X64.QuickCodes.fsti.checked Vale.X64.QuickCode.fst.checked Vale.X64.Memory.fsti.checked Vale.X64.Machine_s.fst.checked Vale.X64.InsVector.fsti.checked Vale.X64.InsMem.fsti.checked Vale.X64.InsBasic.fsti.checked Vale.X64.InsAes.fsti.checked Vale.X64.Flags.fsti.checked Vale.X64.Decls.fsti.checked Vale.X64.CPU_Features_s.fst.checked Vale.Poly1305.Math.fsti.checked Vale.Def.Words_s.fsti.checked Vale.Def.Types_s.fst.checked Vale.Def.Prop_s.fst.checked Vale.Def.Opaque_s.fsti.checked Vale.Arch.TypesNative.fsti.checked Vale.Arch.Types.fsti.checked Vale.Arch.HeapImpl.fsti.checked Vale.AES.X64.GHash.fsti.checked Vale.AES.GHash.fsti.checked Vale.AES.GCTR_s.fst.checked Vale.AES.GCTR.fsti.checked Vale.AES.GCM_helpers.fsti.checked Vale.AES.AES_s.fst.checked Vale.AES.AES_helpers.fsti.checked prims.fst.checked FStar.Seq.Base.fsti.checked FStar.Seq.fst.checked FStar.Pervasives.Native.fst.checked FStar.Pervasives.fsti.checked
Vale.AES.X64.AESCTR.fsti

    alg: Vale.AES.AES_common_s.algorithm ->
    plain_b: Vale.X64.Memory.buffer128 ->
    out_b: Vale.X64.Memory.buffer128 ->
    key: FStar.Seq.Base.seq Vale.X64.Memory.nat32 ->
    round_keys: FStar.Seq.Base.seq Vale.X64.Decls.quad32 ->
    keys_b: Vale.X64.Memory.buffer128 ->
    va_s0: Vale.X64.Decls.va_state ->
    va_k: (_: Vale.X64.Decls.va_state -> _: Prims.unit -> Type0)
  -> Type0
Vale.AES.AES_common_s.algorithm Vale.X64.Memory.buffer128 FStar.Seq.Base.seq Vale.X64.Memory.nat32 Vale.X64.Decls.quad32 Vale.X64.Decls.va_state Prims.unit Prims.l_and Prims.b2t Vale.X64.Decls.va_get_ok Vale.X64.CPU_Features_s.sse_enabled Prims.op_LessThan Vale.X64.Decls.va_get_reg64 Vale.X64.Machine_s.rRdx Prims.op_Multiply Prims.op_Subtraction Vale.X64.Machine_s.pow2_32 Vale.X64.Decls.validSrcAddrs128 Vale.X64.Decls.va_get_mem_heaplet Vale.X64.Machine_s.rR9 Vale.X64.Decls.va_get_mem_layout Vale.Arch.HeapTypes_s.Secret Vale.X64.Decls.validDstAddrs128 Vale.X64.Machine_s.rR10 Prims.op_Addition Vale.X64.Machine_s.pow2_64 Prims.op_LessThanOrEqual Vale.X64.Decls.buffer_length Vale.X64.Memory.vuint128 Vale.X64.Decls.buffers_disjoint128 Vale.AES.X64.AESCTR.aes_reqs Vale.X64.Machine_s.rR8 Vale.X64.CPU_Features_s.pclmulqdq_enabled Prims.eq2 Vale.Def.Words_s.four Vale.Def.Types_s.nat32 Vale.X64.Decls.va_get_xmm Vale.Def.Words_s.Mkfour Prims.l_Forall Vale.X64.InsBasic.vale_heap Vale.X64.Memory.nat64 Vale.X64.Flags.t Prims.l_imp Vale.X64.Decls.modifies_buffer128 Prims.int Vale.AES.GCTR.gctr_partial_def Vale.X64.Decls.buffer128_as_seq Vale.Def.Types_s.quad32 Vale.AES.GCTR_s.inc32 Prims.op_GreaterThan FStar.Seq.Base.length FStar.Seq.Base.slice Vale.AES.GHash.ghash_incremental Vale.Def.Types_s.reverse_bytes_quad32 Vale.X64.State.vale_state Vale.X64.Decls.va_upd_mem_heaplet Vale.X64.Decls.va_upd_flags Vale.X64.Decls.va_upd_xmm Vale.X64.Decls.va_upd_reg64 Vale.X64.Machine_s.rR12 Vale.X64.Machine_s.rRdi Vale.X64.Machine_s.rRax Vale.X64.Decls.va_upd_mem
let va_wp_Aes_counter_loop
      (alg: algorithm)
      (plain_b out_b: buffer128)
      (key: (seq nat32))
      (round_keys: (seq quad32))
      (keys_b: buffer128)
      (va_s0: va_state)
      (va_k: (va_state -> unit -> Type0))
    : Type0 =
  
(va_get_ok va_s0 /\
  (sse_enabled /\
    (0 < va_get_reg64 rRdx va_s0 /\ 4 `op_Multiply` (va_get_reg64 rRdx va_s0) < pow2_32 - 4) /\
    Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 1 va_s0)
      (va_get_reg64 rR9 va_s0)
      plain_b
      ((va_get_reg64 rRdx va_s0) `op_Multiply` 4)
      (va_get_mem_layout va_s0)
      Secret /\
    Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 1 va_s0)
      (va_get_reg64 rR10 va_s0)
      out_b
      ((va_get_reg64 rRdx va_s0) `op_Multiply` 4)
      (va_get_mem_layout va_s0)
      Secret /\ va_get_reg64 rR9 va_s0 + (va_get_reg64 rRdx va_s0) `op_Multiply` 64 < pow2_64 /\
    va_get_reg64 rR10 va_s0 + (va_get_reg64 rRdx va_s0) `op_Multiply` 64 < pow2_64 /\
    Vale.X64.Decls.buffer_length #Vale.X64.Memory.vuint128 plain_b <=
    Vale.X64.Decls.buffer_length #Vale.X64.Memory.vuint128 out_b /\
    Vale.X64.Decls.buffers_disjoint128 plain_b out_b /\
    aes_reqs alg
      key
      round_keys
      keys_b
      (va_get_reg64 rR8 va_s0)
      (va_get_mem_heaplet 0 va_s0)
      (va_get_mem_layout va_s0) /\ pclmulqdq_enabled /\
    va_get_xmm 8 va_s0 ==
    Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123 67438087 66051) /\
  (forall (va_x_mem: vale_heap) (va_x_xmm0: quad32) (va_x_xmm15: quad32) (va_x_xmm7: quad32)
      (va_x_xmm9: quad32) (va_x_xmm10: quad32) (va_x_xmm6: quad32) (va_x_xmm3: quad32)
      (va_x_xmm4: quad32) (va_x_xmm5: quad32) (va_x_xmm2: quad32) (va_x_xmm12: quad32)
      (va_x_xmm13: quad32) (va_x_xmm14: quad32) (va_x_rax: nat64) (va_x_r9: nat64) (va_x_rdx: nat64)
      (va_x_r10: nat64) (va_x_rdi: nat64) (va_x_r12: nat64) (va_x_xmm1: quad32)
      (va_x_efl: Vale.X64.Flags.t) (va_x_heap1: vale_heap).
      let va_sM =
        va_upd_mem_heaplet 1
          va_x_heap1
          (va_upd_flags va_x_efl
              (va_upd_xmm 1
                  va_x_xmm1
                  (va_upd_reg64 rR12
                      va_x_r12
                      (va_upd_reg64 rRdi
                          va_x_rdi
                          (va_upd_reg64 rR10
                              va_x_r10
                              (va_upd_reg64 rRdx
                                  va_x_rdx
                                  (va_upd_reg64 rR9
                                      va_x_r9
                                      (va_upd_reg64 rRax
                                          va_x_rax
                                          (va_upd_xmm 14
                                              va_x_xmm14
                                              (va_upd_xmm 13
                                                  va_x_xmm13
                                                  (va_upd_xmm 12
                                                      va_x_xmm12
                                                      (va_upd_xmm 2
                                                          va_x_xmm2
                                                          (va_upd_xmm 5
                                                              va_x_xmm5
                                                              (va_upd_xmm 4
                                                                  va_x_xmm4
                                                                  (va_upd_xmm 3
                                                                      va_x_xmm3
                                                                      (va_upd_xmm 6
                                                                          va_x_xmm6
                                                                          (va_upd_xmm 10
                                                                              va_x_xmm10
                                                                              (va_upd_xmm 9
                                                                                  va_x_xmm9
                                                                                  (va_upd_xmm 7
                                                                                      va_x_xmm7
                                                                                      (va_upd_xmm 15
                                                                                          va_x_xmm15
                                                                                          (va_upd_xmm
                                                                                              0
                                                                                              va_x_xmm0
                                                                                              (va_upd_mem
                                                                                                  va_x_mem
                                                                                                  va_s0
                                                                                                ))))
                                                                              ))))))))))))))))))
      in
      va_get_ok va_sM /\
      (Vale.X64.Decls.modifies_buffer128 out_b
          (va_get_mem_heaplet 1 va_s0)
          (va_get_mem_heaplet 1 va_sM) /\
        Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 1 va_sM)
          (va_get_reg64 rR10 va_s0)
          out_b
          ((va_get_reg64 rRdx va_s0) `op_Multiply` 4)
          (va_get_mem_layout va_sM)
          Secret /\
        va_get_reg64 rR9 va_sM ==
        va_get_reg64 rR9 va_s0 + 64 `op_Multiply` (va_get_reg64 rRdx va_s0) /\
        va_get_reg64 rR10 va_sM ==
        va_get_reg64 rR10 va_s0 + 64 `op_Multiply` (va_get_reg64 rRdx va_s0) /\
        va_get_xmm 8 va_sM ==
        Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123 67438087 66051 /\
        Vale.AES.GCTR.gctr_partial_def alg
          (4 `op_Multiply` (va_get_reg64 rRdx va_s0))
          (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_s0) plain_b)
          (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_sM) out_b)
          key
          (va_get_xmm 7 va_s0) /\
        va_get_xmm 7 va_sM ==
        Vale.AES.GCTR_s.inc32 (va_get_xmm 7 va_s0) (4 `op_Multiply` (va_get_reg64 rRdx va_s0)) /\
        l_and (FStar.Seq.Base.length #Vale.X64.Decls.quad32
              (FStar.Seq.Base.slice #Vale.X64.Decls.quad32
                  (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_sM) out_b)
                  0
                  (4 `op_Multiply` (va_get_reg64 rRdx va_s0))) >
            0)
          (va_get_xmm 1 va_sM ==
            Vale.AES.GHash.ghash_incremental (Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 11
                      va_sM))
              (va_get_xmm 1 va_s0)
              (FStar.Seq.Base.slice #Vale.X64.Decls.quad32
                  (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_sM) out_b)
                  0
                  (4 `op_Multiply` (va_get_reg64 rRdx va_s0))))) ==>
      va_k va_sM (())))