val va_lemma_Aes_counter_loop_while0 : va_b0:va_code -> va_s0:va_state -> va_old:va_state ->
  alg:algorithm -> va_in_icb_BE:quad32 -> va_in_key:(seq nat32) -> va_in_keys_b:buffer128 ->
  va_in_old_iv:quad32 -> va_in_out_b:buffer128 -> va_in_plain_b:buffer128 -> va_in_round_keys:(seq
  quad32) -> va_in_count:nat
  -> Ghost (va_state & va_fuel & nat)
  (requires (va_require_total va_b0 (va_code_Aes_counter_loop_while0 alg) va_s0 /\ va_get_ok va_s0
    /\ sse_enabled /\ (0 < va_get_reg64 rRdx va_old /\ 4 `op_Multiply` va_get_reg64 rRdx va_old <
    pow2_32 - 4) /\ (0 <= va_get_reg64 rRdx va_s0 /\ va_get_reg64 rRdx va_s0 <= va_get_reg64 rRdx
    va_old) /\ va_in_count == va_get_reg64 rRdx va_old - va_get_reg64 rRdx va_s0 /\ (0 <=
    va_in_count /\ va_in_count <= pow2_32 - 4) /\ Vale.X64.Decls.modifies_buffer128 va_in_out_b
    (va_get_mem_heaplet 1 va_old) (va_get_mem_heaplet 1 va_s0) /\ Vale.X64.Decls.buffer128_as_seq
    (va_get_mem_heaplet 1 va_s0) va_in_plain_b == Vale.X64.Decls.buffer128_as_seq
    (va_get_mem_heaplet 1 va_old) va_in_plain_b /\ Vale.X64.Decls.validSrcAddrs128
    (va_get_mem_heaplet 1 va_s0) (va_get_reg64 rR9 va_old) va_in_plain_b (va_get_reg64 rRdx va_old
    `op_Multiply` 4) (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs128
    (va_get_mem_heaplet 1 va_s0) (va_get_reg64 rR10 va_old) va_in_out_b (va_get_reg64 rRdx va_old
    `op_Multiply` 4) (va_get_mem_layout va_s0) Secret /\ va_get_reg64 rR9 va_s0 == va_get_reg64 rR9
    va_old + va_in_count `op_Multiply` 64 /\ va_get_reg64 rR10 va_s0 == va_get_reg64 rR10 va_old +
    va_in_count `op_Multiply` 64 /\ va_get_reg64 rR9 va_old + va_get_reg64 rRdx va_old
    `op_Multiply` 64 < pow2_64 /\ va_get_reg64 rR10 va_old + va_get_reg64 rRdx va_old `op_Multiply`
    64 < pow2_64 /\ Vale.X64.Decls.buffer_length #Vale.X64.Memory.vuint128 va_in_plain_b <=
    Vale.X64.Decls.buffer_length #Vale.X64.Memory.vuint128 va_in_out_b /\
    Vale.X64.Decls.buffers_disjoint128 va_in_plain_b va_in_out_b /\ va_get_xmm 8 va_s0 ==
    Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123 67438087 66051 /\
    va_get_xmm 0 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 67438087 66051 202182159
    134810123 /\ va_get_xmm 15 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 4 0 4 0 /\
    (va_get_reg64 rRdx va_s0 > 0 ==> 4 `op_Multiply` va_in_count < pow2_32 - 4) /\ (va_get_reg64
    rRdx va_s0 <= 0 ==> 4 `op_Multiply` va_in_count < pow2_32) /\ va_get_xmm 9 va_s0 ==
    Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` va_in_count) 1))) (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` va_in_count) 0))) /\ va_get_xmm 10 va_s0 ==
    Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` va_in_count) 3))) (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` va_in_count) 2))) /\ aes_reqs alg va_in_key
    va_in_round_keys va_in_keys_b (va_get_reg64 rR8 va_s0) (va_get_mem_heaplet 0 va_s0)
    (va_get_mem_layout va_s0) /\ pclmulqdq_enabled /\ va_in_old_iv ==
    Vale.Def.Types_s.reverse_bytes_quad32 va_in_icb_BE /\ va_get_reg64 rRdi va_s0 ==
    Vale.Arch.Types.lo64 va_in_old_iv /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32
    (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.buffer128_as_seq
    (va_get_mem_heaplet 1 va_s0) va_in_out_b) 0 (4 `op_Multiply` va_get_reg64 rRdx va_old)) > 0 /\
    va_get_xmm 1 va_s0 == Vale.AES.GHash.ghash_incremental0 (Vale.Def.Types_s.reverse_bytes_quad32
    (va_get_xmm 11 va_s0)) (va_get_xmm 1 va_old) (FStar.Seq.Base.slice #Vale.X64.Decls.quad32
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_s0) va_in_out_b) 0 (4 `op_Multiply`
    va_in_count)) /\ Vale.AES.GCTR.gctr_partial_def alg (4 `op_Multiply` va_in_count)
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_old) va_in_plain_b)
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_s0) va_in_out_b) va_in_key
    va_in_icb_BE))
  (ensures (fun (va_sM, va_fM, count) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM
    /\ sse_enabled /\ (0 < va_get_reg64 rRdx va_old /\ 4 `op_Multiply` va_get_reg64 rRdx va_old <
    pow2_32 - 4) /\ (0 <= va_get_reg64 rRdx va_sM /\ va_get_reg64 rRdx va_sM <= va_get_reg64 rRdx
    va_old) /\ count == va_get_reg64 rRdx va_old - va_get_reg64 rRdx va_sM /\ (0 <= count /\ count
    <= pow2_32 - 4) /\ Vale.X64.Decls.modifies_buffer128 va_in_out_b (va_get_mem_heaplet 1 va_old)
    (va_get_mem_heaplet 1 va_sM) /\ Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_sM)
    va_in_plain_b == Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_old) va_in_plain_b /\
    Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 1 va_sM) (va_get_reg64 rR9 va_old)
    va_in_plain_b (va_get_reg64 rRdx va_old `op_Multiply` 4) (va_get_mem_layout va_sM) Secret /\
    Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 1 va_sM) (va_get_reg64 rR10 va_old)
    va_in_out_b (va_get_reg64 rRdx va_old `op_Multiply` 4) (va_get_mem_layout va_sM) Secret /\
    va_get_reg64 rR9 va_sM == va_get_reg64 rR9 va_old + count `op_Multiply` 64 /\ va_get_reg64 rR10
    va_sM == va_get_reg64 rR10 va_old + count `op_Multiply` 64 /\ va_get_reg64 rR9 va_old +
    va_get_reg64 rRdx va_old `op_Multiply` 64 < pow2_64 /\ va_get_reg64 rR10 va_old + va_get_reg64
    rRdx va_old `op_Multiply` 64 < pow2_64 /\ Vale.X64.Decls.buffer_length
    #Vale.X64.Memory.vuint128 va_in_plain_b <= Vale.X64.Decls.buffer_length
    #Vale.X64.Memory.vuint128 va_in_out_b /\ Vale.X64.Decls.buffers_disjoint128 va_in_plain_b
    va_in_out_b /\ va_get_xmm 8 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159
    134810123 67438087 66051 /\ va_get_xmm 0 va_sM == Vale.Def.Words_s.Mkfour
    #Vale.Def.Types_s.nat32 67438087 66051 202182159 134810123 /\ va_get_xmm 15 va_sM ==
    Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 4 0 4 0 /\ (va_get_reg64 rRdx va_sM > 0 ==> 4
    `op_Multiply` count < pow2_32 - 4) /\ (va_get_reg64 rRdx va_sM <= 0 ==> 4 `op_Multiply` count <
    pow2_32) /\ va_get_xmm 9 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32
    (va_in_old_iv.hi2) (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32
    (va_in_icb_BE.lo0) (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` count) 1))) (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` count) 0))) /\ va_get_xmm 10 va_sM ==
    Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` count) 3))) (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` count) 2))) /\ aes_reqs alg va_in_key
    va_in_round_keys va_in_keys_b (va_get_reg64 rR8 va_sM) (va_get_mem_heaplet 0 va_sM)
    (va_get_mem_layout va_sM) /\ pclmulqdq_enabled /\ va_in_old_iv ==
    Vale.Def.Types_s.reverse_bytes_quad32 va_in_icb_BE /\ va_get_reg64 rRdi va_sM ==
    Vale.Arch.Types.lo64 va_in_old_iv /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32
    (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.buffer128_as_seq
    (va_get_mem_heaplet 1 va_sM) va_in_out_b) 0 (4 `op_Multiply` va_get_reg64 rRdx va_old)) > 0 /\
    va_get_xmm 1 va_sM == Vale.AES.GHash.ghash_incremental0 (Vale.Def.Types_s.reverse_bytes_quad32
    (va_get_xmm 11 va_sM)) (va_get_xmm 1 va_old) (FStar.Seq.Base.slice #Vale.X64.Decls.quad32
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_sM) va_in_out_b) 0 (4 `op_Multiply`
    count)) /\ Vale.AES.GCTR.gctr_partial_def alg (4 `op_Multiply` count)
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_old) va_in_plain_b)
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_sM) va_in_out_b) va_in_key
    va_in_icb_BE /\ ~(va_get_reg64 rRdx va_sM > 0) /\ va_state_eq va_sM (va_update_xmm 9 va_sM
    (va_update_xmm 7 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM
    (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM
    (va_update_xmm 12 va_sM (va_update_xmm 10 va_sM (va_update_xmm 1 va_sM (va_update_reg64 rRdx
    va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR10 va_sM
    (va_update_ok va_sM (va_update_mem va_sM (va_update_mem_heaplet 1 va_sM (va_update_flags va_sM
    va_s0))))))))))))))))))))))
let va_lemma_Aes_counter_loop_while0 va_b0 va_s0 va_old alg va_in_icb_BE va_in_key va_in_keys_b
  va_in_old_iv va_in_out_b va_in_plain_b va_in_round_keys va_in_count =
  let va_old = va_expand_state va_old in
  let (va_mods:va_mods_t) = [va_Mod_xmm 9; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4;
    va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 10;
    va_Mod_xmm 1; va_Mod_reg64 rRdx; va_Mod_reg64 rR9; va_Mod_reg64 rR12; va_Mod_reg64 rR10;
    va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 1; va_Mod_flags] in
  let va_qc = va_qcode_Aes_counter_loop_while0 va_mods va_old alg va_in_icb_BE va_in_key
    va_in_keys_b va_in_old_iv va_in_out_b va_in_plain_b va_in_round_keys va_in_count in
  let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Aes_counter_loop_while0 alg) va_qc
    va_s0 (fun va_s0 va_sM va_g -> let count = va_g in label va_range1
    "***** POSTCONDITION NOT MET AT line 586 column 1 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_ok va_sM) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 693 column 24 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    sse_enabled /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 695 column 77 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (0 < va_get_reg64 rRdx va_old /\ 4 `op_Multiply` va_get_reg64 rRdx va_old < pow2_32 - 4) /\
    label va_range1
    "***** POSTCONDITION NOT MET AT line 696 column 57 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (0 <= va_get_reg64 rRdx va_sM /\ va_get_reg64 rRdx va_sM <= va_get_reg64 rRdx va_old) /\ label
    va_range1
    "***** POSTCONDITION NOT MET AT line 697 column 60 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (count == va_get_reg64 rRdx va_old - va_get_reg64 rRdx va_sM) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 698 column 38 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (0 <= count /\ count <= pow2_32 - 4) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 701 column 57 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (Vale.X64.Decls.modifies_buffer128 va_in_out_b (va_get_mem_heaplet 1 va_old)
    (va_get_mem_heaplet 1 va_sM)) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 702 column 86 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_sM) va_in_plain_b ==
    Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_old) va_in_plain_b) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 705 column 107 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 1 va_sM) (va_get_reg64 rR9 va_old)
    va_in_plain_b (va_get_reg64 rRdx va_old `op_Multiply` 4) (va_get_mem_layout va_sM) Secret) /\
    label va_range1
    "***** POSTCONDITION NOT MET AT line 706 column 107 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 1 va_sM) (va_get_reg64 rR10 va_old)
    va_in_out_b (va_get_reg64 rRdx va_old `op_Multiply` 4) (va_get_mem_layout va_sM) Secret) /\
    label va_range1
    "***** POSTCONDITION NOT MET AT line 707 column 53 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_reg64 rR9 va_sM == va_get_reg64 rR9 va_old + count `op_Multiply` 64) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 708 column 49 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_reg64 rR10 va_sM == va_get_reg64 rR10 va_old + count `op_Multiply` 64) /\ label
    va_range1
    "***** POSTCONDITION NOT MET AT line 709 column 65 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_reg64 rR9 va_old + va_get_reg64 rRdx va_old `op_Multiply` 64 < pow2_64) /\ label
    va_range1
    "***** POSTCONDITION NOT MET AT line 710 column 63 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_reg64 rR10 va_old + va_get_reg64 rRdx va_old `op_Multiply` 64 < pow2_64) /\ label
    va_range1
    "***** POSTCONDITION NOT MET AT line 711 column 60 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (Vale.X64.Decls.buffer_length #Vale.X64.Memory.vuint128 va_in_plain_b <=
    Vale.X64.Decls.buffer_length #Vale.X64.Memory.vuint128 va_in_out_b) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 712 column 48 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (Vale.X64.Decls.buffers_disjoint128 va_in_plain_b va_in_out_b) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 715 column 75 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 8 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123
    67438087 66051) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 716 column 77 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 0 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 67438087 66051 202182159
    134810123) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 717 column 39 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 15 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 4 0 4 0) /\ label
    va_range1
    "***** POSTCONDITION NOT MET AT line 720 column 58 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_reg64 rRdx va_sM > 0 ==> 4 `op_Multiply` count < pow2_32 - 4) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 721 column 55 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_reg64 rRdx va_sM <= 0 ==> 4 `op_Multiply` count < pow2_32) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 722 column 213 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 9 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` count) 1))) (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` count) 0)))) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 723 column 213 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 10 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` count) 3))) (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` count) 2)))) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 726 column 78 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (aes_reqs alg va_in_key va_in_round_keys va_in_keys_b (va_get_reg64 rR8 va_sM)
    (va_get_mem_heaplet 0 va_sM) (va_get_mem_layout va_sM)) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 729 column 30 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    pclmulqdq_enabled /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 730 column 51 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_in_old_iv == Vale.Def.Types_s.reverse_bytes_quad32 va_in_icb_BE) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 731 column 39 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_reg64 rRdi va_sM == Vale.Arch.Types.lo64 va_in_old_iv) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 734 column 91 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (FStar.Seq.Base.slice #Vale.X64.Decls.quad32
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_sM) va_in_out_b) 0 (4 `op_Multiply`
    va_get_reg64 rRdx va_old)) > 0) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 735 column 128 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 1 va_sM == Vale.AES.GHash.ghash_incremental0 (Vale.Def.Types_s.reverse_bytes_quad32
    (va_get_xmm 11 va_sM)) (va_get_xmm 1 va_old) (FStar.Seq.Base.slice #Vale.X64.Decls.quad32
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_sM) va_in_out_b) 0 (4 `op_Multiply`
    count))) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 736 column 127 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (Vale.AES.GCTR.gctr_partial_def alg (4 `op_Multiply` count) (Vale.X64.Decls.buffer128_as_seq
    (va_get_mem_heaplet 1 va_old) va_in_plain_b) (Vale.X64.Decls.buffer128_as_seq
    (va_get_mem_heaplet 1 va_sM) va_in_out_b) va_in_key va_in_icb_BE) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 586 column 1 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (~(va_get_reg64 rRdx va_sM > 0))) in
  assert_norm (va_qc.mods == va_mods);
  va_lemma_norm_mods ([va_Mod_xmm 9; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4;
    va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 10;
    va_Mod_xmm 1; va_Mod_reg64 rRdx; va_Mod_reg64 rR9; va_Mod_reg64 rR12; va_Mod_reg64 rR10;
    va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 1; va_Mod_flags]) va_sM va_s0;
  let count = va_g in
  (va_sM, va_fM, count)
val va_lemma_Aes_counter_loop_while0 : va_b0:va_code -> va_s0:va_state -> va_old:va_state ->
  alg:algorithm -> va_in_icb_BE:quad32 -> va_in_key:(seq nat32) -> va_in_keys_b:buffer128 ->
  va_in_old_iv:quad32 -> va_in_out_b:buffer128 -> va_in_plain_b:buffer128 -> va_in_round_keys:(seq
  quad32) -> va_in_count:nat
  -> Ghost (va_state & va_fuel & nat)
  (requires (va_require_total va_b0 (va_code_Aes_counter_loop_while0 alg) va_s0 /\ va_get_ok va_s0
    /\ sse_enabled /\ (0 < va_get_reg64 rRdx va_old /\ 4 `op_Multiply` va_get_reg64 rRdx va_old <
    pow2_32 - 4) /\ (0 <= va_get_reg64 rRdx va_s0 /\ va_get_reg64 rRdx va_s0 <= va_get_reg64 rRdx
    va_old) /\ va_in_count == va_get_reg64 rRdx va_old - va_get_reg64 rRdx va_s0 /\ (0 <=
    va_in_count /\ va_in_count <= pow2_32 - 4) /\ Vale.X64.Decls.modifies_buffer128 va_in_out_b
    (va_get_mem_heaplet 1 va_old) (va_get_mem_heaplet 1 va_s0) /\ Vale.X64.Decls.buffer128_as_seq
    (va_get_mem_heaplet 1 va_s0) va_in_plain_b == Vale.X64.Decls.buffer128_as_seq
    (va_get_mem_heaplet 1 va_old) va_in_plain_b /\ Vale.X64.Decls.validSrcAddrs128
    (va_get_mem_heaplet 1 va_s0) (va_get_reg64 rR9 va_old) va_in_plain_b (va_get_reg64 rRdx va_old
    `op_Multiply` 4) (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs128
    (va_get_mem_heaplet 1 va_s0) (va_get_reg64 rR10 va_old) va_in_out_b (va_get_reg64 rRdx va_old
    `op_Multiply` 4) (va_get_mem_layout va_s0) Secret /\ va_get_reg64 rR9 va_s0 == va_get_reg64 rR9
    va_old + va_in_count `op_Multiply` 64 /\ va_get_reg64 rR10 va_s0 == va_get_reg64 rR10 va_old +
    va_in_count `op_Multiply` 64 /\ va_get_reg64 rR9 va_old + va_get_reg64 rRdx va_old
    `op_Multiply` 64 < pow2_64 /\ va_get_reg64 rR10 va_old + va_get_reg64 rRdx va_old `op_Multiply`
    64 < pow2_64 /\ Vale.X64.Decls.buffer_length #Vale.X64.Memory.vuint128 va_in_plain_b <=
    Vale.X64.Decls.buffer_length #Vale.X64.Memory.vuint128 va_in_out_b /\
    Vale.X64.Decls.buffers_disjoint128 va_in_plain_b va_in_out_b /\ va_get_xmm 8 va_s0 ==
    Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123 67438087 66051 /\
    va_get_xmm 0 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 67438087 66051 202182159
    134810123 /\ va_get_xmm 15 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 4 0 4 0 /\
    (va_get_reg64 rRdx va_s0 > 0 ==> 4 `op_Multiply` va_in_count < pow2_32 - 4) /\ (va_get_reg64
    rRdx va_s0 <= 0 ==> 4 `op_Multiply` va_in_count < pow2_32) /\ va_get_xmm 9 va_s0 ==
    Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` va_in_count) 1))) (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` va_in_count) 0))) /\ va_get_xmm 10 va_s0 ==
    Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` va_in_count) 3))) (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` va_in_count) 2))) /\ aes_reqs alg va_in_key
    va_in_round_keys va_in_keys_b (va_get_reg64 rR8 va_s0) (va_get_mem_heaplet 0 va_s0)
    (va_get_mem_layout va_s0) /\ pclmulqdq_enabled /\ va_in_old_iv ==
    Vale.Def.Types_s.reverse_bytes_quad32 va_in_icb_BE /\ va_get_reg64 rRdi va_s0 ==
    Vale.Arch.Types.lo64 va_in_old_iv /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32
    (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.buffer128_as_seq
    (va_get_mem_heaplet 1 va_s0) va_in_out_b) 0 (4 `op_Multiply` va_get_reg64 rRdx va_old)) > 0 /\
    va_get_xmm 1 va_s0 == Vale.AES.GHash.ghash_incremental0 (Vale.Def.Types_s.reverse_bytes_quad32
    (va_get_xmm 11 va_s0)) (va_get_xmm 1 va_old) (FStar.Seq.Base.slice #Vale.X64.Decls.quad32
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_s0) va_in_out_b) 0 (4 `op_Multiply`
    va_in_count)) /\ Vale.AES.GCTR.gctr_partial_def alg (4 `op_Multiply` va_in_count)
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_old) va_in_plain_b)
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_s0) va_in_out_b) va_in_key
    va_in_icb_BE))
  (ensures (fun (va_sM, va_fM, count) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM
    /\ sse_enabled /\ (0 < va_get_reg64 rRdx va_old /\ 4 `op_Multiply` va_get_reg64 rRdx va_old <
    pow2_32 - 4) /\ (0 <= va_get_reg64 rRdx va_sM /\ va_get_reg64 rRdx va_sM <= va_get_reg64 rRdx
    va_old) /\ count == va_get_reg64 rRdx va_old - va_get_reg64 rRdx va_sM /\ (0 <= count /\ count
    <= pow2_32 - 4) /\ Vale.X64.Decls.modifies_buffer128 va_in_out_b (va_get_mem_heaplet 1 va_old)
    (va_get_mem_heaplet 1 va_sM) /\ Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_sM)
    va_in_plain_b == Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_old) va_in_plain_b /\
    Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 1 va_sM) (va_get_reg64 rR9 va_old)
    va_in_plain_b (va_get_reg64 rRdx va_old `op_Multiply` 4) (va_get_mem_layout va_sM) Secret /\
    Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 1 va_sM) (va_get_reg64 rR10 va_old)
    va_in_out_b (va_get_reg64 rRdx va_old `op_Multiply` 4) (va_get_mem_layout va_sM) Secret /\
    va_get_reg64 rR9 va_sM == va_get_reg64 rR9 va_old + count `op_Multiply` 64 /\ va_get_reg64 rR10
    va_sM == va_get_reg64 rR10 va_old + count `op_Multiply` 64 /\ va_get_reg64 rR9 va_old +
    va_get_reg64 rRdx va_old `op_Multiply` 64 < pow2_64 /\ va_get_reg64 rR10 va_old + va_get_reg64
    rRdx va_old `op_Multiply` 64 < pow2_64 /\ Vale.X64.Decls.buffer_length
    #Vale.X64.Memory.vuint128 va_in_plain_b <= Vale.X64.Decls.buffer_length
    #Vale.X64.Memory.vuint128 va_in_out_b /\ Vale.X64.Decls.buffers_disjoint128 va_in_plain_b
    va_in_out_b /\ va_get_xmm 8 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159
    134810123 67438087 66051 /\ va_get_xmm 0 va_sM == Vale.Def.Words_s.Mkfour
    #Vale.Def.Types_s.nat32 67438087 66051 202182159 134810123 /\ va_get_xmm 15 va_sM ==
    Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 4 0 4 0 /\ (va_get_reg64 rRdx va_sM > 0 ==> 4
    `op_Multiply` count < pow2_32 - 4) /\ (va_get_reg64 rRdx va_sM <= 0 ==> 4 `op_Multiply` count <
    pow2_32) /\ va_get_xmm 9 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32
    (va_in_old_iv.hi2) (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32
    (va_in_icb_BE.lo0) (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` count) 1))) (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` count) 0))) /\ va_get_xmm 10 va_sM ==
    Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` count) 3))) (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` count) 2))) /\ aes_reqs alg va_in_key
    va_in_round_keys va_in_keys_b (va_get_reg64 rR8 va_sM) (va_get_mem_heaplet 0 va_sM)
    (va_get_mem_layout va_sM) /\ pclmulqdq_enabled /\ va_in_old_iv ==
    Vale.Def.Types_s.reverse_bytes_quad32 va_in_icb_BE /\ va_get_reg64 rRdi va_sM ==
    Vale.Arch.Types.lo64 va_in_old_iv /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32
    (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.buffer128_as_seq
    (va_get_mem_heaplet 1 va_sM) va_in_out_b) 0 (4 `op_Multiply` va_get_reg64 rRdx va_old)) > 0 /\
    va_get_xmm 1 va_sM == Vale.AES.GHash.ghash_incremental0 (Vale.Def.Types_s.reverse_bytes_quad32
    (va_get_xmm 11 va_sM)) (va_get_xmm 1 va_old) (FStar.Seq.Base.slice #Vale.X64.Decls.quad32
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_sM) va_in_out_b) 0 (4 `op_Multiply`
    count)) /\ Vale.AES.GCTR.gctr_partial_def alg (4 `op_Multiply` count)
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_old) va_in_plain_b)
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_sM) va_in_out_b) va_in_key
    va_in_icb_BE /\ ~(va_get_reg64 rRdx va_sM > 0) /\ va_state_eq va_sM (va_update_xmm 9 va_sM
    (va_update_xmm 7 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM
    (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM
    (va_update_xmm 12 va_sM (va_update_xmm 10 va_sM (va_update_xmm 1 va_sM (va_update_reg64 rRdx
    va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR10 va_sM
    (va_update_ok va_sM (va_update_mem va_sM (va_update_mem_heaplet 1 va_sM (va_update_flags va_sM
    va_s0))))))))))))))))))))))
let va_lemma_Aes_counter_loop_while0
      va_b0
      va_s0
      va_old
      alg
      va_in_icb_BE
      va_in_key
      va_in_keys_b
      va_in_old_iv
      va_in_out_b
      va_in_plain_b
      va_in_round_keys
      va_in_count
     =
let va_old = va_expand_state va_old in
let va_mods:va_mods_t =
  [
    va_Mod_xmm 9; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2;
    va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_reg64 rRdx;
    va_Mod_reg64 rR9; va_Mod_reg64 rR12; va_Mod_reg64 rR10; va_Mod_ok; va_Mod_mem;
    va_Mod_mem_heaplet 1; va_Mod_flags
  ]
in
let va_qc =
  va_qcode_Aes_counter_loop_while0 va_mods va_old alg va_in_icb_BE va_in_key va_in_keys_b
    va_in_old_iv va_in_out_b va_in_plain_b va_in_round_keys va_in_count
in
let va_sM, va_fM, va_g =
  va_wp_sound_code_norm (va_code_Aes_counter_loop_while0 alg)
    va_qc
    va_s0
    (fun va_s0 va_sM va_g ->
        let count = va_g in
        label va_range1
          "***** POSTCONDITION NOT MET AT line 586 column 1 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
          (va_get_ok va_sM) /\
        label va_range1
          "***** POSTCONDITION NOT MET AT line 693 column 24 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
          sse_enabled /\
        label va_range1
          "***** POSTCONDITION NOT MET AT line 695 column 77 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
          (0 < va_get_reg64 rRdx va_old /\ 4 `op_Multiply` (va_get_reg64 rRdx va_old) < pow2_32 - 4) /\
        label va_range1
          "***** POSTCONDITION NOT MET AT line 696 column 57 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
          (0 <= va_get_reg64 rRdx va_sM /\ va_get_reg64 rRdx va_sM <= va_get_reg64 rRdx va_old) /\
        label va_range1
          "***** POSTCONDITION NOT MET AT line 697 column 60 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
          (count == va_get_reg64 rRdx va_old - va_get_reg64 rRdx va_sM) /\
        label va_range1
          "***** POSTCONDITION NOT MET AT line 698 column 38 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
          (0 <= count /\ count <= pow2_32 - 4) /\
        label va_range1
          "***** POSTCONDITION NOT MET AT line 701 column 57 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
          (Vale.X64.Decls.modifies_buffer128 va_in_out_b
              (va_get_mem_heaplet 1 va_old)
              (va_get_mem_heaplet 1 va_sM)) /\
        label va_range1
          "***** POSTCONDITION NOT MET AT line 702 column 86 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
          (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_sM) va_in_plain_b ==
            Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_old) va_in_plain_b) /\
        label va_range1
          "***** POSTCONDITION NOT MET AT line 705 column 107 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
          (Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 1 va_sM)
              (va_get_reg64 rR9 va_old)
              va_in_plain_b
              ((va_get_reg64 rRdx va_old) `op_Multiply` 4)
              (va_get_mem_layout va_sM)
              Secret) /\
        label va_range1
          "***** POSTCONDITION NOT MET AT line 706 column 107 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
          (Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 1 va_sM)
              (va_get_reg64 rR10 va_old)
              va_in_out_b
              ((va_get_reg64 rRdx va_old) `op_Multiply` 4)
              (va_get_mem_layout va_sM)
              Secret) /\
        label va_range1
          "***** POSTCONDITION NOT MET AT line 707 column 53 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
          (va_get_reg64 rR9 va_sM == va_get_reg64 rR9 va_old + count `op_Multiply` 64) /\
        label va_range1
          "***** POSTCONDITION NOT MET AT line 708 column 49 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
          (va_get_reg64 rR10 va_sM == va_get_reg64 rR10 va_old + count `op_Multiply` 64) /\
        label va_range1
          "***** POSTCONDITION NOT MET AT line 709 column 65 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
          (va_get_reg64 rR9 va_old + (va_get_reg64 rRdx va_old) `op_Multiply` 64 < pow2_64) /\
        label va_range1
          "***** POSTCONDITION NOT MET AT line 710 column 63 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
          (va_get_reg64 rR10 va_old + (va_get_reg64 rRdx va_old) `op_Multiply` 64 < pow2_64) /\
        label va_range1
          "***** POSTCONDITION NOT MET AT line 711 column 60 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
          (Vale.X64.Decls.buffer_length #Vale.X64.Memory.vuint128 va_in_plain_b <=
            Vale.X64.Decls.buffer_length #Vale.X64.Memory.vuint128 va_in_out_b) /\
        label va_range1
          "***** POSTCONDITION NOT MET AT line 712 column 48 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
          (Vale.X64.Decls.buffers_disjoint128 va_in_plain_b va_in_out_b) /\
        label va_range1
          "***** POSTCONDITION NOT MET AT line 715 column 75 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
          (va_get_xmm 8 va_sM ==
            Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123 67438087 66051) /\
        label va_range1
          "***** POSTCONDITION NOT MET AT line 716 column 77 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
          (va_get_xmm 0 va_sM ==
            Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 67438087 66051 202182159 134810123) /\
        label va_range1
          "***** POSTCONDITION NOT MET AT line 717 column 39 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
          (va_get_xmm 15 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 4 0 4 0) /\
        label va_range1
          "***** POSTCONDITION NOT MET AT line 720 column 58 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
          (va_get_reg64 rRdx va_sM > 0 ==> 4 `op_Multiply` count < pow2_32 - 4) /\
        label va_range1
          "***** POSTCONDITION NOT MET AT line 721 column 55 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
          (va_get_reg64 rRdx va_sM <= 0 ==> 4 `op_Multiply` count < pow2_32) /\
        label va_range1
          "***** POSTCONDITION NOT MET AT line 722 column 213 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
          (va_get_xmm 9 va_sM ==
            Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32
              (va_in_old_iv.hi2)
              (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
                      (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` count) 1)))
              (va_in_old_iv.hi2)
              (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
                      (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` count) 0)))) /\
        label va_range1
          "***** POSTCONDITION NOT MET AT line 723 column 213 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
          (va_get_xmm 10 va_sM ==
            Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32
              (va_in_old_iv.hi2)
              (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
                      (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` count) 3)))
              (va_in_old_iv.hi2)
              (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
                      (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` count) 2)))) /\
        label va_range1
          "***** POSTCONDITION NOT MET AT line 726 column 78 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
          (aes_reqs alg
              va_in_key
              va_in_round_keys
              va_in_keys_b
              (va_get_reg64 rR8 va_sM)
              (va_get_mem_heaplet 0 va_sM)
              (va_get_mem_layout va_sM)) /\
        label va_range1
          "***** POSTCONDITION NOT MET AT line 729 column 30 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
          pclmulqdq_enabled /\
        label va_range1
          "***** POSTCONDITION NOT MET AT line 730 column 51 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
          (va_in_old_iv == Vale.Def.Types_s.reverse_bytes_quad32 va_in_icb_BE) /\
        label va_range1
          "***** POSTCONDITION NOT MET AT line 731 column 39 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
          (va_get_reg64 rRdi va_sM == Vale.Arch.Types.lo64 va_in_old_iv) /\
        label va_range1
          "***** POSTCONDITION NOT MET AT line 734 column 91 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
          (FStar.Seq.Base.length #Vale.X64.Decls.quad32
              (FStar.Seq.Base.slice #Vale.X64.Decls.quad32
                  (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_sM) va_in_out_b)
                  0
                  (4 `op_Multiply` (va_get_reg64 rRdx va_old))) >
            0) /\
        label va_range1
          "***** POSTCONDITION NOT MET AT line 735 column 128 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
          (va_get_xmm 1 va_sM ==
            Vale.AES.GHash.ghash_incremental0 (Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 11
                      va_sM))
              (va_get_xmm 1 va_old)
              (FStar.Seq.Base.slice #Vale.X64.Decls.quad32
                  (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_sM) va_in_out_b)
                  0
                  (4 `op_Multiply` count))) /\
        label va_range1
          "***** POSTCONDITION NOT MET AT line 736 column 127 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
          (Vale.AES.GCTR.gctr_partial_def alg
              (4 `op_Multiply` count)
              (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_old) va_in_plain_b)
              (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_sM) va_in_out_b)
              va_in_key
              va_in_icb_BE) /\
        label va_range1
          "***** POSTCONDITION NOT MET AT line 586 column 1 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
          (~(va_get_reg64 rRdx va_sM > 0)))
in
assert_norm (va_qc.mods == va_mods);
va_lemma_norm_mods ([
      va_Mod_xmm 9; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3;
      va_Mod_xmm 2; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 10; va_Mod_xmm 1;
      va_Mod_reg64 rRdx; va_Mod_reg64 rR9; va_Mod_reg64 rR12; va_Mod_reg64 rR10; va_Mod_ok;
      va_Mod_mem; va_Mod_mem_heaplet 1; va_Mod_flags
    ])
  va_sM
  va_s0;
let count = va_g in
(va_sM, va_fM, count)
Vale.AES.X64.AESCTR.fst.checked
Vale.X64.State.fsti.checked Vale.X64.QuickCodes.fsti.checked Vale.X64.QuickCode.fst.checked Vale.X64.Memory.fsti.checked Vale.X64.Machine_s.fst.checked Vale.X64.InsVector.fsti.checked Vale.X64.InsMem.fsti.checked Vale.X64.InsBasic.fsti.checked Vale.X64.InsAes.fsti.checked Vale.X64.Flags.fsti.checked Vale.X64.Decls.fsti.checked Vale.X64.CPU_Features_s.fst.checked Vale.Poly1305.Math.fsti.checked Vale.Def.Words_s.fsti.checked Vale.Def.Types_s.fst.checked Vale.Def.Prop_s.fst.checked Vale.Def.Opaque_s.fsti.checked Vale.Arch.TypesNative.fsti.checked Vale.Arch.Types.fsti.checked Vale.Arch.HeapImpl.fsti.checked Vale.AES.X64.GHash.fsti.checked Vale.AES.GHash.fsti.checked Vale.AES.GCTR_s.fst.checked Vale.AES.GCTR.fsti.checked Vale.AES.GCM_helpers.fsti.checked Vale.AES.AES_s.fst.checked Vale.AES.AES_helpers.fsti.checked Vale.AES.AES_common_s.fst.checked prims.fst.checked FStar.Seq.Base.fsti.checked FStar.Seq.fst.checked FStar.Pervasives.Native.fst.checked FStar.Pervasives.fsti.checked
Vale.AES.X64.AESCTR.fst
Vale.X64.Decls.va_code Vale.X64.Decls.va_state Vale.AES.AES_common_s.algorithm Vale.X64.Decls.quad32 FStar.Seq.Base.seq Vale.X64.Memory.nat32 Vale.X64.Memory.buffer128 Prims.nat Vale.X64.QuickCodes.fuel FStar.Pervasives.Native.Mktuple3 Vale.X64.Decls.va_fuel Prims.unit Vale.X64.QuickCode.va_lemma_norm_mods Prims.Cons Vale.X64.QuickCode.mod_t Vale.X64.QuickCode.va_Mod_xmm Vale.X64.QuickCode.va_Mod_reg64 Vale.X64.Machine_s.rRdx Vale.X64.Machine_s.rR9 Vale.X64.Machine_s.rR12 Vale.X64.Machine_s.rR10 Vale.X64.QuickCode.va_Mod_ok Vale.X64.QuickCode.va_Mod_mem Vale.X64.QuickCode.va_Mod_mem_heaplet Vale.X64.QuickCode.va_Mod_flags Prims.Nil FStar.Pervasives.assert_norm Prims.eq2 Prims.list Vale.X64.QuickCode.__proj__QProc__item__mods Vale.AES.X64.AESCTR.va_code_Aes_counter_loop_while0 FStar.Pervasives.Native.tuple3 Vale.X64.State.vale_state Vale.X64.QuickCodes.va_wp_sound_code_norm Prims.l_and Vale.X64.QuickCodes.label Vale.X64.QuickCodes.va_range1 Prims.b2t Vale.X64.Decls.va_get_ok Vale.X64.CPU_Features_s.sse_enabled Prims.op_LessThan Vale.X64.Decls.va_get_reg64 Prims.op_Multiply Prims.op_Subtraction Vale.X64.Machine_s.pow2_32 Prims.op_LessThanOrEqual Prims.int Vale.X64.Decls.modifies_buffer128 Vale.X64.Decls.va_get_mem_heaplet Vale.X64.Decls.buffer128_as_seq Vale.X64.Decls.validSrcAddrs128 Vale.X64.Decls.va_get_mem_layout Vale.Arch.HeapTypes_s.Secret Vale.X64.Decls.validDstAddrs128 Prims.op_Addition Vale.X64.Machine_s.pow2_64 Vale.X64.Decls.buffer_length Vale.X64.Memory.vuint128 Vale.X64.Decls.buffers_disjoint128 Vale.Def.Words_s.four Vale.Def.Types_s.nat32 Vale.X64.Decls.va_get_xmm Vale.Def.Words_s.Mkfour Prims.l_imp Prims.op_GreaterThan Vale.Def.Words_s.__proj__Mkfour__item__hi2 Vale.Def.Types_s.reverse_bytes_nat32 Vale.Arch.Types.add_wrap32 Vale.Def.Words_s.__proj__Mkfour__item__lo0 Vale.AES.X64.AESCTR.aes_reqs Vale.X64.Machine_s.rR8 Vale.X64.CPU_Features_s.pclmulqdq_enabled Vale.Def.Types_s.quad32 Vale.Def.Types_s.reverse_bytes_quad32 Vale.Def.Words_s.nat64 Vale.X64.Machine_s.rRdi Vale.Arch.Types.lo64 FStar.Seq.Base.length FStar.Seq.Base.slice Vale.AES.GHash.ghash_incremental0 Vale.AES.GCTR.gctr_partial_def Prims.l_not Vale.X64.QuickCode.quickCode Vale.AES.X64.AESCTR.va_qcode_Aes_counter_loop_while0 Vale.X64.Decls.va_expand_state
module Vale.AES.X64.AESCTR
open Vale.Def.Prop_s
open Vale.Def.Opaque_s
open Vale.Def.Words_s
open Vale.Def.Types_s
open FStar.Seq
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.AES.AES_s
open Vale.X64.Machine_s
open Vale.X64.Memory
open Vale.X64.State
open Vale.X64.Decls
open Vale.X64.InsBasic
open Vale.X64.InsMem
open Vale.X64.InsVector
open Vale.X64.InsAes
open Vale.X64.QuickCode
open Vale.X64.QuickCodes
open Vale.AES.AES_helpers
open Vale.Poly1305.Math    // For lemma_poly_bits64()
open Vale.AES.GCM_helpers
open Vale.AES.GCTR_s
open Vale.AES.GCTR
open Vale.Arch.TypesNative
open Vale.AES.X64.GHash
open Vale.AES.GHash
open Vale.X64.CPU_Features_s
//-- finish_aes_encrypt_le


val finish_aes_encrypt_le : alg:algorithm -> input_LE:quad32 -> key:(seq nat32)
  -> Lemma
  (requires (Vale.AES.AES_s.is_aes_key_LE alg key))
  (ensures (Vale.AES.AES_s.aes_encrypt_LE alg key input_LE == Vale.AES.AES_s.eval_cipher alg
    input_LE (Vale.AES.AES_s.key_to_round_keys_LE alg key)))
let finish_aes_encrypt_le alg input_LE key =
  Vale.AES.AES_s.aes_encrypt_LE_reveal ();
  Vale.AES.AES_s.eval_cipher_reveal ();
  ()
//--
//-- Aes_round_4way

val va_code_Aes_round_4way : round_key:va_operand_xmm -> Tot va_code
[@ "opaque_to_smt"]
let va_code_Aes_round_4way round_key =
  (va_Block (va_CCons (va_code_AESNI_enc (va_op_xmm_xmm 2) round_key) (va_CCons (va_code_AESNI_enc
    (va_op_xmm_xmm 12) round_key) (va_CCons (va_code_AESNI_enc (va_op_xmm_xmm 13) round_key)
    (va_CCons (va_code_AESNI_enc (va_op_xmm_xmm 14) round_key) (va_CNil ()))))))

val va_codegen_success_Aes_round_4way : round_key:va_operand_xmm -> Tot va_pbool
[@ "opaque_to_smt"]
let va_codegen_success_Aes_round_4way round_key =
  (va_pbool_and (va_codegen_success_AESNI_enc (va_op_xmm_xmm 2) round_key) (va_pbool_and
    (va_codegen_success_AESNI_enc (va_op_xmm_xmm 12) round_key) (va_pbool_and
    (va_codegen_success_AESNI_enc (va_op_xmm_xmm 13) round_key) (va_pbool_and
    (va_codegen_success_AESNI_enc (va_op_xmm_xmm 14) round_key) (va_ttrue ())))))


val va_lemma_Aes_round_4way : va_b0:va_code -> va_s0:va_state -> alg:algorithm -> n:pos ->
  round_key:va_operand_xmm -> init1:quad32 -> init2:quad32 -> init3:quad32 -> init4:quad32 ->
  round_keys:(seq quad32)
  -> Ghost (va_state & va_fuel)
  (requires (va_require_total va_b0 (va_code_Aes_round_4way round_key) va_s0 /\ va_is_src_xmm
    round_key va_s0 /\ va_get_ok va_s0 /\ (aesni_enabled /\ (1 <= n /\ n < Vale.AES.AES_common_s.nr
    alg /\ Vale.AES.AES_common_s.nr alg <= FStar.Seq.Base.length #quad32 round_keys) /\ va_get_xmm
    2 va_s0 == Vale.AES.AES_s.eval_rounds init1 round_keys (n - 1) /\ va_get_xmm 12 va_s0 ==
    Vale.AES.AES_s.eval_rounds init2 round_keys (n - 1) /\ va_get_xmm 13 va_s0 ==
    Vale.AES.AES_s.eval_rounds init3 round_keys (n - 1) /\ va_get_xmm 14 va_s0 ==
    Vale.AES.AES_s.eval_rounds init4 round_keys (n - 1) /\ va_eval_xmm va_s0 round_key ==
    FStar.Seq.Base.index #quad32 round_keys n /\ 2 =!= round_key /\ 12 =!= round_key /\ 13 =!=
    round_key /\ 14 =!= round_key)))
  (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
    (va_get_xmm 2 va_sM == Vale.AES.AES_s.eval_rounds init1 round_keys n /\ va_get_xmm 12 va_sM ==
    Vale.AES.AES_s.eval_rounds init2 round_keys n /\ va_get_xmm 13 va_sM ==
    Vale.AES.AES_s.eval_rounds init3 round_keys n /\ va_get_xmm 14 va_sM ==
    Vale.AES.AES_s.eval_rounds init4 round_keys n) /\ va_state_eq va_sM (va_update_flags va_sM
    (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 2 va_sM
    (va_update_ok va_sM va_s0))))))))
[@"opaque_to_smt"]
let va_lemma_Aes_round_4way va_b0 va_s0 alg n round_key init1 init2 init3 init4 round_keys =
  va_reveal_opaque (`%va_code_Aes_round_4way) (va_code_Aes_round_4way round_key);
  let (va_old_s:va_state) = va_s0 in
  let (va_b1:va_codes) = va_get_block va_b0 in
  Vale.AES.AES_s.eval_rounds_reveal ();
  Vale.AES.AES_helpers.commute_sub_bytes_shift_rows_forall ();
  let (va_s8, va_fc8) = va_lemma_AESNI_enc (va_hd va_b1) va_s0 (va_op_xmm_xmm 2) round_key in
  let va_b8 = va_tl va_b1 in
  let (va_s9, va_fc9) = va_lemma_AESNI_enc (va_hd va_b8) va_s8 (va_op_xmm_xmm 12) round_key in
  let va_b9 = va_tl va_b8 in
  let (va_s10, va_fc10) = va_lemma_AESNI_enc (va_hd va_b9) va_s9 (va_op_xmm_xmm 13) round_key in
  let va_b10 = va_tl va_b9 in
  let (va_s11, va_fc11) = va_lemma_AESNI_enc (va_hd va_b10) va_s10 (va_op_xmm_xmm 14) round_key in
  let va_b11 = va_tl va_b10 in
  let (va_sM, va_f11) = va_lemma_empty_total va_s11 va_b11 in
  let va_f10 = va_lemma_merge_total va_b10 va_s10 va_fc11 va_s11 va_f11 va_sM in
  let va_f9 = va_lemma_merge_total va_b9 va_s9 va_fc10 va_s10 va_f10 va_sM in
  let va_f8 = va_lemma_merge_total va_b8 va_s8 va_fc9 va_s9 va_f9 va_sM in
  let va_fM = va_lemma_merge_total va_b1 va_s0 va_fc8 va_s8 va_f8 va_sM in
  (va_sM, va_fM)

[@ va_qattr]
let va_wp_Aes_round_4way (alg:algorithm) (n:pos) (round_key:va_operand_xmm) (init1:quad32)
  (init2:quad32) (init3:quad32) (init4:quad32) (round_keys:(seq quad32)) (va_s0:va_state)
  (va_k:(va_state -> unit -> Type0)) : Type0 =
  (va_is_src_xmm round_key va_s0 /\ va_get_ok va_s0 /\ (aesni_enabled /\ (1 <= n /\ n <
    Vale.AES.AES_common_s.nr alg /\ Vale.AES.AES_common_s.nr alg <= FStar.Seq.Base.length #quad32
    round_keys) /\ va_get_xmm 2 va_s0 == Vale.AES.AES_s.eval_rounds init1 round_keys (n - 1) /\
    va_get_xmm 12 va_s0 == Vale.AES.AES_s.eval_rounds init2 round_keys (n - 1) /\ va_get_xmm 13
    va_s0 == Vale.AES.AES_s.eval_rounds init3 round_keys (n - 1) /\ va_get_xmm 14 va_s0 ==
    Vale.AES.AES_s.eval_rounds init4 round_keys (n - 1) /\ va_eval_xmm va_s0 round_key ==
    FStar.Seq.Base.index #quad32 round_keys n /\ 2 =!= round_key /\ 12 =!= round_key /\ 13 =!=
    round_key /\ 14 =!= round_key) /\ (forall (va_x_xmm2:quad32) (va_x_xmm12:quad32)
    (va_x_xmm13:quad32) (va_x_xmm14:quad32) (va_x_efl:Vale.X64.Flags.t) . let va_sM = va_upd_flags
    va_x_efl (va_upd_xmm 14 va_x_xmm14 (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12
    (va_upd_xmm 2 va_x_xmm2 va_s0)))) in va_get_ok va_sM /\ (va_get_xmm 2 va_sM ==
    Vale.AES.AES_s.eval_rounds init1 round_keys n /\ va_get_xmm 12 va_sM ==
    Vale.AES.AES_s.eval_rounds init2 round_keys n /\ va_get_xmm 13 va_sM ==
    Vale.AES.AES_s.eval_rounds init3 round_keys n /\ va_get_xmm 14 va_sM ==
    Vale.AES.AES_s.eval_rounds init4 round_keys n) ==> va_k va_sM (())))


val va_wpProof_Aes_round_4way : alg:algorithm -> n:pos -> round_key:va_operand_xmm -> init1:quad32
  -> init2:quad32 -> init3:quad32 -> init4:quad32 -> round_keys:(seq quad32) -> va_s0:va_state ->
  va_k:(va_state -> unit -> Type0)
  -> Ghost (va_state & va_fuel & unit)
  (requires (va_t_require va_s0 /\ va_wp_Aes_round_4way alg n round_key init1 init2 init3 init4
    round_keys va_s0 va_k))
  (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Aes_round_4way round_key)
    ([va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 2]) va_s0 va_k ((va_sM,
    va_f0, va_g))))
[@"opaque_to_smt"]
let va_wpProof_Aes_round_4way alg n round_key init1 init2 init3 init4 round_keys va_s0 va_k =
  let (va_sM, va_f0) = va_lemma_Aes_round_4way (va_code_Aes_round_4way round_key) va_s0 alg n
    round_key init1 init2 init3 init4 round_keys in
  va_lemma_upd_update va_sM;
  assert (va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM
    (va_update_xmm 12 va_sM (va_update_xmm 2 va_sM (va_update_ok va_sM va_s0)))))));
  va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 2])
    va_sM va_s0;
  let va_g = () in
  (va_sM, va_f0, va_g)

[@ "opaque_to_smt" va_qattr]
let va_quick_Aes_round_4way (alg:algorithm) (n:pos) (round_key:va_operand_xmm) (init1:quad32)
  (init2:quad32) (init3:quad32) (init4:quad32) (round_keys:(seq quad32)) : (va_quickCode unit
  (va_code_Aes_round_4way round_key)) =
  (va_QProc (va_code_Aes_round_4way round_key) ([va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13;
    va_Mod_xmm 12; va_Mod_xmm 2]) (va_wp_Aes_round_4way alg n round_key init1 init2 init3 init4
    round_keys) (va_wpProof_Aes_round_4way alg n round_key init1 init2 init3 init4 round_keys))
//--
//-- Aes_2rounds_4way

val va_code_Aes_2rounds_4way : va_dummy:unit -> Tot va_code
[@ "opaque_to_smt" va_qattr]
let va_code_Aes_2rounds_4way () =
  (va_Block (va_CCons (va_code_Aes_round_4way (va_op_xmm_xmm 3)) (va_CCons (va_code_Aes_round_4way
    (va_op_xmm_xmm 4)) (va_CNil ()))))

val va_codegen_success_Aes_2rounds_4way : va_dummy:unit -> Tot va_pbool
[@ "opaque_to_smt" va_qattr]
let va_codegen_success_Aes_2rounds_4way () =
  (va_pbool_and (va_codegen_success_Aes_round_4way (va_op_xmm_xmm 3)) (va_pbool_and
    (va_codegen_success_Aes_round_4way (va_op_xmm_xmm 4)) (va_ttrue ())))

[@ "opaque_to_smt" va_qattr]
let va_qcode_Aes_2rounds_4way (va_mods:va_mods_t) (alg:algorithm) (n:pos) (init1:quad32)
  (init2:quad32) (init3:quad32) (init4:quad32) (round_keys:(seq quad32)) : (va_quickCode unit
  (va_code_Aes_2rounds_4way ())) =
  (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 162 column 19 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Aes_round_4way alg n (va_op_xmm_xmm 3) init1 init2 init3 init4 round_keys) (va_QSeq
    va_range1
    "***** PRECONDITION NOT MET AT line 163 column 19 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Aes_round_4way alg (n + 1) (va_op_xmm_xmm 4) init1 init2 init3 init4 round_keys)
    (va_QEmpty (())))))


val va_lemma_Aes_2rounds_4way : va_b0:va_code -> va_s0:va_state -> alg:algorithm -> n:pos ->
  init1:quad32 -> init2:quad32 -> init3:quad32 -> init4:quad32 -> round_keys:(seq quad32)
  -> Ghost (va_state & va_fuel)
  (requires (va_require_total va_b0 (va_code_Aes_2rounds_4way ()) va_s0 /\ va_get_ok va_s0 /\
    (aesni_enabled /\ (1 <= n /\ n < Vale.AES.AES_common_s.nr alg - 1 /\ Vale.AES.AES_common_s.nr
    alg <= FStar.Seq.Base.length #quad32 round_keys) /\ va_get_xmm 2 va_s0 ==
    Vale.AES.AES_s.eval_rounds init1 round_keys (n - 1) /\ va_get_xmm 12 va_s0 ==
    Vale.AES.AES_s.eval_rounds init2 round_keys (n - 1) /\ va_get_xmm 13 va_s0 ==
    Vale.AES.AES_s.eval_rounds init3 round_keys (n - 1) /\ va_get_xmm 14 va_s0 ==
    Vale.AES.AES_s.eval_rounds init4 round_keys (n - 1) /\ va_get_xmm 3 va_s0 ==
    FStar.Seq.Base.index #quad32 round_keys n /\ va_get_xmm 4 va_s0 == FStar.Seq.Base.index #quad32
    round_keys (n + 1))))
  (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
    (va_get_xmm 2 va_sM == Vale.AES.AES_s.eval_rounds init1 round_keys (n + 1) /\ va_get_xmm 12
    va_sM == Vale.AES.AES_s.eval_rounds init2 round_keys (n + 1) /\ va_get_xmm 13 va_sM ==
    Vale.AES.AES_s.eval_rounds init3 round_keys (n + 1) /\ va_get_xmm 14 va_sM ==
    Vale.AES.AES_s.eval_rounds init4 round_keys (n + 1)) /\ va_state_eq va_sM (va_update_flags
    va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 2
    va_sM (va_update_ok va_sM va_s0))))))))
[@"opaque_to_smt"]
let va_lemma_Aes_2rounds_4way va_b0 va_s0 alg n init1 init2 init3 init4 round_keys =
  let (va_mods:va_mods_t) = [va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm
    2; va_Mod_ok] in
  let va_qc = va_qcode_Aes_2rounds_4way va_mods alg n init1 init2 init3 init4 round_keys in
  let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Aes_2rounds_4way ()) va_qc va_s0 (fun
    va_s0 va_sM va_g -> let () = va_g in label va_range1
    "***** POSTCONDITION NOT MET AT line 130 column 1 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_ok va_sM) /\ (label va_range1
    "***** POSTCONDITION NOT MET AT line 157 column 54 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 2 va_sM == Vale.AES.AES_s.eval_rounds init1 round_keys (n + 1)) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 158 column 54 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 12 va_sM == Vale.AES.AES_s.eval_rounds init2 round_keys (n + 1)) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 159 column 54 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 13 va_sM == Vale.AES.AES_s.eval_rounds init3 round_keys (n + 1)) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 160 column 54 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 14 va_sM == Vale.AES.AES_s.eval_rounds init4 round_keys (n + 1)))) in
  assert_norm (va_qc.mods == va_mods);
  va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 2;
    va_Mod_ok]) va_sM va_s0;
  (va_sM, va_fM)

[@ va_qattr]
let va_wp_Aes_2rounds_4way (alg:algorithm) (n:pos) (init1:quad32) (init2:quad32) (init3:quad32)
  (init4:quad32) (round_keys:(seq quad32)) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
  Type0 =
  (va_get_ok va_s0 /\ (aesni_enabled /\ (1 <= n /\ n < Vale.AES.AES_common_s.nr alg - 1 /\
    Vale.AES.AES_common_s.nr alg <= FStar.Seq.Base.length #quad32 round_keys) /\ va_get_xmm 2 va_s0
    == Vale.AES.AES_s.eval_rounds init1 round_keys (n - 1) /\ va_get_xmm 12 va_s0 ==
    Vale.AES.AES_s.eval_rounds init2 round_keys (n - 1) /\ va_get_xmm 13 va_s0 ==
    Vale.AES.AES_s.eval_rounds init3 round_keys (n - 1) /\ va_get_xmm 14 va_s0 ==
    Vale.AES.AES_s.eval_rounds init4 round_keys (n - 1) /\ va_get_xmm 3 va_s0 ==
    FStar.Seq.Base.index #quad32 round_keys n /\ va_get_xmm 4 va_s0 == FStar.Seq.Base.index #quad32
    round_keys (n + 1)) /\ (forall (va_x_xmm2:quad32) (va_x_xmm12:quad32) (va_x_xmm13:quad32)
    (va_x_xmm14:quad32) (va_x_efl:Vale.X64.Flags.t) . let va_sM = va_upd_flags va_x_efl (va_upd_xmm
    14 va_x_xmm14 (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12 (va_upd_xmm 2 va_x_xmm2
    va_s0)))) in va_get_ok va_sM /\ (va_get_xmm 2 va_sM == Vale.AES.AES_s.eval_rounds init1
    round_keys (n + 1) /\ va_get_xmm 12 va_sM == Vale.AES.AES_s.eval_rounds init2 round_keys (n +
    1) /\ va_get_xmm 13 va_sM == Vale.AES.AES_s.eval_rounds init3 round_keys (n + 1) /\ va_get_xmm
    14 va_sM == Vale.AES.AES_s.eval_rounds init4 round_keys (n + 1)) ==> va_k va_sM (())))


val va_wpProof_Aes_2rounds_4way : alg:algorithm -> n:pos -> init1:quad32 -> init2:quad32 ->
  init3:quad32 -> init4:quad32 -> round_keys:(seq quad32) -> va_s0:va_state -> va_k:(va_state ->
  unit -> Type0)
  -> Ghost (va_state & va_fuel & unit)
  (requires (va_t_require va_s0 /\ va_wp_Aes_2rounds_4way alg n init1 init2 init3 init4 round_keys
    va_s0 va_k))
  (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Aes_2rounds_4way ()) ([va_Mod_flags;
    va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 2]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@"opaque_to_smt"]
let va_wpProof_Aes_2rounds_4way alg n init1 init2 init3 init4 round_keys va_s0 va_k =
  let (va_sM, va_f0) = va_lemma_Aes_2rounds_4way (va_code_Aes_2rounds_4way ()) va_s0 alg n init1
    init2 init3 init4 round_keys in
  va_lemma_upd_update va_sM;
  assert (va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM
    (va_update_xmm 12 va_sM (va_update_xmm 2 va_sM (va_update_ok va_sM va_s0)))))));
  va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 2])
    va_sM va_s0;
  let va_g = () in
  (va_sM, va_f0, va_g)

[@ "opaque_to_smt" va_qattr]
let va_quick_Aes_2rounds_4way (alg:algorithm) (n:pos) (init1:quad32) (init2:quad32) (init3:quad32)
  (init4:quad32) (round_keys:(seq quad32)) : (va_quickCode unit (va_code_Aes_2rounds_4way ())) =
  (va_QProc (va_code_Aes_2rounds_4way ()) ([va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm
    12; va_Mod_xmm 2]) (va_wp_Aes_2rounds_4way alg n init1 init2 init3 init4 round_keys)
    (va_wpProof_Aes_2rounds_4way alg n init1 init2 init3 init4 round_keys))
//--
//-- Aes_3rounds_4way

val va_code_Aes_3rounds_4way : va_dummy:unit -> Tot va_code
[@ "opaque_to_smt" va_qattr]
let va_code_Aes_3rounds_4way () =
  (va_Block (va_CCons (va_code_Aes_round_4way (va_op_xmm_xmm 4)) (va_CCons (va_code_Aes_round_4way
    (va_op_xmm_xmm 5)) (va_CCons (va_code_Aes_round_4way (va_op_xmm_xmm 6)) (va_CNil ())))))

val va_codegen_success_Aes_3rounds_4way : va_dummy:unit -> Tot va_pbool
[@ "opaque_to_smt" va_qattr]
let va_codegen_success_Aes_3rounds_4way () =
  (va_pbool_and (va_codegen_success_Aes_round_4way (va_op_xmm_xmm 4)) (va_pbool_and
    (va_codegen_success_Aes_round_4way (va_op_xmm_xmm 5)) (va_pbool_and
    (va_codegen_success_Aes_round_4way (va_op_xmm_xmm 6)) (va_ttrue ()))))

[@ "opaque_to_smt" va_qattr]
let va_qcode_Aes_3rounds_4way (va_mods:va_mods_t) (alg:algorithm) (n:pos) (init1:quad32)
  (init2:quad32) (init3:quad32) (init4:quad32) (round_keys:(seq quad32)) : (va_quickCode unit
  (va_code_Aes_3rounds_4way ())) =
  (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 199 column 19 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Aes_round_4way alg (n + 0) (va_op_xmm_xmm 4) init1 init2 init3 init4 round_keys)
    (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 200 column 19 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Aes_round_4way alg (n + 1) (va_op_xmm_xmm 5) init1 init2 init3 init4 round_keys)
    (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 201 column 19 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Aes_round_4way alg (n + 2) (va_op_xmm_xmm 6) init1 init2 init3 init4 round_keys)
    (va_QEmpty (()))))))


val va_lemma_Aes_3rounds_4way : va_b0:va_code -> va_s0:va_state -> alg:algorithm -> n:pos ->
  init1:quad32 -> init2:quad32 -> init3:quad32 -> init4:quad32 -> round_keys:(seq quad32)
  -> Ghost (va_state & va_fuel)
  (requires (va_require_total va_b0 (va_code_Aes_3rounds_4way ()) va_s0 /\ va_get_ok va_s0 /\
    (aesni_enabled /\ (1 <= n /\ n < Vale.AES.AES_common_s.nr alg - 2 /\ Vale.AES.AES_common_s.nr
    alg <= FStar.Seq.Base.length #quad32 round_keys) /\ va_get_xmm 2 va_s0 ==
    Vale.AES.AES_s.eval_rounds init1 round_keys (n - 1) /\ va_get_xmm 12 va_s0 ==
    Vale.AES.AES_s.eval_rounds init2 round_keys (n - 1) /\ va_get_xmm 13 va_s0 ==
    Vale.AES.AES_s.eval_rounds init3 round_keys (n - 1) /\ va_get_xmm 14 va_s0 ==
    Vale.AES.AES_s.eval_rounds init4 round_keys (n - 1) /\ va_get_xmm 4 va_s0 ==
    FStar.Seq.Base.index #quad32 round_keys (n + 0) /\ va_get_xmm 5 va_s0 == FStar.Seq.Base.index
    #quad32 round_keys (n + 1) /\ va_get_xmm 6 va_s0 == FStar.Seq.Base.index #quad32 round_keys (n
    + 2))))
  (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
    (va_get_xmm 2 va_sM == Vale.AES.AES_s.eval_rounds init1 round_keys (n + 2) /\ va_get_xmm 12
    va_sM == Vale.AES.AES_s.eval_rounds init2 round_keys (n + 2) /\ va_get_xmm 13 va_sM ==
    Vale.AES.AES_s.eval_rounds init3 round_keys (n + 2) /\ va_get_xmm 14 va_sM ==
    Vale.AES.AES_s.eval_rounds init4 round_keys (n + 2)) /\ va_state_eq va_sM (va_update_flags
    va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 2
    va_sM (va_update_ok va_sM va_s0))))))))
[@"opaque_to_smt"]
let va_lemma_Aes_3rounds_4way va_b0 va_s0 alg n init1 init2 init3 init4 round_keys =
  let (va_mods:va_mods_t) = [va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm
    2; va_Mod_ok] in
  let va_qc = va_qcode_Aes_3rounds_4way va_mods alg n init1 init2 init3 init4 round_keys in
  let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Aes_3rounds_4way ()) va_qc va_s0 (fun
    va_s0 va_sM va_g -> let () = va_g in label va_range1
    "***** POSTCONDITION NOT MET AT line 166 column 1 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_ok va_sM) /\ (label va_range1
    "***** POSTCONDITION NOT MET AT line 194 column 54 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 2 va_sM == Vale.AES.AES_s.eval_rounds init1 round_keys (n + 2)) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 195 column 54 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 12 va_sM == Vale.AES.AES_s.eval_rounds init2 round_keys (n + 2)) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 196 column 54 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 13 va_sM == Vale.AES.AES_s.eval_rounds init3 round_keys (n + 2)) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 197 column 54 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 14 va_sM == Vale.AES.AES_s.eval_rounds init4 round_keys (n + 2)))) in
  assert_norm (va_qc.mods == va_mods);
  va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 2;
    va_Mod_ok]) va_sM va_s0;
  (va_sM, va_fM)

[@ va_qattr]
let va_wp_Aes_3rounds_4way (alg:algorithm) (n:pos) (init1:quad32) (init2:quad32) (init3:quad32)
  (init4:quad32) (round_keys:(seq quad32)) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
  Type0 =
  (va_get_ok va_s0 /\ (aesni_enabled /\ (1 <= n /\ n < Vale.AES.AES_common_s.nr alg - 2 /\
    Vale.AES.AES_common_s.nr alg <= FStar.Seq.Base.length #quad32 round_keys) /\ va_get_xmm 2 va_s0
    == Vale.AES.AES_s.eval_rounds init1 round_keys (n - 1) /\ va_get_xmm 12 va_s0 ==
    Vale.AES.AES_s.eval_rounds init2 round_keys (n - 1) /\ va_get_xmm 13 va_s0 ==
    Vale.AES.AES_s.eval_rounds init3 round_keys (n - 1) /\ va_get_xmm 14 va_s0 ==
    Vale.AES.AES_s.eval_rounds init4 round_keys (n - 1) /\ va_get_xmm 4 va_s0 ==
    FStar.Seq.Base.index #quad32 round_keys (n + 0) /\ va_get_xmm 5 va_s0 == FStar.Seq.Base.index
    #quad32 round_keys (n + 1) /\ va_get_xmm 6 va_s0 == FStar.Seq.Base.index #quad32 round_keys (n
    + 2)) /\ (forall (va_x_xmm2:quad32) (va_x_xmm12:quad32) (va_x_xmm13:quad32) (va_x_xmm14:quad32)
    (va_x_efl:Vale.X64.Flags.t) . let va_sM = va_upd_flags va_x_efl (va_upd_xmm 14 va_x_xmm14
    (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12 (va_upd_xmm 2 va_x_xmm2 va_s0)))) in
    va_get_ok va_sM /\ (va_get_xmm 2 va_sM == Vale.AES.AES_s.eval_rounds init1 round_keys (n + 2)
    /\ va_get_xmm 12 va_sM == Vale.AES.AES_s.eval_rounds init2 round_keys (n + 2) /\ va_get_xmm 13
    va_sM == Vale.AES.AES_s.eval_rounds init3 round_keys (n + 2) /\ va_get_xmm 14 va_sM ==
    Vale.AES.AES_s.eval_rounds init4 round_keys (n + 2)) ==> va_k va_sM (())))


val va_wpProof_Aes_3rounds_4way : alg:algorithm -> n:pos -> init1:quad32 -> init2:quad32 ->
  init3:quad32 -> init4:quad32 -> round_keys:(seq quad32) -> va_s0:va_state -> va_k:(va_state ->
  unit -> Type0)
  -> Ghost (va_state & va_fuel & unit)
  (requires (va_t_require va_s0 /\ va_wp_Aes_3rounds_4way alg n init1 init2 init3 init4 round_keys
    va_s0 va_k))
  (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Aes_3rounds_4way ()) ([va_Mod_flags;
    va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 2]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@"opaque_to_smt"]
let va_wpProof_Aes_3rounds_4way alg n init1 init2 init3 init4 round_keys va_s0 va_k =
  let (va_sM, va_f0) = va_lemma_Aes_3rounds_4way (va_code_Aes_3rounds_4way ()) va_s0 alg n init1
    init2 init3 init4 round_keys in
  va_lemma_upd_update va_sM;
  assert (va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM
    (va_update_xmm 12 va_sM (va_update_xmm 2 va_sM (va_update_ok va_sM va_s0)))))));
  va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 2])
    va_sM va_s0;
  let va_g = () in
  (va_sM, va_f0, va_g)

[@ "opaque_to_smt" va_qattr]
let va_quick_Aes_3rounds_4way (alg:algorithm) (n:pos) (init1:quad32) (init2:quad32) (init3:quad32)
  (init4:quad32) (round_keys:(seq quad32)) : (va_quickCode unit (va_code_Aes_3rounds_4way ())) =
  (va_QProc (va_code_Aes_3rounds_4way ()) ([va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm
    12; va_Mod_xmm 2]) (va_wp_Aes_3rounds_4way alg n init1 init2 init3 init4 round_keys)
    (va_wpProof_Aes_3rounds_4way alg n init1 init2 init3 init4 round_keys))
//--
//-- Aes_4rounds_4way

val va_code_Aes_4rounds_4way : va_dummy:unit -> Tot va_code
[@ "opaque_to_smt" va_qattr]
let va_code_Aes_4rounds_4way () =
  (va_Block (va_CCons (va_code_Aes_round_4way (va_op_xmm_xmm 3)) (va_CCons (va_code_Aes_round_4way
    (va_op_xmm_xmm 4)) (va_CCons (va_code_Aes_round_4way (va_op_xmm_xmm 5)) (va_CCons
    (va_code_Aes_round_4way (va_op_xmm_xmm 6)) (va_CNil ()))))))

val va_codegen_success_Aes_4rounds_4way : va_dummy:unit -> Tot va_pbool
[@ "opaque_to_smt" va_qattr]
let va_codegen_success_Aes_4rounds_4way () =
  (va_pbool_and (va_codegen_success_Aes_round_4way (va_op_xmm_xmm 3)) (va_pbool_and
    (va_codegen_success_Aes_round_4way (va_op_xmm_xmm 4)) (va_pbool_and
    (va_codegen_success_Aes_round_4way (va_op_xmm_xmm 5)) (va_pbool_and
    (va_codegen_success_Aes_round_4way (va_op_xmm_xmm 6)) (va_ttrue ())))))

[@ "opaque_to_smt" va_qattr]
let va_qcode_Aes_4rounds_4way (va_mods:va_mods_t) (alg:algorithm) (n:pos) (init1:quad32)
  (init2:quad32) (init3:quad32) (init4:quad32) (round_keys:(seq quad32)) : (va_quickCode unit
  (va_code_Aes_4rounds_4way ())) =
  (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 238 column 19 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Aes_round_4way alg n (va_op_xmm_xmm 3) init1 init2 init3 init4 round_keys) (va_QSeq
    va_range1
    "***** PRECONDITION NOT MET AT line 239 column 19 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Aes_round_4way alg (n + 1) (va_op_xmm_xmm 4) init1 init2 init3 init4 round_keys)
    (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 240 column 19 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Aes_round_4way alg (n + 2) (va_op_xmm_xmm 5) init1 init2 init3 init4 round_keys)
    (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 241 column 19 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Aes_round_4way alg (n + 3) (va_op_xmm_xmm 6) init1 init2 init3 init4 round_keys)
    (va_QEmpty (())))))))


val va_lemma_Aes_4rounds_4way : va_b0:va_code -> va_s0:va_state -> alg:algorithm -> n:pos ->
  init1:quad32 -> init2:quad32 -> init3:quad32 -> init4:quad32 -> round_keys:(seq quad32)
  -> Ghost (va_state & va_fuel)
  (requires (va_require_total va_b0 (va_code_Aes_4rounds_4way ()) va_s0 /\ va_get_ok va_s0 /\
    (aesni_enabled /\ (1 <= n /\ n < Vale.AES.AES_common_s.nr alg - 3 /\ Vale.AES.AES_common_s.nr
    alg <= FStar.Seq.Base.length #quad32 round_keys) /\ va_get_xmm 2 va_s0 ==
    Vale.AES.AES_s.eval_rounds init1 round_keys (n - 1) /\ va_get_xmm 12 va_s0 ==
    Vale.AES.AES_s.eval_rounds init2 round_keys (n - 1) /\ va_get_xmm 13 va_s0 ==
    Vale.AES.AES_s.eval_rounds init3 round_keys (n - 1) /\ va_get_xmm 14 va_s0 ==
    Vale.AES.AES_s.eval_rounds init4 round_keys (n - 1) /\ va_get_xmm 3 va_s0 ==
    FStar.Seq.Base.index #quad32 round_keys n /\ va_get_xmm 4 va_s0 == FStar.Seq.Base.index #quad32
    round_keys (n + 1) /\ va_get_xmm 5 va_s0 == FStar.Seq.Base.index #quad32 round_keys (n + 2) /\
    va_get_xmm 6 va_s0 == FStar.Seq.Base.index #quad32 round_keys (n + 3))))
  (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
    (va_get_xmm 2 va_sM == Vale.AES.AES_s.eval_rounds init1 round_keys (n + 3) /\ va_get_xmm 12
    va_sM == Vale.AES.AES_s.eval_rounds init2 round_keys (n + 3) /\ va_get_xmm 13 va_sM ==
    Vale.AES.AES_s.eval_rounds init3 round_keys (n + 3) /\ va_get_xmm 14 va_sM ==
    Vale.AES.AES_s.eval_rounds init4 round_keys (n + 3)) /\ va_state_eq va_sM (va_update_flags
    va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 2
    va_sM (va_update_ok va_sM va_s0))))))))
[@"opaque_to_smt"]
let va_lemma_Aes_4rounds_4way va_b0 va_s0 alg n init1 init2 init3 init4 round_keys =
  let (va_mods:va_mods_t) = [va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm
    2; va_Mod_ok] in
  let va_qc = va_qcode_Aes_4rounds_4way va_mods alg n init1 init2 init3 init4 round_keys in
  let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Aes_4rounds_4way ()) va_qc va_s0 (fun
    va_s0 va_sM va_g -> let () = va_g in label va_range1
    "***** POSTCONDITION NOT MET AT line 204 column 1 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_ok va_sM) /\ (label va_range1
    "***** POSTCONDITION NOT MET AT line 233 column 54 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 2 va_sM == Vale.AES.AES_s.eval_rounds init1 round_keys (n + 3)) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 234 column 54 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 12 va_sM == Vale.AES.AES_s.eval_rounds init2 round_keys (n + 3)) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 235 column 54 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 13 va_sM == Vale.AES.AES_s.eval_rounds init3 round_keys (n + 3)) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 236 column 54 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 14 va_sM == Vale.AES.AES_s.eval_rounds init4 round_keys (n + 3)))) in
  assert_norm (va_qc.mods == va_mods);
  va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 2;
    va_Mod_ok]) va_sM va_s0;
  (va_sM, va_fM)

[@ va_qattr]
let va_wp_Aes_4rounds_4way (alg:algorithm) (n:pos) (init1:quad32) (init2:quad32) (init3:quad32)
  (init4:quad32) (round_keys:(seq quad32)) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) :
  Type0 =
  (va_get_ok va_s0 /\ (aesni_enabled /\ (1 <= n /\ n < Vale.AES.AES_common_s.nr alg - 3 /\
    Vale.AES.AES_common_s.nr alg <= FStar.Seq.Base.length #quad32 round_keys) /\ va_get_xmm 2 va_s0
    == Vale.AES.AES_s.eval_rounds init1 round_keys (n - 1) /\ va_get_xmm 12 va_s0 ==
    Vale.AES.AES_s.eval_rounds init2 round_keys (n - 1) /\ va_get_xmm 13 va_s0 ==
    Vale.AES.AES_s.eval_rounds init3 round_keys (n - 1) /\ va_get_xmm 14 va_s0 ==
    Vale.AES.AES_s.eval_rounds init4 round_keys (n - 1) /\ va_get_xmm 3 va_s0 ==
    FStar.Seq.Base.index #quad32 round_keys n /\ va_get_xmm 4 va_s0 == FStar.Seq.Base.index #quad32
    round_keys (n + 1) /\ va_get_xmm 5 va_s0 == FStar.Seq.Base.index #quad32 round_keys (n + 2) /\
    va_get_xmm 6 va_s0 == FStar.Seq.Base.index #quad32 round_keys (n + 3)) /\ (forall
    (va_x_xmm2:quad32) (va_x_xmm12:quad32) (va_x_xmm13:quad32) (va_x_xmm14:quad32)
    (va_x_efl:Vale.X64.Flags.t) . let va_sM = va_upd_flags va_x_efl (va_upd_xmm 14 va_x_xmm14
    (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12 (va_upd_xmm 2 va_x_xmm2 va_s0)))) in
    va_get_ok va_sM /\ (va_get_xmm 2 va_sM == Vale.AES.AES_s.eval_rounds init1 round_keys (n + 3)
    /\ va_get_xmm 12 va_sM == Vale.AES.AES_s.eval_rounds init2 round_keys (n + 3) /\ va_get_xmm 13
    va_sM == Vale.AES.AES_s.eval_rounds init3 round_keys (n + 3) /\ va_get_xmm 14 va_sM ==
    Vale.AES.AES_s.eval_rounds init4 round_keys (n + 3)) ==> va_k va_sM (())))


val va_wpProof_Aes_4rounds_4way : alg:algorithm -> n:pos -> init1:quad32 -> init2:quad32 ->
  init3:quad32 -> init4:quad32 -> round_keys:(seq quad32) -> va_s0:va_state -> va_k:(va_state ->
  unit -> Type0)
  -> Ghost (va_state & va_fuel & unit)
  (requires (va_t_require va_s0 /\ va_wp_Aes_4rounds_4way alg n init1 init2 init3 init4 round_keys
    va_s0 va_k))
  (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Aes_4rounds_4way ()) ([va_Mod_flags;
    va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 2]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@"opaque_to_smt"]
let va_wpProof_Aes_4rounds_4way alg n init1 init2 init3 init4 round_keys va_s0 va_k =
  let (va_sM, va_f0) = va_lemma_Aes_4rounds_4way (va_code_Aes_4rounds_4way ()) va_s0 alg n init1
    init2 init3 init4 round_keys in
  va_lemma_upd_update va_sM;
  assert (va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM
    (va_update_xmm 12 va_sM (va_update_xmm 2 va_sM (va_update_ok va_sM va_s0)))))));
  va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 2])
    va_sM va_s0;
  let va_g = () in
  (va_sM, va_f0, va_g)

[@ "opaque_to_smt" va_qattr]
let va_quick_Aes_4rounds_4way (alg:algorithm) (n:pos) (init1:quad32) (init2:quad32) (init3:quad32)
  (init4:quad32) (round_keys:(seq quad32)) : (va_quickCode unit (va_code_Aes_4rounds_4way ())) =
  (va_QProc (va_code_Aes_4rounds_4way ()) ([va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm
    12; va_Mod_xmm 2]) (va_wp_Aes_4rounds_4way alg n init1 init2 init3 init4 round_keys)
    (va_wpProof_Aes_4rounds_4way alg n init1 init2 init3 init4 round_keys))
//--
//-- Aes_ctr_encrypt

[@ "opaque_to_smt" va_qattr]
let va_code_Aes_ctr_encrypt alg =
  (va_Block (va_CCons (va_code_Aes_3rounds_4way ()) (va_CCons (va_code_Load128_buffer
    (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 3) (va_op_reg_opr64_reg64 rR8) 64 Secret)
    (va_CCons (va_code_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 4)
    (va_op_reg_opr64_reg64 rR8) 80 Secret) (va_CCons (va_code_Load128_buffer
    (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 5) (va_op_reg_opr64_reg64 rR8) 96 Secret)
    (va_CCons (va_code_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 6)
    (va_op_reg_opr64_reg64 rR8) 112 Secret) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_Block
    (va_CNil ())) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_Block (va_CNil ())) (va_CCons
    (va_code_Aes_4rounds_4way ()) (va_CCons (va_code_Load128_buffer (va_op_heaplet_mem_heaplet 0)
    (va_op_xmm_xmm 3) (va_op_reg_opr64_reg64 rR8) 128 Secret) (va_CCons (va_code_Load128_buffer
    (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 4) (va_op_reg_opr64_reg64 rR8) 144 Secret)
    (va_CCons (va_code_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 5)
    (va_op_reg_opr64_reg64 rR8) 160 Secret) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_Block
    (va_CNil ())) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_code_Aes_2rounds_4way ())
    (va_CCons (if (alg = AES_256) then va_Block (va_CCons (va_code_Mov128 (va_op_xmm_xmm 3)
    (va_op_xmm_xmm 5)) (va_CCons (va_code_Load128_buffer (va_op_heaplet_mem_heaplet 0)
    (va_op_xmm_xmm 4) (va_op_reg_opr64_reg64 rR8) 176 Secret) (va_CCons (va_code_Load128_buffer
    (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 5) (va_op_reg_opr64_reg64 rR8) 192 Secret)
    (va_CCons (va_code_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 6)
    (va_op_reg_opr64_reg64 rR8) 208 Secret) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_Block
    (va_CNil ())) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_Block (va_CNil ())) (va_CCons
    (va_code_Aes_4rounds_4way ()) (va_CCons (va_code_Load128_buffer (va_op_heaplet_mem_heaplet 0)
    (va_op_xmm_xmm 5) (va_op_reg_opr64_reg64 rR8) 224 Secret) (va_CCons (va_Block (va_CNil ()))
    (va_CNil ())))))))))))) else va_Block (va_CNil ())) (va_CCons (va_code_AESNI_enc_last
    (va_op_xmm_xmm 2) (va_op_xmm_xmm 5)) (va_CCons (va_code_AESNI_enc_last (va_op_xmm_xmm 12)
    (va_op_xmm_xmm 5)) (va_CCons (va_code_AESNI_enc_last (va_op_xmm_xmm 13) (va_op_xmm_xmm 5))
    (va_CCons (va_code_AESNI_enc_last (va_op_xmm_xmm 14) (va_op_xmm_xmm 5)) (va_CNil
    ()))))))))))))))))))))))))

[@ "opaque_to_smt" va_qattr]
let va_codegen_success_Aes_ctr_encrypt alg =
  (va_pbool_and (va_codegen_success_Aes_3rounds_4way ()) (va_pbool_and
    (va_codegen_success_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 3)
    (va_op_reg_opr64_reg64 rR8) 64 Secret) (va_pbool_and (va_codegen_success_Load128_buffer
    (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 4) (va_op_reg_opr64_reg64 rR8) 80 Secret)
    (va_pbool_and (va_codegen_success_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm
    5) (va_op_reg_opr64_reg64 rR8) 96 Secret) (va_pbool_and (va_codegen_success_Load128_buffer
    (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 6) (va_op_reg_opr64_reg64 rR8) 112 Secret)
    (va_pbool_and (va_codegen_success_Aes_4rounds_4way ()) (va_pbool_and
    (va_codegen_success_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 3)
    (va_op_reg_opr64_reg64 rR8) 128 Secret) (va_pbool_and (va_codegen_success_Load128_buffer
    (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 4) (va_op_reg_opr64_reg64 rR8) 144 Secret)
    (va_pbool_and (va_codegen_success_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm
    5) (va_op_reg_opr64_reg64 rR8) 160 Secret) (va_pbool_and (va_codegen_success_Aes_2rounds_4way
    ()) (va_pbool_and (if (alg = AES_256) then va_pbool_and (va_codegen_success_Mov128
    (va_op_xmm_xmm 3) (va_op_xmm_xmm 5)) (va_pbool_and (va_codegen_success_Load128_buffer
    (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 4) (va_op_reg_opr64_reg64 rR8) 176 Secret)
    (va_pbool_and (va_codegen_success_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm
    5) (va_op_reg_opr64_reg64 rR8) 192 Secret) (va_pbool_and (va_codegen_success_Load128_buffer
    (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 6) (va_op_reg_opr64_reg64 rR8) 208 Secret)
    (va_pbool_and (va_codegen_success_Aes_4rounds_4way ()) (va_pbool_and
    (va_codegen_success_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 5)
    (va_op_reg_opr64_reg64 rR8) 224 Secret) (va_ttrue ())))))) else va_ttrue ()) (va_pbool_and
    (va_codegen_success_AESNI_enc_last (va_op_xmm_xmm 2) (va_op_xmm_xmm 5)) (va_pbool_and
    (va_codegen_success_AESNI_enc_last (va_op_xmm_xmm 12) (va_op_xmm_xmm 5)) (va_pbool_and
    (va_codegen_success_AESNI_enc_last (va_op_xmm_xmm 13) (va_op_xmm_xmm 5)) (va_pbool_and
    (va_codegen_success_AESNI_enc_last (va_op_xmm_xmm 14) (va_op_xmm_xmm 5)) (va_ttrue
    ()))))))))))))))))

[@ "opaque_to_smt" va_qattr]
let va_qcode_Aes_ctr_encrypt (va_mods:va_mods_t) (alg:algorithm) (key:(seq nat32)) (round_keys:(seq
  quad32)) (keys_b:buffer128) (in1:quad32) (in2:quad32) (in3:quad32) (in4:quad32) : (va_quickCode
  unit (va_code_Aes_ctr_encrypt alg)) =
  (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in let
    (va_arg89:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = round_keys in let
    (va_arg88:Vale.Def.Types_s.quad32) = va_get_xmm 2 va_old_s in va_qPURE va_range1
    "***** PRECONDITION NOT MET AT line 286 column 23 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (fun (_:unit) -> Vale.AES.AES_helpers.init_rounds_opaque va_arg88 va_arg89) (let
    (va_arg87:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = round_keys in let
    (va_arg86:Vale.Def.Types_s.quad32) = va_get_xmm 12 va_old_s in va_qPURE va_range1
    "***** PRECONDITION NOT MET AT line 287 column 23 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (fun (_:unit) -> Vale.AES.AES_helpers.init_rounds_opaque va_arg86 va_arg87) (let
    (va_arg85:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = round_keys in let
    (va_arg84:Vale.Def.Types_s.quad32) = va_get_xmm 13 va_old_s in va_qPURE va_range1
    "***** PRECONDITION NOT MET AT line 288 column 23 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (fun (_:unit) -> Vale.AES.AES_helpers.init_rounds_opaque va_arg84 va_arg85) (let
    (va_arg83:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = round_keys in let
    (va_arg82:Vale.Def.Types_s.quad32) = va_get_xmm 14 va_old_s in va_qPURE va_range1
    "***** PRECONDITION NOT MET AT line 289 column 23 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (fun (_:unit) -> Vale.AES.AES_helpers.init_rounds_opaque va_arg82 va_arg83) (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 291 column 21 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Aes_3rounds_4way alg 1 (va_get_xmm 2 va_old_s) (va_get_xmm 12 va_old_s) (va_get_xmm
    13 va_old_s) (va_get_xmm 14 va_old_s) round_keys) (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 294 column 19 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 3) (va_op_reg_opr64_reg64
    rR8) 64 Secret keys_b 4) (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 295 column 19 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 4) (va_op_reg_opr64_reg64
    rR8) 80 Secret keys_b 5) (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 296 column 19 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 5) (va_op_reg_opr64_reg64
    rR8) 96 Secret keys_b 6) (va_QBind va_range1
    "***** PRECONDITION NOT MET AT line 297 column 19 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 6) (va_op_reg_opr64_reg64
    rR8) 112 Secret keys_b 7) (fun (va_s:va_state) _ -> va_qAssertSquash va_range1
    "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 298 column 5 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    ((fun a_336 (s_337:(FStar.Seq.Base.seq a_336)) (i_338:Prims.nat) -> let (i_312:Prims.nat) =
    i_338 in Prims.b2t (Prims.op_LessThan i_312 (FStar.Seq.Base.length #a_336 s_337))) quad32
    round_keys 4) (fun _ -> va_qAssert va_range1
    "***** PRECONDITION NOT MET AT line 298 column 5 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 3 va_s == FStar.Seq.Base.index #quad32 round_keys 4) (va_qAssertSquash va_range1
    "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 299 column 5 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    ((fun a_336 (s_337:(FStar.Seq.Base.seq a_336)) (i_338:Prims.nat) -> let (i_312:Prims.nat) =
    i_338 in Prims.b2t (Prims.op_LessThan i_312 (FStar.Seq.Base.length #a_336 s_337))) quad32
    round_keys 5) (fun _ -> va_qAssert va_range1
    "***** PRECONDITION NOT MET AT line 299 column 5 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 4 va_s == FStar.Seq.Base.index #quad32 round_keys 5) (va_qAssertSquash va_range1
    "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 300 column 5 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    ((fun a_336 (s_337:(FStar.Seq.Base.seq a_336)) (i_338:Prims.nat) -> let (i_312:Prims.nat) =
    i_338 in Prims.b2t (Prims.op_LessThan i_312 (FStar.Seq.Base.length #a_336 s_337))) quad32
    round_keys 6) (fun _ -> va_qAssert va_range1
    "***** PRECONDITION NOT MET AT line 300 column 5 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 5 va_s == FStar.Seq.Base.index #quad32 round_keys 6) (va_qAssertSquash va_range1
    "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 301 column 5 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    ((fun a_336 (s_337:(FStar.Seq.Base.seq a_336)) (i_338:Prims.nat) -> let (i_312:Prims.nat) =
    i_338 in Prims.b2t (Prims.op_LessThan i_312 (FStar.Seq.Base.length #a_336 s_337))) quad32
    round_keys 7) (fun _ -> va_qAssert va_range1
    "***** PRECONDITION NOT MET AT line 301 column 5 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 6 va_s == FStar.Seq.Base.index #quad32 round_keys 7) (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 304 column 21 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Aes_4rounds_4way alg 4 (va_get_xmm 2 va_old_s) (va_get_xmm 12 va_old_s) (va_get_xmm
    13 va_old_s) (va_get_xmm 14 va_old_s) round_keys) (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 307 column 19 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 3) (va_op_reg_opr64_reg64
    rR8) 128 Secret keys_b 8) (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 308 column 19 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 4) (va_op_reg_opr64_reg64
    rR8) 144 Secret keys_b 9) (va_QBind va_range1
    "***** PRECONDITION NOT MET AT line 309 column 19 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 5) (va_op_reg_opr64_reg64
    rR8) 160 Secret keys_b 10) (fun (va_s:va_state) _ -> va_qAssertSquash va_range1
    "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 310 column 5 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    ((fun a_336 (s_337:(FStar.Seq.Base.seq a_336)) (i_338:Prims.nat) -> let (i_312:Prims.nat) =
    i_338 in Prims.b2t (Prims.op_LessThan i_312 (FStar.Seq.Base.length #a_336 s_337))) quad32
    round_keys 8) (fun _ -> va_qAssert va_range1
    "***** PRECONDITION NOT MET AT line 310 column 5 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 3 va_s == FStar.Seq.Base.index #quad32 round_keys 8) (va_qAssertSquash va_range1
    "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 311 column 5 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    ((fun a_336 (s_337:(FStar.Seq.Base.seq a_336)) (i_338:Prims.nat) -> let (i_312:Prims.nat) =
    i_338 in Prims.b2t (Prims.op_LessThan i_312 (FStar.Seq.Base.length #a_336 s_337))) quad32
    round_keys 9) (fun _ -> va_qAssert va_range1
    "***** PRECONDITION NOT MET AT line 311 column 5 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 4 va_s == FStar.Seq.Base.index #quad32 round_keys 9) (va_qAssertSquash va_range1
    "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 312 column 5 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    ((fun a_336 (s_337:(FStar.Seq.Base.seq a_336)) (i_338:Prims.nat) -> let (i_312:Prims.nat) =
    i_338 in Prims.b2t (Prims.op_LessThan i_312 (FStar.Seq.Base.length #a_336 s_337))) quad32
    round_keys 10) (fun _ -> va_qAssert va_range1
    "***** PRECONDITION NOT MET AT line 312 column 5 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 5 va_s == FStar.Seq.Base.index #quad32 round_keys 10) (va_QBind va_range1
    "***** PRECONDITION NOT MET AT line 315 column 21 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Aes_2rounds_4way alg 8 (va_get_xmm 2 va_old_s) (va_get_xmm 12 va_old_s) (va_get_xmm
    13 va_old_s) (va_get_xmm 14 va_old_s) round_keys) (fun (va_s:va_state) _ -> va_QBind va_range1
    "***** PRECONDITION NOT MET AT line 318 column 15 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_qInlineIf va_mods (alg = AES_256) (qblock va_mods (fun (va_s:va_state) -> va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 320 column 15 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Mov128 (va_op_xmm_xmm 3) (va_op_xmm_xmm 5)) (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 321 column 23 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 4) (va_op_reg_opr64_reg64
    rR8) 176 Secret keys_b 11) (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 322 column 23 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 5) (va_op_reg_opr64_reg64
    rR8) 192 Secret keys_b 12) (va_QBind va_range1
    "***** PRECONDITION NOT MET AT line 323 column 23 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 6) (va_op_reg_opr64_reg64
    rR8) 208 Secret keys_b 13) (fun (va_s:va_state) _ -> va_qAssertSquash va_range1
    "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 324 column 9 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    ((fun a_336 (s_337:(FStar.Seq.Base.seq a_336)) (i_338:Prims.nat) -> let (i_312:Prims.nat) =
    i_338 in Prims.b2t (Prims.op_LessThan i_312 (FStar.Seq.Base.length #a_336 s_337))) quad32
    round_keys 10) (fun _ -> va_qAssert va_range1
    "***** PRECONDITION NOT MET AT line 324 column 9 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 3 va_s == FStar.Seq.Base.index #quad32 round_keys 10) (va_qAssertSquash va_range1
    "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 325 column 9 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    ((fun a_336 (s_337:(FStar.Seq.Base.seq a_336)) (i_338:Prims.nat) -> let (i_312:Prims.nat) =
    i_338 in Prims.b2t (Prims.op_LessThan i_312 (FStar.Seq.Base.length #a_336 s_337))) quad32
    round_keys 11) (fun _ -> va_qAssert va_range1
    "***** PRECONDITION NOT MET AT line 325 column 9 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 4 va_s == FStar.Seq.Base.index #quad32 round_keys 11) (va_qAssertSquash va_range1
    "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 326 column 9 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    ((fun a_336 (s_337:(FStar.Seq.Base.seq a_336)) (i_338:Prims.nat) -> let (i_312:Prims.nat) =
    i_338 in Prims.b2t (Prims.op_LessThan i_312 (FStar.Seq.Base.length #a_336 s_337))) quad32
    round_keys 12) (fun _ -> va_qAssert va_range1
    "***** PRECONDITION NOT MET AT line 326 column 9 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 5 va_s == FStar.Seq.Base.index #quad32 round_keys 12) (va_qAssertSquash va_range1
    "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 327 column 9 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    ((fun a_336 (s_337:(FStar.Seq.Base.seq a_336)) (i_338:Prims.nat) -> let (i_312:Prims.nat) =
    i_338 in Prims.b2t (Prims.op_LessThan i_312 (FStar.Seq.Base.length #a_336 s_337))) quad32
    round_keys 13) (fun _ -> va_qAssert va_range1
    "***** PRECONDITION NOT MET AT line 327 column 9 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 6 va_s == FStar.Seq.Base.index #quad32 round_keys 13) (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 330 column 25 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Aes_4rounds_4way alg 10 (va_get_xmm 2 va_old_s) (va_get_xmm 12 va_old_s) (va_get_xmm
    13 va_old_s) (va_get_xmm 14 va_old_s) round_keys) (va_QBind va_range1
    "***** PRECONDITION NOT MET AT line 333 column 23 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 5) (va_op_reg_opr64_reg64
    rR8) 224 Secret keys_b 14) (fun (va_s:va_state) _ -> va_qAssertSquash va_range1
    "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 334 column 9 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    ((fun a_336 (s_337:(FStar.Seq.Base.seq a_336)) (i_338:Prims.nat) -> let (i_312:Prims.nat) =
    i_338 in Prims.b2t (Prims.op_LessThan i_312 (FStar.Seq.Base.length #a_336 s_337))) quad32
    round_keys 14) (fun _ -> va_qAssert va_range1
    "***** PRECONDITION NOT MET AT line 334 column 9 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 5 va_s == FStar.Seq.Base.index #quad32 round_keys 14) (va_QEmpty
    (()))))))))))))))))))) (qblock va_mods (fun (va_s:va_state) -> va_QEmpty (())))) (fun
    (va_s:va_state) va_g -> va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 341 column 19 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_AESNI_enc_last (va_op_xmm_xmm 2) (va_op_xmm_xmm 5)) (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 342 column 19 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_AESNI_enc_last (va_op_xmm_xmm 12) (va_op_xmm_xmm 5)) (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 343 column 19 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_AESNI_enc_last (va_op_xmm_xmm 13) (va_op_xmm_xmm 5)) (va_QBind va_range1
    "***** PRECONDITION NOT MET AT line 344 column 19 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_AESNI_enc_last (va_op_xmm_xmm 14) (va_op_xmm_xmm 5)) (fun (va_s:va_state) _ -> let
    (va_arg81:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = round_keys in let
    (va_arg80:Vale.Def.Types_s.quad32) = in1 in let (va_arg79:Vale.AES.AES_common_s.algorithm) =
    alg in va_qPURE va_range1
    "***** PRECONDITION NOT MET AT line 346 column 18 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (fun (_:unit) -> Vale.AES.AES_helpers.finish_cipher va_arg79 va_arg80 va_arg81) (let
    (va_arg78:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = round_keys in let
    (va_arg77:Vale.Def.Types_s.quad32) = in2 in let (va_arg76:Vale.AES.AES_common_s.algorithm) =
    alg in va_qPURE va_range1
    "***** PRECONDITION NOT MET AT line 347 column 18 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (fun (_:unit) -> Vale.AES.AES_helpers.finish_cipher va_arg76 va_arg77 va_arg78) (let
    (va_arg75:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = round_keys in let
    (va_arg74:Vale.Def.Types_s.quad32) = in3 in let (va_arg73:Vale.AES.AES_common_s.algorithm) =
    alg in va_qPURE va_range1
    "***** PRECONDITION NOT MET AT line 348 column 18 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (fun (_:unit) -> Vale.AES.AES_helpers.finish_cipher va_arg73 va_arg74 va_arg75) (let
    (va_arg72:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = round_keys in let
    (va_arg71:Vale.Def.Types_s.quad32) = in4 in let (va_arg70:Vale.AES.AES_common_s.algorithm) =
    alg in va_qPURE va_range1
    "***** PRECONDITION NOT MET AT line 349 column 18 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (fun (_:unit) -> Vale.AES.AES_helpers.finish_cipher va_arg70 va_arg71 va_arg72) (va_QLemma
    va_range1
    "***** PRECONDITION NOT MET AT line 350 column 26 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    ((fun (alg:algorithm) (input_LE:quad32) (key:(seq nat32)) -> Vale.AES.AES_s.is_aes_key_LE alg
    key) alg in1 key) (fun _ -> (fun (alg:algorithm) (input_LE:quad32) (key:(seq nat32)) ->
    Vale.AES.AES_s.aes_encrypt_LE alg key input_LE == Vale.AES.AES_s.eval_cipher alg input_LE
    (Vale.AES.AES_s.key_to_round_keys_LE alg key)) alg in1 key) (fun (_:unit) ->
    finish_aes_encrypt_le alg in1 key) (va_QLemma va_range1
    "***** PRECONDITION NOT MET AT line 351 column 26 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    ((fun (alg:algorithm) (input_LE:quad32) (key:(seq nat32)) -> Vale.AES.AES_s.is_aes_key_LE alg
    key) alg in2 key) (fun _ -> (fun (alg:algorithm) (input_LE:quad32) (key:(seq nat32)) ->
    Vale.AES.AES_s.aes_encrypt_LE alg key input_LE == Vale.AES.AES_s.eval_cipher alg input_LE
    (Vale.AES.AES_s.key_to_round_keys_LE alg key)) alg in2 key) (fun (_:unit) ->
    finish_aes_encrypt_le alg in2 key) (va_QLemma va_range1
    "***** PRECONDITION NOT MET AT line 352 column 26 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    ((fun (alg:algorithm) (input_LE:quad32) (key:(seq nat32)) -> Vale.AES.AES_s.is_aes_key_LE alg
    key) alg in3 key) (fun _ -> (fun (alg:algorithm) (input_LE:quad32) (key:(seq nat32)) ->
    Vale.AES.AES_s.aes_encrypt_LE alg key input_LE == Vale.AES.AES_s.eval_cipher alg input_LE
    (Vale.AES.AES_s.key_to_round_keys_LE alg key)) alg in3 key) (fun (_:unit) ->
    finish_aes_encrypt_le alg in3 key) (va_QLemma va_range1
    "***** PRECONDITION NOT MET AT line 353 column 26 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    ((fun (alg:algorithm) (input_LE:quad32) (key:(seq nat32)) -> Vale.AES.AES_s.is_aes_key_LE alg
    key) alg in4 key) (fun _ -> (fun (alg:algorithm) (input_LE:quad32) (key:(seq nat32)) ->
    Vale.AES.AES_s.aes_encrypt_LE alg key input_LE == Vale.AES.AES_s.eval_cipher alg input_LE
    (Vale.AES.AES_s.key_to_round_keys_LE alg key)) alg in4 key) (fun (_:unit) ->
    finish_aes_encrypt_le alg in4 key) (va_QEmpty (()))))))))))))))))))))))))))))))))))))))))))))

[@"opaque_to_smt"]
let va_lemma_Aes_ctr_encrypt va_b0 va_s0 alg key round_keys keys_b in1 in2 in3 in4 =
  let (va_mods:va_mods_t) = [va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm
    2; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 6; va_Mod_ok] in
  let va_qc = va_qcode_Aes_ctr_encrypt va_mods alg key round_keys keys_b in1 in2 in3 in4 in
  let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Aes_ctr_encrypt alg) va_qc va_s0 (fun
    va_s0 va_sM va_g -> let () = va_g in label va_range1
    "***** POSTCONDITION NOT MET AT line 244 column 1 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_ok va_sM) /\ (label va_range1
    "***** POSTCONDITION NOT MET AT line 279 column 74 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (aes_reqs alg key round_keys keys_b (va_get_reg64 rR8 va_sM) (va_get_mem_heaplet 0 va_sM)
    (va_get_mem_layout va_sM)) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 281 column 46 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 2 va_sM == Vale.AES.AES_s.aes_encrypt_LE alg key in1) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 282 column 46 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 12 va_sM == Vale.AES.AES_s.aes_encrypt_LE alg key in2) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 283 column 46 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 13 va_sM == Vale.AES.AES_s.aes_encrypt_LE alg key in3) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 284 column 46 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 14 va_sM == Vale.AES.AES_s.aes_encrypt_LE alg key in4))) in
  assert_norm (va_qc.mods == va_mods);
  va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 2;
    va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 6; va_Mod_ok]) va_sM va_s0;
  (va_sM, va_fM)


[@"opaque_to_smt"]
let va_wpProof_Aes_ctr_encrypt alg key round_keys keys_b in1 in2 in3 in4 va_s0 va_k =
  let (va_sM, va_f0) = va_lemma_Aes_ctr_encrypt (va_code_Aes_ctr_encrypt alg) va_s0 alg key
    round_keys keys_b in1 in2 in3 in4 in
  va_lemma_upd_update va_sM;
  assert (va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM
    (va_update_xmm 12 va_sM (va_update_xmm 2 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM
    (va_update_xmm 3 va_sM (va_update_xmm 6 va_sM (va_update_ok va_sM va_s0)))))))))));
  va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 2;
    va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 6]) va_sM va_s0;
  let va_g = () in
  (va_sM, va_f0, va_g)

//--
//-- Aes_ctr_ghash

val va_code_Aes_ctr_ghash : va_dummy:unit -> Tot va_code
[@ "opaque_to_smt" va_qattr]
let va_code_Aes_ctr_ghash () =
  (va_Block (va_CCons (va_code_Compute_ghash_incremental_register ()) (va_CCons (va_code_Mov128
    (va_op_xmm_xmm 2) (va_op_xmm_xmm 12)) (va_CCons (va_code_Compute_ghash_incremental_register ())
    (va_CCons (va_code_Mov128 (va_op_xmm_xmm 2) (va_op_xmm_xmm 13)) (va_CCons
    (va_code_Compute_ghash_incremental_register ()) (va_CCons (va_code_Mov128 (va_op_xmm_xmm 2)
    (va_op_xmm_xmm 14)) (va_CCons (va_code_Compute_ghash_incremental_register ()) (va_CNil
    ())))))))))

val va_codegen_success_Aes_ctr_ghash : va_dummy:unit -> Tot va_pbool
[@ "opaque_to_smt" va_qattr]
let va_codegen_success_Aes_ctr_ghash () =
  (va_pbool_and (va_codegen_success_Compute_ghash_incremental_register ()) (va_pbool_and
    (va_codegen_success_Mov128 (va_op_xmm_xmm 2) (va_op_xmm_xmm 12)) (va_pbool_and
    (va_codegen_success_Compute_ghash_incremental_register ()) (va_pbool_and
    (va_codegen_success_Mov128 (va_op_xmm_xmm 2) (va_op_xmm_xmm 13)) (va_pbool_and
    (va_codegen_success_Compute_ghash_incremental_register ()) (va_pbool_and
    (va_codegen_success_Mov128 (va_op_xmm_xmm 2) (va_op_xmm_xmm 14)) (va_pbool_and
    (va_codegen_success_Compute_ghash_incremental_register ()) (va_ttrue ()))))))))

[@ "opaque_to_smt" va_qattr]
let va_qcode_Aes_ctr_ghash (va_mods:va_mods_t) (old_out_ptr:nat64) (old_num_quad_blocks:nat64)
  (count:nat) (out_b:buffer128) (hash_init:quad32) : (va_quickCode unit (va_code_Aes_ctr_ghash ()))
  =
  (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in let (h_in_0:quad32) =
    va_get_xmm 2 va_s in va_QBind va_range1
    "***** PRECONDITION NOT MET AT line 390 column 39 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Compute_ghash_incremental_register ()) (fun (va_s:va_state) _ -> let (hash0:quad32) =
    va_get_xmm 1 va_s in va_QBind va_range1
    "***** PRECONDITION NOT MET AT line 393 column 11 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Mov128 (va_op_xmm_xmm 2) (va_op_xmm_xmm 12)) (fun (va_s:va_state) _ -> let
    (h_in_1:quad32) = va_get_xmm 2 va_s in va_QBind va_range1
    "***** PRECONDITION NOT MET AT line 395 column 39 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Compute_ghash_incremental_register ()) (fun (va_s:va_state) _ -> let (hash1:quad32) =
    va_get_xmm 1 va_s in va_QBind va_range1
    "***** PRECONDITION NOT MET AT line 398 column 11 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Mov128 (va_op_xmm_xmm 2) (va_op_xmm_xmm 13)) (fun (va_s:va_state) _ -> let
    (h_in_2:quad32) = va_get_xmm 2 va_s in va_QBind va_range1
    "***** PRECONDITION NOT MET AT line 400 column 39 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Compute_ghash_incremental_register ()) (fun (va_s:va_state) _ -> let (hash2:quad32) =
    va_get_xmm 1 va_s in va_QBind va_range1
    "***** PRECONDITION NOT MET AT line 403 column 11 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Mov128 (va_op_xmm_xmm 2) (va_op_xmm_xmm 14)) (fun (va_s:va_state) _ -> let
    (h_in_3:quad32) = va_get_xmm 2 va_s in va_QBind va_range1
    "***** PRECONDITION NOT MET AT line 405 column 39 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Compute_ghash_incremental_register ()) (fun (va_s:va_state) _ -> let
    (va_arg40:Prims.nat) = 4 `op_Multiply` count in let (va_arg39:(FStar.Seq.Base.seq
    Vale.Def.Types_s.quad32)) = Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_s) out_b
    in let (va_arg38:Vale.Def.Types_s.quad32) = h_in_3 in let (va_arg37:Vale.Def.Types_s.quad32) =
    h_in_2 in let (va_arg36:Vale.Def.Types_s.quad32) = h_in_1 in let
    (va_arg35:Vale.Def.Types_s.quad32) = h_in_0 in let (va_arg34:Vale.Def.Types_s.quad32) =
    va_get_xmm 1 va_s in let (va_arg33:Vale.Def.Types_s.quad32) = hash2 in let
    (va_arg32:Vale.Def.Types_s.quad32) = hash1 in let (va_arg31:Vale.Def.Types_s.quad32) = hash0 in
    let (va_arg30:Vale.Def.Types_s.quad32) = va_get_xmm 1 va_old_s in let
    (va_arg29:Vale.Def.Types_s.quad32) = hash_init in let (va_arg28:Vale.Def.Types_s.quad32) =
    Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 11 va_s) in va_qPURE va_range1
    "***** PRECONDITION NOT MET AT line 406 column 26 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (fun (_:unit) -> Vale.AES.GHash.lemma_ghash_registers va_arg28 va_arg29 va_arg30 va_arg31
    va_arg32 va_arg33 va_arg34 va_arg35 va_arg36 va_arg37 va_arg38 va_arg39 va_arg40) (va_QEmpty
    (())))))))))))


val va_lemma_Aes_ctr_ghash : va_b0:va_code -> va_s0:va_state -> old_out_ptr:nat64 ->
  old_num_quad_blocks:nat64 -> count:nat -> out_b:buffer128 -> hash_init:quad32
  -> Ghost (va_state & va_fuel)
  (requires (va_require_total va_b0 (va_code_Aes_ctr_ghash ()) va_s0 /\ va_get_ok va_s0 /\
    (pclmulqdq_enabled /\ avx_enabled /\ sse_enabled /\ (0 <= count /\ count < old_num_quad_blocks)
    /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 1 va_s0) old_out_ptr out_b
    (old_num_quad_blocks `op_Multiply` 4) (va_get_mem_layout va_s0) Secret /\ va_get_xmm 8 va_s0 ==
    Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123 67438087 66051 /\
    va_get_xmm 1 va_s0 == Vale.AES.GHash.ghash_incremental0 (Vale.Def.Types_s.reverse_bytes_quad32
    (va_get_xmm 11 va_s0)) hash_init (FStar.Seq.Base.slice #Vale.X64.Decls.quad32
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_s0) out_b) 0 (4 `op_Multiply` count))
    /\ va_get_xmm 2 va_s0 == FStar.Seq.Base.index #Vale.X64.Decls.quad32
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_s0) out_b) (4 `op_Multiply` count +
    0) /\ va_get_xmm 12 va_s0 == FStar.Seq.Base.index #Vale.X64.Decls.quad32
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_s0) out_b) (4 `op_Multiply` count +
    1) /\ va_get_xmm 13 va_s0 == FStar.Seq.Base.index #Vale.X64.Decls.quad32
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_s0) out_b) (4 `op_Multiply` count +
    2) /\ va_get_xmm 14 va_s0 == FStar.Seq.Base.index #Vale.X64.Decls.quad32
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_s0) out_b) (4 `op_Multiply` count +
    3))))
  (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
    va_get_xmm 1 va_sM == Vale.AES.GHash.ghash_incremental (Vale.Def.Types_s.reverse_bytes_quad32
    (va_get_xmm 11 va_sM)) hash_init (FStar.Seq.Base.slice #Vale.X64.Decls.quad32
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_sM) out_b) 0 (4 `op_Multiply` (count
    + 1))) /\ va_state_eq va_sM (va_update_flags va_sM (va_update_reg64 rR12 va_sM (va_update_xmm 2
    va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 6
    va_sM (va_update_xmm 1 va_sM (va_update_ok va_sM va_s0)))))))))))
[@"opaque_to_smt"]
let va_lemma_Aes_ctr_ghash va_b0 va_s0 old_out_ptr old_num_quad_blocks count out_b hash_init =
  let (va_mods:va_mods_t) = [va_Mod_flags; va_Mod_reg64 rR12; va_Mod_xmm 2; va_Mod_xmm 5;
    va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 6; va_Mod_xmm 1; va_Mod_ok] in
  let va_qc = va_qcode_Aes_ctr_ghash va_mods old_out_ptr old_num_quad_blocks count out_b hash_init
    in
  let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Aes_ctr_ghash ()) va_qc va_s0 (fun
    va_s0 va_sM va_g -> let () = va_g in label va_range1
    "***** POSTCONDITION NOT MET AT line 356 column 1 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_ok va_sM) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 386 column 127 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 1 va_sM == Vale.AES.GHash.ghash_incremental (Vale.Def.Types_s.reverse_bytes_quad32
    (va_get_xmm 11 va_sM)) hash_init (FStar.Seq.Base.slice #Vale.X64.Decls.quad32
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_sM) out_b) 0 (4 `op_Multiply` (count
    + 1))))) in
  assert_norm (va_qc.mods == va_mods);
  va_lemma_norm_mods ([va_Mod_flags; va_Mod_reg64 rR12; va_Mod_xmm 2; va_Mod_xmm 5; va_Mod_xmm 4;
    va_Mod_xmm 3; va_Mod_xmm 6; va_Mod_xmm 1; va_Mod_ok]) va_sM va_s0;
  (va_sM, va_fM)

[@ va_qattr]
let va_wp_Aes_ctr_ghash (old_out_ptr:nat64) (old_num_quad_blocks:nat64) (count:nat)
  (out_b:buffer128) (hash_init:quad32) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
  (va_get_ok va_s0 /\ (pclmulqdq_enabled /\ avx_enabled /\ sse_enabled /\ (0 <= count /\ count <
    old_num_quad_blocks) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 1 va_s0)
    old_out_ptr out_b (old_num_quad_blocks `op_Multiply` 4) (va_get_mem_layout va_s0) Secret /\
    va_get_xmm 8 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123
    67438087 66051 /\ va_get_xmm 1 va_s0 == Vale.AES.GHash.ghash_incremental0
    (Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 11 va_s0)) hash_init (FStar.Seq.Base.slice
    #Vale.X64.Decls.quad32 (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_s0) out_b) 0
    (4 `op_Multiply` count)) /\ va_get_xmm 2 va_s0 == FStar.Seq.Base.index #Vale.X64.Decls.quad32
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_s0) out_b) (4 `op_Multiply` count +
    0) /\ va_get_xmm 12 va_s0 == FStar.Seq.Base.index #Vale.X64.Decls.quad32
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_s0) out_b) (4 `op_Multiply` count +
    1) /\ va_get_xmm 13 va_s0 == FStar.Seq.Base.index #Vale.X64.Decls.quad32
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_s0) out_b) (4 `op_Multiply` count +
    2) /\ va_get_xmm 14 va_s0 == FStar.Seq.Base.index #Vale.X64.Decls.quad32
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_s0) out_b) (4 `op_Multiply` count +
    3)) /\ (forall (va_x_xmm1:quad32) (va_x_xmm6:quad32) (va_x_xmm3:quad32) (va_x_xmm4:quad32)
    (va_x_xmm5:quad32) (va_x_xmm2:quad32) (va_x_r12:nat64) (va_x_efl:Vale.X64.Flags.t) . let va_sM
    = va_upd_flags va_x_efl (va_upd_reg64 rR12 va_x_r12 (va_upd_xmm 2 va_x_xmm2 (va_upd_xmm 5
    va_x_xmm5 (va_upd_xmm 4 va_x_xmm4 (va_upd_xmm 3 va_x_xmm3 (va_upd_xmm 6 va_x_xmm6 (va_upd_xmm 1
    va_x_xmm1 va_s0))))))) in va_get_ok va_sM /\ va_get_xmm 1 va_sM ==
    Vale.AES.GHash.ghash_incremental (Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 11 va_sM))
    hash_init (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.buffer128_as_seq
    (va_get_mem_heaplet 1 va_sM) out_b) 0 (4 `op_Multiply` (count + 1))) ==> va_k va_sM (())))


val va_wpProof_Aes_ctr_ghash : old_out_ptr:nat64 -> old_num_quad_blocks:nat64 -> count:nat ->
  out_b:buffer128 -> hash_init:quad32 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
  -> Ghost (va_state & va_fuel & unit)
  (requires (va_t_require va_s0 /\ va_wp_Aes_ctr_ghash old_out_ptr old_num_quad_blocks count out_b
    hash_init va_s0 va_k))
  (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Aes_ctr_ghash ()) ([va_Mod_flags;
    va_Mod_reg64 rR12; va_Mod_xmm 2; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 6;
    va_Mod_xmm 1]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@"opaque_to_smt"]
let va_wpProof_Aes_ctr_ghash old_out_ptr old_num_quad_blocks count out_b hash_init va_s0 va_k =
  let (va_sM, va_f0) = va_lemma_Aes_ctr_ghash (va_code_Aes_ctr_ghash ()) va_s0 old_out_ptr
    old_num_quad_blocks count out_b hash_init in
  va_lemma_upd_update va_sM;
  assert (va_state_eq va_sM (va_update_flags va_sM (va_update_reg64 rR12 va_sM (va_update_xmm 2
    va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 6
    va_sM (va_update_xmm 1 va_sM (va_update_ok va_sM va_s0))))))))));
  va_lemma_norm_mods ([va_Mod_flags; va_Mod_reg64 rR12; va_Mod_xmm 2; va_Mod_xmm 5; va_Mod_xmm 4;
    va_Mod_xmm 3; va_Mod_xmm 6; va_Mod_xmm 1]) va_sM va_s0;
  let va_g = () in
  (va_sM, va_f0, va_g)

[@ "opaque_to_smt" va_qattr]
let va_quick_Aes_ctr_ghash (old_out_ptr:nat64) (old_num_quad_blocks:nat64) (count:nat)
  (out_b:buffer128) (hash_init:quad32) : (va_quickCode unit (va_code_Aes_ctr_ghash ())) =
  (va_QProc (va_code_Aes_ctr_ghash ()) ([va_Mod_flags; va_Mod_reg64 rR12; va_Mod_xmm 2; va_Mod_xmm
    5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 6; va_Mod_xmm 1]) (va_wp_Aes_ctr_ghash old_out_ptr
    old_num_quad_blocks count out_b hash_init) (va_wpProof_Aes_ctr_ghash old_out_ptr
    old_num_quad_blocks count out_b hash_init))
//--
//-- Aes_ctr_loop_body
#push-options "--z3rlimit 800"

val va_code_Aes_ctr_loop_body : alg:algorithm -> Tot va_code
[@ "opaque_to_smt" va_qattr]
let va_code_Aes_ctr_loop_body alg =
  (va_Block (va_CCons (va_code_Pinsrq (va_op_xmm_xmm 2) (va_op_opr64_reg64 rRdi) 0) (va_CCons
    (va_code_Pinsrq (va_op_xmm_xmm 12) (va_op_opr64_reg64 rRdi) 0) (va_CCons (va_code_Pinsrq
    (va_op_xmm_xmm 13) (va_op_opr64_reg64 rRdi) 0) (va_CCons (va_code_Pinsrq (va_op_xmm_xmm 14)
    (va_op_opr64_reg64 rRdi) 0) (va_CCons (va_code_Shufpd (va_op_xmm_xmm 2) (va_op_xmm_xmm 9) 2)
    (va_CCons (va_code_Shufpd (va_op_xmm_xmm 12) (va_op_xmm_xmm 9) 0) (va_CCons (va_code_Shufpd
    (va_op_xmm_xmm 13) (va_op_xmm_xmm 10) 2) (va_CCons (va_code_Shufpd (va_op_xmm_xmm 14)
    (va_op_xmm_xmm 10) 0) (va_CCons (va_code_Pshufb64 (va_op_xmm_xmm 9) (va_op_xmm_xmm 0))
    (va_CCons (va_code_Pshufb64 (va_op_xmm_xmm 10) (va_op_xmm_xmm 0)) (va_CCons
    (va_code_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 3) (va_op_reg_opr64_reg64
    rR8) 0 Secret) (va_CCons (va_code_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm
    4) (va_op_reg_opr64_reg64 rR8) 16 Secret) (va_CCons (va_code_Load128_buffer
    (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 5) (va_op_reg_opr64_reg64 rR8) 32 Secret)
    (va_CCons (va_code_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 6)
    (va_op_reg_opr64_reg64 rR8) 48 Secret) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_Block
    (va_CNil ())) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_Block (va_CNil ())) (va_CCons
    (va_code_Paddd (va_op_xmm_xmm 9) (va_op_xmm_xmm 15)) (va_CCons (va_code_Paddd (va_op_xmm_xmm
    10) (va_op_xmm_xmm 15)) (va_CCons (va_code_Pxor (va_op_xmm_xmm 2) (va_op_xmm_xmm 3)) (va_CCons
    (va_code_Pxor (va_op_xmm_xmm 12) (va_op_xmm_xmm 3)) (va_CCons (va_code_Pxor (va_op_xmm_xmm 13)
    (va_op_xmm_xmm 3)) (va_CCons (va_code_Pxor (va_op_xmm_xmm 14) (va_op_xmm_xmm 3)) (va_CCons
    (va_code_Pshufb64 (va_op_xmm_xmm 9) (va_op_xmm_xmm 0)) (va_CCons (va_code_Pshufb64
    (va_op_xmm_xmm 10) (va_op_xmm_xmm 0)) (va_CCons (va_code_Aes_ctr_encrypt alg) (va_CCons
    (va_code_Load128_buffer (va_op_heaplet_mem_heaplet 1) (va_op_xmm_xmm 7) (va_op_reg_opr64_reg64
    rR9) 0 Secret) (va_CCons (va_code_Pxor (va_op_xmm_xmm 2) (va_op_xmm_xmm 7)) (va_CCons
    (va_code_Load128_buffer (va_op_heaplet_mem_heaplet 1) (va_op_xmm_xmm 7) (va_op_reg_opr64_reg64
    rR9) 16 Secret) (va_CCons (va_code_Pxor (va_op_xmm_xmm 12) (va_op_xmm_xmm 7)) (va_CCons
    (va_code_Load128_buffer (va_op_heaplet_mem_heaplet 1) (va_op_xmm_xmm 7) (va_op_reg_opr64_reg64
    rR9) 32 Secret) (va_CCons (va_code_Pxor (va_op_xmm_xmm 13) (va_op_xmm_xmm 7)) (va_CCons
    (va_code_Load128_buffer (va_op_heaplet_mem_heaplet 1) (va_op_xmm_xmm 7) (va_op_reg_opr64_reg64
    rR9) 48 Secret) (va_CCons (va_code_Pxor (va_op_xmm_xmm 14) (va_op_xmm_xmm 7)) (va_CCons
    (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 1) (va_op_reg_opr64_reg64 rR10)
    (va_op_xmm_xmm 2) 0 Secret) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 1)
    (va_op_reg_opr64_reg64 rR10) (va_op_xmm_xmm 12) 16 Secret) (va_CCons (va_code_Store128_buffer
    (va_op_heaplet_mem_heaplet 1) (va_op_reg_opr64_reg64 rR10) (va_op_xmm_xmm 13) 32 Secret)
    (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 1) (va_op_reg_opr64_reg64 rR10)
    (va_op_xmm_xmm 14) 48 Secret) (va_CCons (va_Block (va_CNil ())) (va_CCons
    (va_code_Aes_ctr_ghash ()) (va_CCons (va_code_Sub64 (va_op_dst_opr64_reg64 rRdx)
    (va_const_opr64 1)) (va_CCons (va_code_Add64 (va_op_dst_opr64_reg64 rR9) (va_const_opr64 64))
    (va_CCons (va_code_Add64 (va_op_dst_opr64_reg64 rR10) (va_const_opr64 64)) (va_CNil
    ()))))))))))))))))))))))))))))))))))))))))))))))

val va_codegen_success_Aes_ctr_loop_body : alg:algorithm -> Tot va_pbool
[@ "opaque_to_smt" va_qattr]
let va_codegen_success_Aes_ctr_loop_body alg =
  (va_pbool_and (va_codegen_success_Pinsrq (va_op_xmm_xmm 2) (va_op_opr64_reg64 rRdi) 0)
    (va_pbool_and (va_codegen_success_Pinsrq (va_op_xmm_xmm 12) (va_op_opr64_reg64 rRdi) 0)
    (va_pbool_and (va_codegen_success_Pinsrq (va_op_xmm_xmm 13) (va_op_opr64_reg64 rRdi) 0)
    (va_pbool_and (va_codegen_success_Pinsrq (va_op_xmm_xmm 14) (va_op_opr64_reg64 rRdi) 0)
    (va_pbool_and (va_codegen_success_Shufpd (va_op_xmm_xmm 2) (va_op_xmm_xmm 9) 2) (va_pbool_and
    (va_codegen_success_Shufpd (va_op_xmm_xmm 12) (va_op_xmm_xmm 9) 0) (va_pbool_and
    (va_codegen_success_Shufpd (va_op_xmm_xmm 13) (va_op_xmm_xmm 10) 2) (va_pbool_and
    (va_codegen_success_Shufpd (va_op_xmm_xmm 14) (va_op_xmm_xmm 10) 0) (va_pbool_and
    (va_codegen_success_Pshufb64 (va_op_xmm_xmm 9) (va_op_xmm_xmm 0)) (va_pbool_and
    (va_codegen_success_Pshufb64 (va_op_xmm_xmm 10) (va_op_xmm_xmm 0)) (va_pbool_and
    (va_codegen_success_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 3)
    (va_op_reg_opr64_reg64 rR8) 0 Secret) (va_pbool_and (va_codegen_success_Load128_buffer
    (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 4) (va_op_reg_opr64_reg64 rR8) 16 Secret)
    (va_pbool_and (va_codegen_success_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm
    5) (va_op_reg_opr64_reg64 rR8) 32 Secret) (va_pbool_and (va_codegen_success_Load128_buffer
    (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 6) (va_op_reg_opr64_reg64 rR8) 48 Secret)
    (va_pbool_and (va_codegen_success_Paddd (va_op_xmm_xmm 9) (va_op_xmm_xmm 15)) (va_pbool_and
    (va_codegen_success_Paddd (va_op_xmm_xmm 10) (va_op_xmm_xmm 15)) (va_pbool_and
    (va_codegen_success_Pxor (va_op_xmm_xmm 2) (va_op_xmm_xmm 3)) (va_pbool_and
    (va_codegen_success_Pxor (va_op_xmm_xmm 12) (va_op_xmm_xmm 3)) (va_pbool_and
    (va_codegen_success_Pxor (va_op_xmm_xmm 13) (va_op_xmm_xmm 3)) (va_pbool_and
    (va_codegen_success_Pxor (va_op_xmm_xmm 14) (va_op_xmm_xmm 3)) (va_pbool_and
    (va_codegen_success_Pshufb64 (va_op_xmm_xmm 9) (va_op_xmm_xmm 0)) (va_pbool_and
    (va_codegen_success_Pshufb64 (va_op_xmm_xmm 10) (va_op_xmm_xmm 0)) (va_pbool_and
    (va_codegen_success_Aes_ctr_encrypt alg) (va_pbool_and (va_codegen_success_Load128_buffer
    (va_op_heaplet_mem_heaplet 1) (va_op_xmm_xmm 7) (va_op_reg_opr64_reg64 rR9) 0 Secret)
    (va_pbool_and (va_codegen_success_Pxor (va_op_xmm_xmm 2) (va_op_xmm_xmm 7)) (va_pbool_and
    (va_codegen_success_Load128_buffer (va_op_heaplet_mem_heaplet 1) (va_op_xmm_xmm 7)
    (va_op_reg_opr64_reg64 rR9) 16 Secret) (va_pbool_and (va_codegen_success_Pxor (va_op_xmm_xmm
    12) (va_op_xmm_xmm 7)) (va_pbool_and (va_codegen_success_Load128_buffer
    (va_op_heaplet_mem_heaplet 1) (va_op_xmm_xmm 7) (va_op_reg_opr64_reg64 rR9) 32 Secret)
    (va_pbool_and (va_codegen_success_Pxor (va_op_xmm_xmm 13) (va_op_xmm_xmm 7)) (va_pbool_and
    (va_codegen_success_Load128_buffer (va_op_heaplet_mem_heaplet 1) (va_op_xmm_xmm 7)
    (va_op_reg_opr64_reg64 rR9) 48 Secret) (va_pbool_and (va_codegen_success_Pxor (va_op_xmm_xmm
    14) (va_op_xmm_xmm 7)) (va_pbool_and (va_codegen_success_Store128_buffer
    (va_op_heaplet_mem_heaplet 1) (va_op_reg_opr64_reg64 rR10) (va_op_xmm_xmm 2) 0 Secret)
    (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 1)
    (va_op_reg_opr64_reg64 rR10) (va_op_xmm_xmm 12) 16 Secret) (va_pbool_and
    (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 1) (va_op_reg_opr64_reg64 rR10)
    (va_op_xmm_xmm 13) 32 Secret) (va_pbool_and (va_codegen_success_Store128_buffer
    (va_op_heaplet_mem_heaplet 1) (va_op_reg_opr64_reg64 rR10) (va_op_xmm_xmm 14) 48 Secret)
    (va_pbool_and (va_codegen_success_Aes_ctr_ghash ()) (va_pbool_and (va_codegen_success_Sub64
    (va_op_dst_opr64_reg64 rRdx) (va_const_opr64 1)) (va_pbool_and (va_codegen_success_Add64
    (va_op_dst_opr64_reg64 rR9) (va_const_opr64 64)) (va_pbool_and (va_codegen_success_Add64
    (va_op_dst_opr64_reg64 rR10) (va_const_opr64 64)) (va_ttrue
    ()))))))))))))))))))))))))))))))))))))))))

[@ "opaque_to_smt" va_qattr]
let va_qcode_Aes_ctr_loop_body (va_mods:va_mods_t) (alg:algorithm) (old_plain_ptr:nat64)
  (old_out_ptr:nat64) (old_num_quad_blocks:nat64) (count:nat) (plain_b:buffer128) (out_b:buffer128)
  (key:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (icb_BE:quad32) (iv:quad32)
  (hash_init:quad32) : (va_quickCode unit (va_code_Aes_ctr_loop_body alg)) =
  (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in let
    (va_arg98:Vale.Def.Types_s.quad32) = iv in let (va_arg97:Vale.Def.Types_s.quad32) = va_get_xmm
    2 va_s in va_qPURE va_range1
    "***** PRECONDITION NOT MET AT line 502 column 32 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (fun (_:unit) -> Vale.Arch.Types.lemma_insrq_extrq_relations va_arg97 va_arg98) (let
    (va_arg96:Vale.Def.Types_s.quad32) = iv in let (va_arg95:Vale.Def.Types_s.quad32) = va_get_xmm
    12 va_s in va_qPURE va_range1
    "***** PRECONDITION NOT MET AT line 503 column 32 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (fun (_:unit) -> Vale.Arch.Types.lemma_insrq_extrq_relations va_arg95 va_arg96) (let
    (va_arg94:Vale.Def.Types_s.quad32) = iv in let (va_arg93:Vale.Def.Types_s.quad32) = va_get_xmm
    13 va_s in va_qPURE va_range1
    "***** PRECONDITION NOT MET AT line 504 column 32 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (fun (_:unit) -> Vale.Arch.Types.lemma_insrq_extrq_relations va_arg93 va_arg94) (let
    (va_arg92:Vale.Def.Types_s.quad32) = iv in let (va_arg91:Vale.Def.Types_s.quad32) = va_get_xmm
    14 va_s in va_qPURE va_range1
    "***** PRECONDITION NOT MET AT line 505 column 32 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (fun (_:unit) -> Vale.Arch.Types.lemma_insrq_extrq_relations va_arg91 va_arg92) (va_QSeq
    va_range1
    "***** PRECONDITION NOT MET AT line 506 column 11 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Pinsrq (va_op_xmm_xmm 2) (va_op_opr64_reg64 rRdi) 0) (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 507 column 11 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Pinsrq (va_op_xmm_xmm 12) (va_op_opr64_reg64 rRdi) 0) (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 508 column 11 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Pinsrq (va_op_xmm_xmm 13) (va_op_opr64_reg64 rRdi) 0) (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 509 column 11 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Pinsrq (va_op_xmm_xmm 14) (va_op_opr64_reg64 rRdi) 0) (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 511 column 11 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Shufpd (va_op_xmm_xmm 2) (va_op_xmm_xmm 9) 2) (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 512 column 11 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Shufpd (va_op_xmm_xmm 12) (va_op_xmm_xmm 9) 0) (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 513 column 11 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Shufpd (va_op_xmm_xmm 13) (va_op_xmm_xmm 10) 2) (va_QBind va_range1
    "***** PRECONDITION NOT MET AT line 514 column 11 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Shufpd (va_op_xmm_xmm 14) (va_op_xmm_xmm 10) 0) (fun (va_s:va_state) _ -> let
    (va_arg90:Vale.Def.Types_s.quad32) = icb_BE in va_qPURE va_range1
    "***** PRECONDITION NOT MET AT line 516 column 32 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (fun (_:unit) -> Vale.Def.Types_s.reveal_reverse_bytes_quad32 va_arg90) (let
    (va_arg89:Vale.Def.Types_s.quad32) = va_get_xmm 2 va_s in va_qPURE va_range1
    "***** PRECONDITION NOT MET AT line 517 column 32 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (fun (_:unit) -> Vale.Def.Types_s.reveal_reverse_bytes_quad32 va_arg89) (let
    (va_arg88:Vale.Def.Types_s.quad32) = va_get_xmm 12 va_s in va_qPURE va_range1
    "***** PRECONDITION NOT MET AT line 518 column 32 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (fun (_:unit) -> Vale.Def.Types_s.reveal_reverse_bytes_quad32 va_arg88) (let
    (va_arg87:Vale.Def.Types_s.quad32) = va_get_xmm 13 va_s in va_qPURE va_range1
    "***** PRECONDITION NOT MET AT line 519 column 32 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (fun (_:unit) -> Vale.Def.Types_s.reveal_reverse_bytes_quad32 va_arg87) (let
    (va_arg86:Vale.Def.Types_s.quad32) = va_get_xmm 14 va_s in va_qPURE va_range1
    "***** PRECONDITION NOT MET AT line 520 column 32 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (fun (_:unit) -> Vale.Def.Types_s.reveal_reverse_bytes_quad32 va_arg86) (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 522 column 13 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Pshufb64 (va_op_xmm_xmm 9) (va_op_xmm_xmm 0)) (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 523 column 13 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Pshufb64 (va_op_xmm_xmm 10) (va_op_xmm_xmm 0)) (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 526 column 19 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 3) (va_op_reg_opr64_reg64
    rR8) 0 Secret keys_b 0) (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 527 column 19 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 4) (va_op_reg_opr64_reg64
    rR8) 16 Secret keys_b 1) (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 528 column 19 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 5) (va_op_reg_opr64_reg64
    rR8) 32 Secret keys_b 2) (va_QBind va_range1
    "***** PRECONDITION NOT MET AT line 529 column 19 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 6) (va_op_reg_opr64_reg64
    rR8) 48 Secret keys_b 3) (fun (va_s:va_state) _ -> va_qAssertSquash va_range1
    "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 530 column 5 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    ((fun a_336 (s_337:(FStar.Seq.Base.seq a_336)) (i_338:Prims.nat) -> let (i_312:Prims.nat) =
    i_338 in Prims.b2t (Prims.op_LessThan i_312 (FStar.Seq.Base.length #a_336 s_337))) quad32
    round_keys 0) (fun _ -> va_qAssert va_range1
    "***** PRECONDITION NOT MET AT line 530 column 5 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 3 va_s == FStar.Seq.Base.index #quad32 round_keys 0) (va_qAssertSquash va_range1
    "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 531 column 5 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    ((fun a_336 (s_337:(FStar.Seq.Base.seq a_336)) (i_338:Prims.nat) -> let (i_312:Prims.nat) =
    i_338 in Prims.b2t (Prims.op_LessThan i_312 (FStar.Seq.Base.length #a_336 s_337))) quad32
    round_keys 1) (fun _ -> va_qAssert va_range1
    "***** PRECONDITION NOT MET AT line 531 column 5 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 4 va_s == FStar.Seq.Base.index #quad32 round_keys 1) (va_qAssertSquash va_range1
    "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 532 column 5 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    ((fun a_336 (s_337:(FStar.Seq.Base.seq a_336)) (i_338:Prims.nat) -> let (i_312:Prims.nat) =
    i_338 in Prims.b2t (Prims.op_LessThan i_312 (FStar.Seq.Base.length #a_336 s_337))) quad32
    round_keys 2) (fun _ -> va_qAssert va_range1
    "***** PRECONDITION NOT MET AT line 532 column 5 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 5 va_s == FStar.Seq.Base.index #quad32 round_keys 2) (va_qAssertSquash va_range1
    "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 533 column 5 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    ((fun a_336 (s_337:(FStar.Seq.Base.seq a_336)) (i_338:Prims.nat) -> let (i_312:Prims.nat) =
    i_338 in Prims.b2t (Prims.op_LessThan i_312 (FStar.Seq.Base.length #a_336 s_337))) quad32
    round_keys 3) (fun _ -> va_qAssert va_range1
    "***** PRECONDITION NOT MET AT line 533 column 5 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 6 va_s == FStar.Seq.Base.index #quad32 round_keys 3) (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 536 column 10 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Paddd (va_op_xmm_xmm 9) (va_op_xmm_xmm 15)) (va_QBind va_range1
    "***** PRECONDITION NOT MET AT line 537 column 10 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Paddd (va_op_xmm_xmm 10) (va_op_xmm_xmm 15)) (fun (va_s:va_state) _ -> let
    (in1:quad32) = va_get_xmm 2 va_s in let (in2:quad32) = va_get_xmm 12 va_s in let (in3:quad32) =
    va_get_xmm 13 va_s in let (in4:quad32) = va_get_xmm 14 va_s in va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 546 column 9 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Pxor (va_op_xmm_xmm 2) (va_op_xmm_xmm 3)) (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 547 column 9 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Pxor (va_op_xmm_xmm 12) (va_op_xmm_xmm 3)) (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 548 column 9 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Pxor (va_op_xmm_xmm 13) (va_op_xmm_xmm 3)) (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 549 column 9 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Pxor (va_op_xmm_xmm 14) (va_op_xmm_xmm 3)) (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 551 column 13 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Pshufb64 (va_op_xmm_xmm 9) (va_op_xmm_xmm 0)) (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 552 column 13 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Pshufb64 (va_op_xmm_xmm 10) (va_op_xmm_xmm 0)) (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 554 column 20 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Aes_ctr_encrypt alg key round_keys keys_b in1 in2 in3 in4) (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 558 column 19 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Load128_buffer (va_op_heaplet_mem_heaplet 1) (va_op_xmm_xmm 7) (va_op_reg_opr64_reg64
    rR9) 0 Secret plain_b (4 `op_Multiply` count + 0)) (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 559 column 9 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Pxor (va_op_xmm_xmm 2) (va_op_xmm_xmm 7)) (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 560 column 19 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Load128_buffer (va_op_heaplet_mem_heaplet 1) (va_op_xmm_xmm 7) (va_op_reg_opr64_reg64
    rR9) 16 Secret plain_b (4 `op_Multiply` count + 1)) (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 561 column 9 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Pxor (va_op_xmm_xmm 12) (va_op_xmm_xmm 7)) (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 562 column 19 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Load128_buffer (va_op_heaplet_mem_heaplet 1) (va_op_xmm_xmm 7) (va_op_reg_opr64_reg64
    rR9) 32 Secret plain_b (4 `op_Multiply` count + 2)) (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 563 column 9 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Pxor (va_op_xmm_xmm 13) (va_op_xmm_xmm 7)) (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 564 column 19 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Load128_buffer (va_op_heaplet_mem_heaplet 1) (va_op_xmm_xmm 7) (va_op_reg_opr64_reg64
    rR9) 48 Secret plain_b (4 `op_Multiply` count + 3)) (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 565 column 9 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Pxor (va_op_xmm_xmm 14) (va_op_xmm_xmm 7)) (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 568 column 20 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 1) (va_op_reg_opr64_reg64 rR10)
    (va_op_xmm_xmm 2) 0 Secret out_b (4 `op_Multiply` count + 0)) (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 569 column 20 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 1) (va_op_reg_opr64_reg64 rR10)
    (va_op_xmm_xmm 12) 16 Secret out_b (4 `op_Multiply` count + 1)) (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 570 column 20 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 1) (va_op_reg_opr64_reg64 rR10)
    (va_op_xmm_xmm 13) 32 Secret out_b (4 `op_Multiply` count + 2)) (va_QBind va_range1
    "***** PRECONDITION NOT MET AT line 571 column 20 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 1) (va_op_reg_opr64_reg64 rR10)
    (va_op_xmm_xmm 14) 48 Secret out_b (4 `op_Multiply` count + 3)) (fun (va_s:va_state) _ ->
    va_qPURE va_range1
    "***** PRECONDITION NOT MET AT line 573 column 37 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (fun (_:unit) -> Vale.Arch.TypesNative.lemma_quad32_xor_commutes_forall ()) (va_qAssertSquash
    va_range1
    "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 576 column 5 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    ((fun a_1582 (s_1583:(FStar.Seq.Base.seq a_1582)) (i_1584:Prims.nat) (j_1585:Prims.nat) -> let
    (j_1545:Prims.nat) = j_1585 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1584
    j_1545) (Prims.op_LessThanOrEqual j_1545 (FStar.Seq.Base.length #a_1582 s_1583))))
    Vale.X64.Decls.quad32 (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_s) out_b) 0 (4
    `op_Multiply` count) /\ (fun a_1582 (s_1583:(FStar.Seq.Base.seq a_1582)) (i_1584:Prims.nat)
    (j_1585:Prims.nat) -> let (j_1545:Prims.nat) = j_1585 in Prims.b2t (Prims.op_AmpAmp
    (Prims.op_LessThanOrEqual i_1584 j_1545) (Prims.op_LessThanOrEqual j_1545
    (FStar.Seq.Base.length #a_1582 s_1583)))) Vale.X64.Decls.quad32
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_old_s) out_b) 0 (4 `op_Multiply`
    count)) (fun _ -> va_qAssert va_range1
    "***** PRECONDITION NOT MET AT line 576 column 5 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.buffer128_as_seq
    (va_get_mem_heaplet 1 va_s) out_b) 0 (4 `op_Multiply` count) == FStar.Seq.Base.slice
    #Vale.X64.Decls.quad32 (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_old_s) out_b)
    0 (4 `op_Multiply` count)) (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 579 column 18 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Aes_ctr_ghash old_out_ptr old_num_quad_blocks count out_b hash_init) (va_QSeq
    va_range1
    "***** PRECONDITION NOT MET AT line 581 column 10 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Sub64 (va_op_dst_opr64_reg64 rRdx) (va_const_opr64 1)) (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 582 column 10 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Add64 (va_op_dst_opr64_reg64 rR9) (va_const_opr64 64)) (va_QSeq va_range1
    "***** PRECONDITION NOT MET AT line 583 column 10 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Add64 (va_op_dst_opr64_reg64 rR10) (va_const_opr64 64)) (va_QEmpty
    (()))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))


val va_lemma_Aes_ctr_loop_body : va_b0:va_code -> va_s0:va_state -> alg:algorithm ->
  old_plain_ptr:nat64 -> old_out_ptr:nat64 -> old_num_quad_blocks:nat64 -> count:nat ->
  plain_b:buffer128 -> out_b:buffer128 -> key:(seq nat32) -> round_keys:(seq quad32) ->
  keys_b:buffer128 -> icb_BE:quad32 -> iv:quad32 -> hash_init:quad32
  -> Ghost (va_state & va_fuel)
  (requires (va_require_total va_b0 (va_code_Aes_ctr_loop_body alg) va_s0 /\ va_get_ok va_s0 /\
    (sse_enabled /\ (0 < va_get_reg64 rRdx va_s0 /\ va_get_reg64 rRdx va_s0 <= old_num_quad_blocks)
    /\ count == old_num_quad_blocks - va_get_reg64 rRdx va_s0 /\ Vale.X64.Decls.validSrcAddrs128
    (va_get_mem_heaplet 1 va_s0) old_plain_ptr plain_b (old_num_quad_blocks `op_Multiply` 4)
    (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 1
    va_s0) old_out_ptr out_b (old_num_quad_blocks `op_Multiply` 4) (va_get_mem_layout va_s0) Secret
    /\ va_get_reg64 rR9 va_s0 == old_plain_ptr + count `op_Multiply` 64 /\ va_get_reg64 rR10 va_s0
    == old_out_ptr + count `op_Multiply` 64 /\ old_plain_ptr + old_num_quad_blocks `op_Multiply` 64
    < pow2_64 /\ old_out_ptr + old_num_quad_blocks `op_Multiply` 64 < pow2_64 /\
    Vale.X64.Decls.buffer_length #Vale.X64.Memory.vuint128 plain_b <= Vale.X64.Decls.buffer_length
    #Vale.X64.Memory.vuint128 out_b /\ va_get_xmm 8 va_s0 == Vale.Def.Words_s.Mkfour
    #Vale.Def.Types_s.nat32 202182159 134810123 67438087 66051 /\ va_get_xmm 0 va_s0 ==
    Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 67438087 66051 202182159 134810123 /\
    va_get_xmm 15 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 4 0 4 0 /\ 4
    `op_Multiply` count < pow2_32 - 4 /\ va_get_xmm 9 va_s0 == Vale.Def.Words_s.Mkfour
    #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 iv)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32
    (Vale.Def.Words_s.__proj__Mkfour__item__lo0 icb_BE) (Vale.Arch.Types.add_wrap32 (4
    `op_Multiply` count) 1))) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 iv)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32
    (Vale.Def.Words_s.__proj__Mkfour__item__lo0 icb_BE) (Vale.Arch.Types.add_wrap32 (4
    `op_Multiply` count) 0))) /\ va_get_xmm 10 va_s0 == Vale.Def.Words_s.Mkfour
    #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 iv)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32
    (Vale.Def.Words_s.__proj__Mkfour__item__lo0 icb_BE) (Vale.Arch.Types.add_wrap32 (4
    `op_Multiply` count) 3))) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 iv)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32
    (Vale.Def.Words_s.__proj__Mkfour__item__lo0 icb_BE) (Vale.Arch.Types.add_wrap32 (4
    `op_Multiply` count) 2))) /\ aes_reqs alg key round_keys keys_b (va_get_reg64 rR8 va_s0)
    (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ pclmulqdq_enabled /\ iv ==
    Vale.Def.Types_s.reverse_bytes_quad32 icb_BE /\ va_get_reg64 rRdi va_s0 == Vale.Arch.Types.lo64
    iv /\ Vale.AES.GCTR.gctr_partial_def alg (4 `op_Multiply` count)
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_s0) plain_b)
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_s0) out_b) key icb_BE /\ va_get_xmm 1
    va_s0 == Vale.AES.GHash.ghash_incremental0 (Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm
    11 va_s0)) hash_init (FStar.Seq.Base.slice #Vale.X64.Decls.quad32
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_s0) out_b) 0 (4 `op_Multiply`
    count)))))
  (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
    (Vale.X64.Decls.modifies_buffer128 out_b (va_get_mem_heaplet 1 va_s0) (va_get_mem_heaplet 1
    va_sM) /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 1 va_sM) old_plain_ptr plain_b
    (old_num_quad_blocks `op_Multiply` 4) (va_get_mem_layout va_sM) Secret /\
    Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 1 va_sM) old_out_ptr out_b
    (old_num_quad_blocks `op_Multiply` 4) (va_get_mem_layout va_sM) Secret /\ va_get_reg64 rR9
    va_sM == va_get_reg64 rR9 va_s0 + 64 /\ va_get_reg64 rR10 va_sM == va_get_reg64 rR10 va_s0 + 64
    /\ va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_s0 - 1 /\ aes_reqs alg key round_keys keys_b
    (va_get_reg64 rR8 va_sM) (va_get_mem_heaplet 0 va_sM) (va_get_mem_layout va_sM) /\ va_get_xmm 8
    va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123 67438087 66051 /\
    va_get_xmm 9 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32
    (Vale.Def.Words_s.__proj__Mkfour__item__hi2 iv) (Vale.Def.Types_s.reverse_bytes_nat32
    (Vale.Arch.Types.add_wrap32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 icb_BE)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` count + 4) 1)))
    (Vale.Def.Words_s.__proj__Mkfour__item__hi2 iv) (Vale.Def.Types_s.reverse_bytes_nat32
    (Vale.Arch.Types.add_wrap32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 icb_BE)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` count + 4) 0))) /\ va_get_xmm 10 va_sM ==
    Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 iv)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32
    (Vale.Def.Words_s.__proj__Mkfour__item__lo0 icb_BE) (Vale.Arch.Types.add_wrap32 (4
    `op_Multiply` count + 4) 3))) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 iv)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32
    (Vale.Def.Words_s.__proj__Mkfour__item__lo0 icb_BE) (Vale.Arch.Types.add_wrap32 (4
    `op_Multiply` count + 4) 2))) /\ Vale.AES.GCTR.gctr_partial_def alg (4 `op_Multiply` count + 4)
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_s0) plain_b)
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_sM) out_b) key icb_BE /\ va_get_xmm 1
    va_sM == Vale.AES.GHash.ghash_incremental (Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 11
    va_sM)) hash_init (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.buffer128_as_seq
    (va_get_mem_heaplet 1 va_sM) out_b) 0 (4 `op_Multiply` (count + 1)))) /\ va_state_eq va_sM
    (va_update_mem_heaplet 1 va_sM (va_update_flags va_sM (va_update_reg64 rR12 va_sM
    (va_update_reg64 rR10 va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rR9 va_sM
    (va_update_xmm 1 va_sM (va_update_xmm 7 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM
    (va_update_xmm 12 va_sM (va_update_xmm 2 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM
    (va_update_xmm 3 va_sM (va_update_xmm 6 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM
    (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))
[@"opaque_to_smt"]
let va_lemma_Aes_ctr_loop_body va_b0 va_s0 alg old_plain_ptr old_out_ptr old_num_quad_blocks count
  plain_b out_b key round_keys keys_b icb_BE iv hash_init =
  let (va_mods:va_mods_t) = [va_Mod_mem_heaplet 1; va_Mod_flags; va_Mod_reg64 rR12; va_Mod_reg64
    rR10; va_Mod_reg64 rRdx; va_Mod_reg64 rR9; va_Mod_xmm 1; va_Mod_xmm 7; va_Mod_xmm 14;
    va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 2; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3;
    va_Mod_xmm 6; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_ok; va_Mod_mem] in
  let va_qc = va_qcode_Aes_ctr_loop_body va_mods alg old_plain_ptr old_out_ptr old_num_quad_blocks
    count plain_b out_b key round_keys keys_b icb_BE iv hash_init in
  let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Aes_ctr_loop_body alg) va_qc va_s0 (fun
    va_s0 va_sM va_g -> let () = va_g in label va_range1
    "***** POSTCONDITION NOT MET AT line 410 column 1 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_ok va_sM) /\ (label va_range1
    "***** POSTCONDITION NOT MET AT line 481 column 53 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (Vale.X64.Decls.modifies_buffer128 out_b (va_get_mem_heaplet 1 va_s0) (va_get_mem_heaplet 1
    va_sM)) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 484 column 101 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 1 va_sM) old_plain_ptr plain_b
    (old_num_quad_blocks `op_Multiply` 4) (va_get_mem_layout va_sM) Secret) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 485 column 101 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 1 va_sM) old_out_ptr out_b
    (old_num_quad_blocks `op_Multiply` 4) (va_get_mem_layout va_sM) Secret) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 486 column 41 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_reg64 rR9 va_sM == va_get_reg64 rR9 va_s0 + 64) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 487 column 41 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_reg64 rR10 va_sM == va_get_reg64 rR10 va_s0 + 64) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 488 column 52 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_s0 - 1) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 491 column 74 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (aes_reqs alg key round_keys keys_b (va_get_reg64 rR8 va_sM) (va_get_mem_heaplet 0 va_sM)
    (va_get_mem_layout va_sM)) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 494 column 71 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 8 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123
    67438087 66051) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 495 column 209 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 9 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32
    (Vale.Def.Words_s.__proj__Mkfour__item__hi2 iv) (Vale.Def.Types_s.reverse_bytes_nat32
    (Vale.Arch.Types.add_wrap32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 icb_BE)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` count + 4) 1)))
    (Vale.Def.Words_s.__proj__Mkfour__item__hi2 iv) (Vale.Def.Types_s.reverse_bytes_nat32
    (Vale.Arch.Types.add_wrap32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 icb_BE)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` count + 4) 0)))) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 496 column 209 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 10 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32
    (Vale.Def.Words_s.__proj__Mkfour__item__hi2 iv) (Vale.Def.Types_s.reverse_bytes_nat32
    (Vale.Arch.Types.add_wrap32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 icb_BE)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` count + 4) 3)))
    (Vale.Def.Words_s.__proj__Mkfour__item__hi2 iv) (Vale.Def.Types_s.reverse_bytes_nat32
    (Vale.Arch.Types.add_wrap32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 icb_BE)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` count + 4) 2)))) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 499 column 125 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (Vale.AES.GCTR.gctr_partial_def alg (4 `op_Multiply` count + 4)
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_s0) plain_b)
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_sM) out_b) key icb_BE) /\ label
    va_range1
    "***** POSTCONDITION NOT MET AT line 500 column 127 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 1 va_sM == Vale.AES.GHash.ghash_incremental (Vale.Def.Types_s.reverse_bytes_quad32
    (va_get_xmm 11 va_sM)) hash_init (FStar.Seq.Base.slice #Vale.X64.Decls.quad32
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_sM) out_b) 0 (4 `op_Multiply` (count
    + 1)))))) in
  assert_norm (va_qc.mods == va_mods);
  va_lemma_norm_mods ([va_Mod_mem_heaplet 1; va_Mod_flags; va_Mod_reg64 rR12; va_Mod_reg64 rR10;
    va_Mod_reg64 rRdx; va_Mod_reg64 rR9; va_Mod_xmm 1; va_Mod_xmm 7; va_Mod_xmm 14; va_Mod_xmm 13;
    va_Mod_xmm 12; va_Mod_xmm 2; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 6; va_Mod_xmm
    10; va_Mod_xmm 9; va_Mod_ok; va_Mod_mem]) va_sM va_s0;
  (va_sM, va_fM)

[@ va_qattr]
let va_wp_Aes_ctr_loop_body (alg:algorithm) (old_plain_ptr:nat64) (old_out_ptr:nat64)
  (old_num_quad_blocks:nat64) (count:nat) (plain_b:buffer128) (out_b:buffer128) (key:(seq nat32))
  (round_keys:(seq quad32)) (keys_b:buffer128) (icb_BE:quad32) (iv:quad32) (hash_init:quad32)
  (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
  (va_get_ok va_s0 /\ (sse_enabled /\ (0 < va_get_reg64 rRdx va_s0 /\ va_get_reg64 rRdx va_s0 <=
    old_num_quad_blocks) /\ count == old_num_quad_blocks - va_get_reg64 rRdx va_s0 /\
    Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 1 va_s0) old_plain_ptr plain_b
    (old_num_quad_blocks `op_Multiply` 4) (va_get_mem_layout va_s0) Secret /\
    Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 1 va_s0) old_out_ptr out_b
    (old_num_quad_blocks `op_Multiply` 4) (va_get_mem_layout va_s0) Secret /\ va_get_reg64 rR9
    va_s0 == old_plain_ptr + count `op_Multiply` 64 /\ va_get_reg64 rR10 va_s0 == old_out_ptr +
    count `op_Multiply` 64 /\ old_plain_ptr + old_num_quad_blocks `op_Multiply` 64 < pow2_64 /\
    old_out_ptr + old_num_quad_blocks `op_Multiply` 64 < pow2_64 /\ Vale.X64.Decls.buffer_length
    #Vale.X64.Memory.vuint128 plain_b <= Vale.X64.Decls.buffer_length #Vale.X64.Memory.vuint128
    out_b /\ va_get_xmm 8 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159
    134810123 67438087 66051 /\ va_get_xmm 0 va_s0 == Vale.Def.Words_s.Mkfour
    #Vale.Def.Types_s.nat32 67438087 66051 202182159 134810123 /\ va_get_xmm 15 va_s0 ==
    Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 4 0 4 0 /\ 4 `op_Multiply` count < pow2_32 - 4
    /\ va_get_xmm 9 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32
    (Vale.Def.Words_s.__proj__Mkfour__item__hi2 iv) (Vale.Def.Types_s.reverse_bytes_nat32
    (Vale.Arch.Types.add_wrap32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 icb_BE)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` count) 1)))
    (Vale.Def.Words_s.__proj__Mkfour__item__hi2 iv) (Vale.Def.Types_s.reverse_bytes_nat32
    (Vale.Arch.Types.add_wrap32 (Vale.Def.Words_s.__proj__Mkfour__item__lo0 icb_BE)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` count) 0))) /\ va_get_xmm 10 va_s0 ==
    Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 iv)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32
    (Vale.Def.Words_s.__proj__Mkfour__item__lo0 icb_BE) (Vale.Arch.Types.add_wrap32 (4
    `op_Multiply` count) 3))) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 iv)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32
    (Vale.Def.Words_s.__proj__Mkfour__item__lo0 icb_BE) (Vale.Arch.Types.add_wrap32 (4
    `op_Multiply` count) 2))) /\ aes_reqs alg key round_keys keys_b (va_get_reg64 rR8 va_s0)
    (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ pclmulqdq_enabled /\ iv ==
    Vale.Def.Types_s.reverse_bytes_quad32 icb_BE /\ va_get_reg64 rRdi va_s0 == Vale.Arch.Types.lo64
    iv /\ Vale.AES.GCTR.gctr_partial_def alg (4 `op_Multiply` count)
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_s0) plain_b)
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_s0) out_b) key icb_BE /\ va_get_xmm 1
    va_s0 == Vale.AES.GHash.ghash_incremental0 (Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm
    11 va_s0)) hash_init (FStar.Seq.Base.slice #Vale.X64.Decls.quad32
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_s0) out_b) 0 (4 `op_Multiply`
    count))) /\ (forall (va_x_mem:vale_heap) (va_x_xmm9:quad32) (va_x_xmm10:quad32)
    (va_x_xmm6:quad32) (va_x_xmm3:quad32) (va_x_xmm4:quad32) (va_x_xmm5:quad32) (va_x_xmm2:quad32)
    (va_x_xmm12:quad32) (va_x_xmm13:quad32) (va_x_xmm14:quad32) (va_x_xmm7:quad32)
    (va_x_xmm1:quad32) (va_x_r9:nat64) (va_x_rdx:nat64) (va_x_r10:nat64) (va_x_r12:nat64)
    (va_x_efl:Vale.X64.Flags.t) (va_x_heap1:vale_heap) . let va_sM = va_upd_mem_heaplet 1
    va_x_heap1 (va_upd_flags va_x_efl (va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR10 va_x_r10
    (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rR9 va_x_r9 (va_upd_xmm 1 va_x_xmm1 (va_upd_xmm 7
    va_x_xmm7 (va_upd_xmm 14 va_x_xmm14 (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12
    (va_upd_xmm 2 va_x_xmm2 (va_upd_xmm 5 va_x_xmm5 (va_upd_xmm 4 va_x_xmm4 (va_upd_xmm 3 va_x_xmm3
    (va_upd_xmm 6 va_x_xmm6 (va_upd_xmm 10 va_x_xmm10 (va_upd_xmm 9 va_x_xmm9 (va_upd_mem va_x_mem
    va_s0)))))))))))))))))) in va_get_ok va_sM /\ (Vale.X64.Decls.modifies_buffer128 out_b
    (va_get_mem_heaplet 1 va_s0) (va_get_mem_heaplet 1 va_sM) /\ Vale.X64.Decls.validSrcAddrs128
    (va_get_mem_heaplet 1 va_sM) old_plain_ptr plain_b (old_num_quad_blocks `op_Multiply` 4)
    (va_get_mem_layout va_sM) Secret /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 1
    va_sM) old_out_ptr out_b (old_num_quad_blocks `op_Multiply` 4) (va_get_mem_layout va_sM) Secret
    /\ va_get_reg64 rR9 va_sM == va_get_reg64 rR9 va_s0 + 64 /\ va_get_reg64 rR10 va_sM ==
    va_get_reg64 rR10 va_s0 + 64 /\ va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_s0 - 1 /\
    aes_reqs alg key round_keys keys_b (va_get_reg64 rR8 va_sM) (va_get_mem_heaplet 0 va_sM)
    (va_get_mem_layout va_sM) /\ va_get_xmm 8 va_sM == Vale.Def.Words_s.Mkfour
    #Vale.Def.Types_s.nat32 202182159 134810123 67438087 66051 /\ va_get_xmm 9 va_sM ==
    Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 iv)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32
    (Vale.Def.Words_s.__proj__Mkfour__item__lo0 icb_BE) (Vale.Arch.Types.add_wrap32 (4
    `op_Multiply` count + 4) 1))) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 iv)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32
    (Vale.Def.Words_s.__proj__Mkfour__item__lo0 icb_BE) (Vale.Arch.Types.add_wrap32 (4
    `op_Multiply` count + 4) 0))) /\ va_get_xmm 10 va_sM == Vale.Def.Words_s.Mkfour
    #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 iv)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32
    (Vale.Def.Words_s.__proj__Mkfour__item__lo0 icb_BE) (Vale.Arch.Types.add_wrap32 (4
    `op_Multiply` count + 4) 3))) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 iv)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32
    (Vale.Def.Words_s.__proj__Mkfour__item__lo0 icb_BE) (Vale.Arch.Types.add_wrap32 (4
    `op_Multiply` count + 4) 2))) /\ Vale.AES.GCTR.gctr_partial_def alg (4 `op_Multiply` count + 4)
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_s0) plain_b)
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_sM) out_b) key icb_BE /\ va_get_xmm 1
    va_sM == Vale.AES.GHash.ghash_incremental (Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 11
    va_sM)) hash_init (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.buffer128_as_seq
    (va_get_mem_heaplet 1 va_sM) out_b) 0 (4 `op_Multiply` (count + 1)))) ==> va_k va_sM (())))


val va_wpProof_Aes_ctr_loop_body : alg:algorithm -> old_plain_ptr:nat64 -> old_out_ptr:nat64 ->
  old_num_quad_blocks:nat64 -> count:nat -> plain_b:buffer128 -> out_b:buffer128 -> key:(seq nat32)
  -> round_keys:(seq quad32) -> keys_b:buffer128 -> icb_BE:quad32 -> iv:quad32 -> hash_init:quad32
  -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
  -> Ghost (va_state & va_fuel & unit)
  (requires (va_t_require va_s0 /\ va_wp_Aes_ctr_loop_body alg old_plain_ptr old_out_ptr
    old_num_quad_blocks count plain_b out_b key round_keys keys_b icb_BE iv hash_init va_s0 va_k))
  (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Aes_ctr_loop_body alg)
    ([va_Mod_mem_heaplet 1; va_Mod_flags; va_Mod_reg64 rR12; va_Mod_reg64 rR10; va_Mod_reg64 rRdx;
    va_Mod_reg64 rR9; va_Mod_xmm 1; va_Mod_xmm 7; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12;
    va_Mod_xmm 2; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 6; va_Mod_xmm 10; va_Mod_xmm
    9; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@"opaque_to_smt"]
let va_wpProof_Aes_ctr_loop_body alg old_plain_ptr old_out_ptr old_num_quad_blocks count plain_b
  out_b key round_keys keys_b icb_BE iv hash_init va_s0 va_k =
  let (va_sM, va_f0) = va_lemma_Aes_ctr_loop_body (va_code_Aes_ctr_loop_body alg) va_s0 alg
    old_plain_ptr old_out_ptr old_num_quad_blocks count plain_b out_b key round_keys keys_b icb_BE
    iv hash_init in
  va_lemma_upd_update va_sM;
  assert (va_state_eq va_sM (va_update_mem_heaplet 1 va_sM (va_update_flags va_sM (va_update_reg64
    rR12 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rR9 va_sM
    (va_update_xmm 1 va_sM (va_update_xmm 7 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM
    (va_update_xmm 12 va_sM (va_update_xmm 2 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM
    (va_update_xmm 3 va_sM (va_update_xmm 6 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM
    (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))));
  va_lemma_norm_mods ([va_Mod_mem_heaplet 1; va_Mod_flags; va_Mod_reg64 rR12; va_Mod_reg64 rR10;
    va_Mod_reg64 rRdx; va_Mod_reg64 rR9; va_Mod_xmm 1; va_Mod_xmm 7; va_Mod_xmm 14; va_Mod_xmm 13;
    va_Mod_xmm 12; va_Mod_xmm 2; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 6; va_Mod_xmm
    10; va_Mod_xmm 9; va_Mod_mem]) va_sM va_s0;
  let va_g = () in
  (va_sM, va_f0, va_g)

[@ "opaque_to_smt" va_qattr]
let va_quick_Aes_ctr_loop_body (alg:algorithm) (old_plain_ptr:nat64) (old_out_ptr:nat64)
  (old_num_quad_blocks:nat64) (count:nat) (plain_b:buffer128) (out_b:buffer128) (key:(seq nat32))
  (round_keys:(seq quad32)) (keys_b:buffer128) (icb_BE:quad32) (iv:quad32) (hash_init:quad32) :
  (va_quickCode unit (va_code_Aes_ctr_loop_body alg)) =
  (va_QProc (va_code_Aes_ctr_loop_body alg) ([va_Mod_mem_heaplet 1; va_Mod_flags; va_Mod_reg64
    rR12; va_Mod_reg64 rR10; va_Mod_reg64 rRdx; va_Mod_reg64 rR9; va_Mod_xmm 1; va_Mod_xmm 7;
    va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 2; va_Mod_xmm 5; va_Mod_xmm 4;
    va_Mod_xmm 3; va_Mod_xmm 6; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_mem]) (va_wp_Aes_ctr_loop_body
    alg old_plain_ptr old_out_ptr old_num_quad_blocks count plain_b out_b key round_keys keys_b
    icb_BE iv hash_init) (va_wpProof_Aes_ctr_loop_body alg old_plain_ptr old_out_ptr
    old_num_quad_blocks count plain_b out_b key round_keys keys_b icb_BE iv hash_init))
#pop-options
//--
//-- Aes_counter_loop_body0
#push-options "--z3rlimit 800"

val va_code_Aes_counter_loop_body0 : alg:algorithm -> Tot va_code
[@ "opaque_to_smt" va_qattr]
let va_code_Aes_counter_loop_body0 alg =
  (va_Block (va_CCons (va_code_Aes_ctr_loop_body alg) (va_CNil ())))

val va_codegen_success_Aes_counter_loop_body0 : alg:algorithm -> Tot va_pbool
[@ "opaque_to_smt" va_qattr]
let va_codegen_success_Aes_counter_loop_body0 alg =
  (va_pbool_and (va_codegen_success_Aes_ctr_loop_body alg) (va_ttrue ()))

[@ "opaque_to_smt" va_qattr]
let va_qcode_Aes_counter_loop_body0 (va_mods:va_mods_t) (va_old:va_state) (alg:algorithm)
  (va_in_icb_BE:quad32) (va_in_key:(seq nat32)) (va_in_keys_b:buffer128) (va_in_old_iv:quad32)
  (va_in_out_b:buffer128) (va_in_plain_b:buffer128) (va_in_round_keys:(seq quad32))
  (va_in_count:nat) : (va_quickCode (nat) (va_code_Aes_counter_loop_body0 alg)) =
  (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in let (icb_BE:quad32) =
    va_in_icb_BE in let (key:(seq nat32)) = va_in_key in let (keys_b:buffer128) = va_in_keys_b in
    let (old_iv:quad32) = va_in_old_iv in let (out_b:buffer128) = va_in_out_b in let
    (plain_b:buffer128) = va_in_plain_b in let (round_keys:(seq quad32)) = va_in_round_keys in let
    (count:nat) = va_in_count in va_QBind va_range1
    "***** PRECONDITION NOT MET AT line 739 column 26 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Aes_ctr_loop_body alg (va_get_reg64 rR9 va_old) (va_get_reg64 rR10 va_old)
    (va_get_reg64 rRdx va_old) count plain_b out_b key round_keys keys_b icb_BE old_iv (va_get_xmm
    1 va_old)) (fun (va_s:va_state) _ -> let (count:nat) = count + 1 in va_QEmpty ((count)))))


val va_lemma_Aes_counter_loop_body0 : va_b0:va_code -> va_s0:va_state -> va_old:va_state ->
  alg:algorithm -> va_in_icb_BE:quad32 -> va_in_key:(seq nat32) -> va_in_keys_b:buffer128 ->
  va_in_old_iv:quad32 -> va_in_out_b:buffer128 -> va_in_plain_b:buffer128 -> va_in_round_keys:(seq
  quad32) -> va_in_count:nat
  -> Ghost (va_state & va_fuel & nat)
  (requires (va_require_total va_b0 (va_code_Aes_counter_loop_body0 alg) va_s0 /\ va_get_ok va_s0
    /\ sse_enabled /\ (0 < va_get_reg64 rRdx va_old /\ 4 `op_Multiply` va_get_reg64 rRdx va_old <
    pow2_32 - 4) /\ (0 <= va_get_reg64 rRdx va_s0 /\ va_get_reg64 rRdx va_s0 <= va_get_reg64 rRdx
    va_old) /\ va_in_count == va_get_reg64 rRdx va_old - va_get_reg64 rRdx va_s0 /\ (0 <=
    va_in_count /\ va_in_count <= pow2_32 - 4) /\ Vale.X64.Decls.modifies_buffer128 va_in_out_b
    (va_get_mem_heaplet 1 va_old) (va_get_mem_heaplet 1 va_s0) /\ Vale.X64.Decls.buffer128_as_seq
    (va_get_mem_heaplet 1 va_s0) va_in_plain_b == Vale.X64.Decls.buffer128_as_seq
    (va_get_mem_heaplet 1 va_old) va_in_plain_b /\ Vale.X64.Decls.validSrcAddrs128
    (va_get_mem_heaplet 1 va_s0) (va_get_reg64 rR9 va_old) va_in_plain_b (va_get_reg64 rRdx va_old
    `op_Multiply` 4) (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs128
    (va_get_mem_heaplet 1 va_s0) (va_get_reg64 rR10 va_old) va_in_out_b (va_get_reg64 rRdx va_old
    `op_Multiply` 4) (va_get_mem_layout va_s0) Secret /\ va_get_reg64 rR9 va_s0 == va_get_reg64 rR9
    va_old + va_in_count `op_Multiply` 64 /\ va_get_reg64 rR10 va_s0 == va_get_reg64 rR10 va_old +
    va_in_count `op_Multiply` 64 /\ va_get_reg64 rR9 va_old + va_get_reg64 rRdx va_old
    `op_Multiply` 64 < pow2_64 /\ va_get_reg64 rR10 va_old + va_get_reg64 rRdx va_old `op_Multiply`
    64 < pow2_64 /\ Vale.X64.Decls.buffer_length #Vale.X64.Memory.vuint128 va_in_plain_b <=
    Vale.X64.Decls.buffer_length #Vale.X64.Memory.vuint128 va_in_out_b /\
    Vale.X64.Decls.buffers_disjoint128 va_in_plain_b va_in_out_b /\ va_get_xmm 8 va_s0 ==
    Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123 67438087 66051 /\
    va_get_xmm 0 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 67438087 66051 202182159
    134810123 /\ va_get_xmm 15 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 4 0 4 0 /\
    (va_get_reg64 rRdx va_s0 > 0 ==> 4 `op_Multiply` va_in_count < pow2_32 - 4) /\ (va_get_reg64
    rRdx va_s0 <= 0 ==> 4 `op_Multiply` va_in_count < pow2_32) /\ va_get_xmm 9 va_s0 ==
    Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` va_in_count) 1))) (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` va_in_count) 0))) /\ va_get_xmm 10 va_s0 ==
    Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` va_in_count) 3))) (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` va_in_count) 2))) /\ aes_reqs alg va_in_key
    va_in_round_keys va_in_keys_b (va_get_reg64 rR8 va_s0) (va_get_mem_heaplet 0 va_s0)
    (va_get_mem_layout va_s0) /\ pclmulqdq_enabled /\ va_in_old_iv ==
    Vale.Def.Types_s.reverse_bytes_quad32 va_in_icb_BE /\ va_get_reg64 rRdi va_s0 ==
    Vale.Arch.Types.lo64 va_in_old_iv /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32
    (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.buffer128_as_seq
    (va_get_mem_heaplet 1 va_s0) va_in_out_b) 0 (4 `op_Multiply` va_get_reg64 rRdx va_old)) > 0 /\
    va_get_xmm 1 va_s0 == Vale.AES.GHash.ghash_incremental0 (Vale.Def.Types_s.reverse_bytes_quad32
    (va_get_xmm 11 va_s0)) (va_get_xmm 1 va_old) (FStar.Seq.Base.slice #Vale.X64.Decls.quad32
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_s0) va_in_out_b) 0 (4 `op_Multiply`
    va_in_count)) /\ Vale.AES.GCTR.gctr_partial_def alg (4 `op_Multiply` va_in_count)
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_old) va_in_plain_b)
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_s0) va_in_out_b) va_in_key
    va_in_icb_BE /\ va_get_reg64 rRdx va_s0 > 0))
  (ensures (fun (va_sM, va_fM, count) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM
    /\ sse_enabled /\ (0 < va_get_reg64 rRdx va_old /\ 4 `op_Multiply` va_get_reg64 rRdx va_old <
    pow2_32 - 4) /\ (0 <= va_get_reg64 rRdx va_sM /\ va_get_reg64 rRdx va_sM <= va_get_reg64 rRdx
    va_old) /\ count == va_get_reg64 rRdx va_old - va_get_reg64 rRdx va_sM /\ (0 <= count /\ count
    <= pow2_32 - 4) /\ Vale.X64.Decls.modifies_buffer128 va_in_out_b (va_get_mem_heaplet 1 va_old)
    (va_get_mem_heaplet 1 va_sM) /\ Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_sM)
    va_in_plain_b == Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_old) va_in_plain_b /\
    Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 1 va_sM) (va_get_reg64 rR9 va_old)
    va_in_plain_b (va_get_reg64 rRdx va_old `op_Multiply` 4) (va_get_mem_layout va_sM) Secret /\
    Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 1 va_sM) (va_get_reg64 rR10 va_old)
    va_in_out_b (va_get_reg64 rRdx va_old `op_Multiply` 4) (va_get_mem_layout va_sM) Secret /\
    va_get_reg64 rR9 va_sM == va_get_reg64 rR9 va_old + count `op_Multiply` 64 /\ va_get_reg64 rR10
    va_sM == va_get_reg64 rR10 va_old + count `op_Multiply` 64 /\ va_get_reg64 rR9 va_old +
    va_get_reg64 rRdx va_old `op_Multiply` 64 < pow2_64 /\ va_get_reg64 rR10 va_old + va_get_reg64
    rRdx va_old `op_Multiply` 64 < pow2_64 /\ Vale.X64.Decls.buffer_length
    #Vale.X64.Memory.vuint128 va_in_plain_b <= Vale.X64.Decls.buffer_length
    #Vale.X64.Memory.vuint128 va_in_out_b /\ Vale.X64.Decls.buffers_disjoint128 va_in_plain_b
    va_in_out_b /\ va_get_xmm 8 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159
    134810123 67438087 66051 /\ va_get_xmm 0 va_sM == Vale.Def.Words_s.Mkfour
    #Vale.Def.Types_s.nat32 67438087 66051 202182159 134810123 /\ va_get_xmm 15 va_sM ==
    Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 4 0 4 0 /\ (va_get_reg64 rRdx va_sM > 0 ==> 4
    `op_Multiply` count < pow2_32 - 4) /\ (va_get_reg64 rRdx va_sM <= 0 ==> 4 `op_Multiply` count <
    pow2_32) /\ va_get_xmm 9 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32
    (va_in_old_iv.hi2) (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32
    (va_in_icb_BE.lo0) (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` count) 1))) (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` count) 0))) /\ va_get_xmm 10 va_sM ==
    Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` count) 3))) (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` count) 2))) /\ aes_reqs alg va_in_key
    va_in_round_keys va_in_keys_b (va_get_reg64 rR8 va_sM) (va_get_mem_heaplet 0 va_sM)
    (va_get_mem_layout va_sM) /\ pclmulqdq_enabled /\ va_in_old_iv ==
    Vale.Def.Types_s.reverse_bytes_quad32 va_in_icb_BE /\ va_get_reg64 rRdi va_sM ==
    Vale.Arch.Types.lo64 va_in_old_iv /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32
    (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.buffer128_as_seq
    (va_get_mem_heaplet 1 va_sM) va_in_out_b) 0 (4 `op_Multiply` va_get_reg64 rRdx va_old)) > 0 /\
    va_get_xmm 1 va_sM == Vale.AES.GHash.ghash_incremental0 (Vale.Def.Types_s.reverse_bytes_quad32
    (va_get_xmm 11 va_sM)) (va_get_xmm 1 va_old) (FStar.Seq.Base.slice #Vale.X64.Decls.quad32
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_sM) va_in_out_b) 0 (4 `op_Multiply`
    count)) /\ Vale.AES.GCTR.gctr_partial_def alg (4 `op_Multiply` count)
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_old) va_in_plain_b)
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_sM) va_in_out_b) va_in_key
    va_in_icb_BE /\ precedes_wrap (va_get_reg64 rRdx va_sM) (va_get_reg64 rRdx va_s0) /\
    va_state_eq va_sM (va_update_xmm 9 va_sM (va_update_xmm 7 va_sM (va_update_xmm 6 va_sM
    (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM
    (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 10 va_sM
    (va_update_xmm 1 va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rR9 va_sM (va_update_reg64
    rR12 va_sM (va_update_reg64 rR10 va_sM (va_update_ok va_sM (va_update_mem va_sM
    (va_update_mem_heaplet 1 va_sM (va_update_flags va_sM va_s0))))))))))))))))))))))
[@"opaque_to_smt"]
let va_lemma_Aes_counter_loop_body0 va_b0 va_s0 va_old alg va_in_icb_BE va_in_key va_in_keys_b
  va_in_old_iv va_in_out_b va_in_plain_b va_in_round_keys va_in_count =
  let va_old = va_expand_state va_old in
  let (va_mods:va_mods_t) = [va_Mod_xmm 9; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4;
    va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 10;
    va_Mod_xmm 1; va_Mod_reg64 rRdx; va_Mod_reg64 rR9; va_Mod_reg64 rR12; va_Mod_reg64 rR10;
    va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 1; va_Mod_flags] in
  let va_qc = va_qcode_Aes_counter_loop_body0 va_mods va_old alg va_in_icb_BE va_in_key
    va_in_keys_b va_in_old_iv va_in_out_b va_in_plain_b va_in_round_keys va_in_count in
  let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Aes_counter_loop_body0 alg) va_qc va_s0
    (fun va_s0 va_sM va_g -> let count = va_g in label va_range1
    "***** POSTCONDITION NOT MET AT line 586 column 1 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_ok va_sM) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 693 column 24 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    sse_enabled /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 695 column 77 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (0 < va_get_reg64 rRdx va_old /\ 4 `op_Multiply` va_get_reg64 rRdx va_old < pow2_32 - 4) /\
    label va_range1
    "***** POSTCONDITION NOT MET AT line 696 column 57 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (0 <= va_get_reg64 rRdx va_sM /\ va_get_reg64 rRdx va_sM <= va_get_reg64 rRdx va_old) /\ label
    va_range1
    "***** POSTCONDITION NOT MET AT line 697 column 60 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (count == va_get_reg64 rRdx va_old - va_get_reg64 rRdx va_sM) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 698 column 38 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (0 <= count /\ count <= pow2_32 - 4) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 701 column 57 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (Vale.X64.Decls.modifies_buffer128 va_in_out_b (va_get_mem_heaplet 1 va_old)
    (va_get_mem_heaplet 1 va_sM)) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 702 column 86 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_sM) va_in_plain_b ==
    Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_old) va_in_plain_b) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 705 column 107 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 1 va_sM) (va_get_reg64 rR9 va_old)
    va_in_plain_b (va_get_reg64 rRdx va_old `op_Multiply` 4) (va_get_mem_layout va_sM) Secret) /\
    label va_range1
    "***** POSTCONDITION NOT MET AT line 706 column 107 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 1 va_sM) (va_get_reg64 rR10 va_old)
    va_in_out_b (va_get_reg64 rRdx va_old `op_Multiply` 4) (va_get_mem_layout va_sM) Secret) /\
    label va_range1
    "***** POSTCONDITION NOT MET AT line 707 column 53 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_reg64 rR9 va_sM == va_get_reg64 rR9 va_old + count `op_Multiply` 64) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 708 column 49 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_reg64 rR10 va_sM == va_get_reg64 rR10 va_old + count `op_Multiply` 64) /\ label
    va_range1
    "***** POSTCONDITION NOT MET AT line 709 column 65 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_reg64 rR9 va_old + va_get_reg64 rRdx va_old `op_Multiply` 64 < pow2_64) /\ label
    va_range1
    "***** POSTCONDITION NOT MET AT line 710 column 63 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_reg64 rR10 va_old + va_get_reg64 rRdx va_old `op_Multiply` 64 < pow2_64) /\ label
    va_range1
    "***** POSTCONDITION NOT MET AT line 711 column 60 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (Vale.X64.Decls.buffer_length #Vale.X64.Memory.vuint128 va_in_plain_b <=
    Vale.X64.Decls.buffer_length #Vale.X64.Memory.vuint128 va_in_out_b) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 712 column 48 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (Vale.X64.Decls.buffers_disjoint128 va_in_plain_b va_in_out_b) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 715 column 75 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 8 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123
    67438087 66051) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 716 column 77 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 0 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 67438087 66051 202182159
    134810123) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 717 column 39 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 15 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 4 0 4 0) /\ label
    va_range1
    "***** POSTCONDITION NOT MET AT line 720 column 58 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_reg64 rRdx va_sM > 0 ==> 4 `op_Multiply` count < pow2_32 - 4) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 721 column 55 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_reg64 rRdx va_sM <= 0 ==> 4 `op_Multiply` count < pow2_32) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 722 column 213 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 9 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` count) 1))) (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` count) 0)))) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 723 column 213 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 10 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` count) 3))) (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` count) 2)))) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 726 column 78 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (aes_reqs alg va_in_key va_in_round_keys va_in_keys_b (va_get_reg64 rR8 va_sM)
    (va_get_mem_heaplet 0 va_sM) (va_get_mem_layout va_sM)) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 729 column 30 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    pclmulqdq_enabled /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 730 column 51 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_in_old_iv == Vale.Def.Types_s.reverse_bytes_quad32 va_in_icb_BE) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 731 column 39 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_reg64 rRdi va_sM == Vale.Arch.Types.lo64 va_in_old_iv) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 734 column 91 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (FStar.Seq.Base.slice #Vale.X64.Decls.quad32
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_sM) va_in_out_b) 0 (4 `op_Multiply`
    va_get_reg64 rRdx va_old)) > 0) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 735 column 128 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_get_xmm 1 va_sM == Vale.AES.GHash.ghash_incremental0 (Vale.Def.Types_s.reverse_bytes_quad32
    (va_get_xmm 11 va_sM)) (va_get_xmm 1 va_old) (FStar.Seq.Base.slice #Vale.X64.Decls.quad32
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_sM) va_in_out_b) 0 (4 `op_Multiply`
    count))) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 736 column 127 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (Vale.AES.GCTR.gctr_partial_def alg (4 `op_Multiply` count) (Vale.X64.Decls.buffer128_as_seq
    (va_get_mem_heaplet 1 va_old) va_in_plain_b) (Vale.X64.Decls.buffer128_as_seq
    (va_get_mem_heaplet 1 va_sM) va_in_out_b) va_in_key va_in_icb_BE) /\ label va_range1
    "***** POSTCONDITION NOT MET AT line 737 column 9 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (precedes_wrap (va_get_reg64 rRdx va_sM) (va_get_reg64 rRdx va_s0))) in
  assert_norm (va_qc.mods == va_mods);
  va_lemma_norm_mods ([va_Mod_xmm 9; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4;
    va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 10;
    va_Mod_xmm 1; va_Mod_reg64 rRdx; va_Mod_reg64 rR9; va_Mod_reg64 rR12; va_Mod_reg64 rR10;
    va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 1; va_Mod_flags]) va_sM va_s0;
  let count = va_g in
  (va_sM, va_fM, count)

[@ va_qattr]
let va_wp_Aes_counter_loop_body0 (va_old:va_state) (alg:algorithm) (va_in_icb_BE:quad32)
  (va_in_key:(seq nat32)) (va_in_keys_b:buffer128) (va_in_old_iv:quad32) (va_in_out_b:buffer128)
  (va_in_plain_b:buffer128) (va_in_round_keys:(seq quad32)) (va_in_count:nat) (va_s0:va_state)
  (va_k:(va_state -> nat -> Type0)) : Type0 =
  (va_get_ok va_s0 /\ sse_enabled /\ (0 < va_get_reg64 rRdx va_old /\ 4 `op_Multiply` va_get_reg64
    rRdx va_old < pow2_32 - 4) /\ (0 <= va_get_reg64 rRdx va_s0 /\ va_get_reg64 rRdx va_s0 <=
    va_get_reg64 rRdx va_old) /\ va_in_count == va_get_reg64 rRdx va_old - va_get_reg64 rRdx va_s0
    /\ (0 <= va_in_count /\ va_in_count <= pow2_32 - 4) /\ Vale.X64.Decls.modifies_buffer128
    va_in_out_b (va_get_mem_heaplet 1 va_old) (va_get_mem_heaplet 1 va_s0) /\
    Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_s0) va_in_plain_b ==
    Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_old) va_in_plain_b /\
    Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 1 va_s0) (va_get_reg64 rR9 va_old)
    va_in_plain_b (va_get_reg64 rRdx va_old `op_Multiply` 4) (va_get_mem_layout va_s0) Secret /\
    Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 1 va_s0) (va_get_reg64 rR10 va_old)
    va_in_out_b (va_get_reg64 rRdx va_old `op_Multiply` 4) (va_get_mem_layout va_s0) Secret /\
    va_get_reg64 rR9 va_s0 == va_get_reg64 rR9 va_old + va_in_count `op_Multiply` 64 /\
    va_get_reg64 rR10 va_s0 == va_get_reg64 rR10 va_old + va_in_count `op_Multiply` 64 /\
    va_get_reg64 rR9 va_old + va_get_reg64 rRdx va_old `op_Multiply` 64 < pow2_64 /\ va_get_reg64
    rR10 va_old + va_get_reg64 rRdx va_old `op_Multiply` 64 < pow2_64 /\
    Vale.X64.Decls.buffer_length #Vale.X64.Memory.vuint128 va_in_plain_b <=
    Vale.X64.Decls.buffer_length #Vale.X64.Memory.vuint128 va_in_out_b /\
    Vale.X64.Decls.buffers_disjoint128 va_in_plain_b va_in_out_b /\ va_get_xmm 8 va_s0 ==
    Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123 67438087 66051 /\
    va_get_xmm 0 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 67438087 66051 202182159
    134810123 /\ va_get_xmm 15 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 4 0 4 0 /\
    (va_get_reg64 rRdx va_s0 > 0 ==> 4 `op_Multiply` va_in_count < pow2_32 - 4) /\ (va_get_reg64
    rRdx va_s0 <= 0 ==> 4 `op_Multiply` va_in_count < pow2_32) /\ va_get_xmm 9 va_s0 ==
    Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` va_in_count) 1))) (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` va_in_count) 0))) /\ va_get_xmm 10 va_s0 ==
    Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` va_in_count) 3))) (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` va_in_count) 2))) /\ aes_reqs alg va_in_key
    va_in_round_keys va_in_keys_b (va_get_reg64 rR8 va_s0) (va_get_mem_heaplet 0 va_s0)
    (va_get_mem_layout va_s0) /\ pclmulqdq_enabled /\ va_in_old_iv ==
    Vale.Def.Types_s.reverse_bytes_quad32 va_in_icb_BE /\ va_get_reg64 rRdi va_s0 ==
    Vale.Arch.Types.lo64 va_in_old_iv /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32
    (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.buffer128_as_seq
    (va_get_mem_heaplet 1 va_s0) va_in_out_b) 0 (4 `op_Multiply` va_get_reg64 rRdx va_old)) > 0 /\
    va_get_xmm 1 va_s0 == Vale.AES.GHash.ghash_incremental0 (Vale.Def.Types_s.reverse_bytes_quad32
    (va_get_xmm 11 va_s0)) (va_get_xmm 1 va_old) (FStar.Seq.Base.slice #Vale.X64.Decls.quad32
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_s0) va_in_out_b) 0 (4 `op_Multiply`
    va_in_count)) /\ Vale.AES.GCTR.gctr_partial_def alg (4 `op_Multiply` va_in_count)
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_old) va_in_plain_b)
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_s0) va_in_out_b) va_in_key
    va_in_icb_BE /\ va_get_reg64 rRdx va_s0 > 0 /\ (forall (va_x_efl:Vale.X64.Flags.t)
    (va_x_heap1:vale_heap) (va_x_mem:vale_heap) (va_x_ok:bool) (va_x_r10:nat64) (va_x_r12:nat64)
    (va_x_r9:nat64) (va_x_rdx:nat64) (va_x_xmm1:quad32) (va_x_xmm10:quad32) (va_x_xmm12:quad32)
    (va_x_xmm13:quad32) (va_x_xmm14:quad32) (va_x_xmm2:quad32) (va_x_xmm3:quad32)
    (va_x_xmm4:quad32) (va_x_xmm5:quad32) (va_x_xmm6:quad32) (va_x_xmm7:quad32) (va_x_xmm9:quad32)
    (count:nat) . let va_sM = va_upd_xmm 9 va_x_xmm9 (va_upd_xmm 7 va_x_xmm7 (va_upd_xmm 6
    va_x_xmm6 (va_upd_xmm 5 va_x_xmm5 (va_upd_xmm 4 va_x_xmm4 (va_upd_xmm 3 va_x_xmm3 (va_upd_xmm 2
    va_x_xmm2 (va_upd_xmm 14 va_x_xmm14 (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12
    (va_upd_xmm 10 va_x_xmm10 (va_upd_xmm 1 va_x_xmm1 (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rR9
    va_x_r9 (va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR10 va_x_r10 (va_upd_ok va_x_ok (va_upd_mem
    va_x_mem (va_upd_mem_heaplet 1 va_x_heap1 (va_upd_flags va_x_efl va_s0))))))))))))))))))) in
    va_get_ok va_sM /\ sse_enabled /\ (0 < va_get_reg64 rRdx va_old /\ 4 `op_Multiply` va_get_reg64
    rRdx va_old < pow2_32 - 4) /\ (0 <= va_get_reg64 rRdx va_sM /\ va_get_reg64 rRdx va_sM <=
    va_get_reg64 rRdx va_old) /\ count == va_get_reg64 rRdx va_old - va_get_reg64 rRdx va_sM /\ (0
    <= count /\ count <= pow2_32 - 4) /\ Vale.X64.Decls.modifies_buffer128 va_in_out_b
    (va_get_mem_heaplet 1 va_old) (va_get_mem_heaplet 1 va_sM) /\ Vale.X64.Decls.buffer128_as_seq
    (va_get_mem_heaplet 1 va_sM) va_in_plain_b == Vale.X64.Decls.buffer128_as_seq
    (va_get_mem_heaplet 1 va_old) va_in_plain_b /\ Vale.X64.Decls.validSrcAddrs128
    (va_get_mem_heaplet 1 va_sM) (va_get_reg64 rR9 va_old) va_in_plain_b (va_get_reg64 rRdx va_old
    `op_Multiply` 4) (va_get_mem_layout va_sM) Secret /\ Vale.X64.Decls.validDstAddrs128
    (va_get_mem_heaplet 1 va_sM) (va_get_reg64 rR10 va_old) va_in_out_b (va_get_reg64 rRdx va_old
    `op_Multiply` 4) (va_get_mem_layout va_sM) Secret /\ va_get_reg64 rR9 va_sM == va_get_reg64 rR9
    va_old + count `op_Multiply` 64 /\ va_get_reg64 rR10 va_sM == va_get_reg64 rR10 va_old + count
    `op_Multiply` 64 /\ va_get_reg64 rR9 va_old + va_get_reg64 rRdx va_old `op_Multiply` 64 <
    pow2_64 /\ va_get_reg64 rR10 va_old + va_get_reg64 rRdx va_old `op_Multiply` 64 < pow2_64 /\
    Vale.X64.Decls.buffer_length #Vale.X64.Memory.vuint128 va_in_plain_b <=
    Vale.X64.Decls.buffer_length #Vale.X64.Memory.vuint128 va_in_out_b /\
    Vale.X64.Decls.buffers_disjoint128 va_in_plain_b va_in_out_b /\ va_get_xmm 8 va_sM ==
    Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123 67438087 66051 /\
    va_get_xmm 0 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 67438087 66051 202182159
    134810123 /\ va_get_xmm 15 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 4 0 4 0 /\
    (va_get_reg64 rRdx va_sM > 0 ==> 4 `op_Multiply` count < pow2_32 - 4) /\ (va_get_reg64 rRdx
    va_sM <= 0 ==> 4 `op_Multiply` count < pow2_32) /\ va_get_xmm 9 va_sM ==
    Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` count) 1))) (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` count) 0))) /\ va_get_xmm 10 va_sM ==
    Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` count) 3))) (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` count) 2))) /\ aes_reqs alg va_in_key
    va_in_round_keys va_in_keys_b (va_get_reg64 rR8 va_sM) (va_get_mem_heaplet 0 va_sM)
    (va_get_mem_layout va_sM) /\ pclmulqdq_enabled /\ va_in_old_iv ==
    Vale.Def.Types_s.reverse_bytes_quad32 va_in_icb_BE /\ va_get_reg64 rRdi va_sM ==
    Vale.Arch.Types.lo64 va_in_old_iv /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32
    (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.buffer128_as_seq
    (va_get_mem_heaplet 1 va_sM) va_in_out_b) 0 (4 `op_Multiply` va_get_reg64 rRdx va_old)) > 0 /\
    va_get_xmm 1 va_sM == Vale.AES.GHash.ghash_incremental0 (Vale.Def.Types_s.reverse_bytes_quad32
    (va_get_xmm 11 va_sM)) (va_get_xmm 1 va_old) (FStar.Seq.Base.slice #Vale.X64.Decls.quad32
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_sM) va_in_out_b) 0 (4 `op_Multiply`
    count)) /\ Vale.AES.GCTR.gctr_partial_def alg (4 `op_Multiply` count)
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_old) va_in_plain_b)
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_sM) va_in_out_b) va_in_key
    va_in_icb_BE /\ precedes_wrap (va_get_reg64 rRdx va_sM) (va_get_reg64 rRdx va_s0) ==> va_k
    va_sM ((count))))


val va_wpProof_Aes_counter_loop_body0 : va_old:va_state -> alg:algorithm -> va_in_icb_BE:quad32 ->
  va_in_key:(seq nat32) -> va_in_keys_b:buffer128 -> va_in_old_iv:quad32 -> va_in_out_b:buffer128
  -> va_in_plain_b:buffer128 -> va_in_round_keys:(seq quad32) -> va_in_count:nat -> va_s0:va_state
  -> va_k:(va_state -> nat -> Type0)
  -> Ghost (va_state & va_fuel & nat)
  (requires (va_t_require va_s0 /\ va_wp_Aes_counter_loop_body0 va_old alg va_in_icb_BE va_in_key
    va_in_keys_b va_in_old_iv va_in_out_b va_in_plain_b va_in_round_keys va_in_count va_s0 va_k))
  (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Aes_counter_loop_body0 alg)
    ([va_Mod_xmm 9; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3;
    va_Mod_xmm 2; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 10; va_Mod_xmm 1;
    va_Mod_reg64 rRdx; va_Mod_reg64 rR9; va_Mod_reg64 rR12; va_Mod_reg64 rR10; va_Mod_ok;
    va_Mod_mem; va_Mod_mem_heaplet 1; va_Mod_flags]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@"opaque_to_smt"]
let va_wpProof_Aes_counter_loop_body0 va_old alg va_in_icb_BE va_in_key va_in_keys_b va_in_old_iv
  va_in_out_b va_in_plain_b va_in_round_keys va_in_count va_s0 va_k =
  let (va_sM, va_f0, count) = va_lemma_Aes_counter_loop_body0 (va_code_Aes_counter_loop_body0 alg)
    va_s0 va_old alg va_in_icb_BE va_in_key va_in_keys_b va_in_old_iv va_in_out_b va_in_plain_b
    va_in_round_keys va_in_count in
  va_lemma_upd_update va_sM;
  assert (va_state_eq va_sM (va_update_xmm 9 va_sM (va_update_xmm 7 va_sM (va_update_xmm 6 va_sM
    (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM
    (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 10 va_sM
    (va_update_xmm 1 va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rR9 va_sM (va_update_reg64
    rR12 va_sM (va_update_reg64 rR10 va_sM (va_update_ok va_sM (va_update_mem va_sM
    (va_update_mem_heaplet 1 va_sM (va_update_flags va_sM va_s0)))))))))))))))))))));
  va_lemma_norm_mods ([va_Mod_xmm 9; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4;
    va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 10;
    va_Mod_xmm 1; va_Mod_reg64 rRdx; va_Mod_reg64 rR9; va_Mod_reg64 rR12; va_Mod_reg64 rR10;
    va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 1; va_Mod_flags]) va_sM va_s0;
  let va_g = (count) in
  (va_sM, va_f0, va_g)

[@ "opaque_to_smt" va_qattr]
let va_quick_Aes_counter_loop_body0 (va_old:va_state) (alg:algorithm) (va_in_icb_BE:quad32)
  (va_in_key:(seq nat32)) (va_in_keys_b:buffer128) (va_in_old_iv:quad32) (va_in_out_b:buffer128)
  (va_in_plain_b:buffer128) (va_in_round_keys:(seq quad32)) (va_in_count:nat) : (va_quickCode nat
  (va_code_Aes_counter_loop_body0 alg)) =
  (va_QProc (va_code_Aes_counter_loop_body0 alg) ([va_Mod_xmm 9; va_Mod_xmm 7; va_Mod_xmm 6;
    va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 14; va_Mod_xmm 13;
    va_Mod_xmm 12; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_reg64 rRdx; va_Mod_reg64 rR9; va_Mod_reg64
    rR12; va_Mod_reg64 rR10; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 1; va_Mod_flags])
    (va_wp_Aes_counter_loop_body0 va_old alg va_in_icb_BE va_in_key va_in_keys_b va_in_old_iv
    va_in_out_b va_in_plain_b va_in_round_keys va_in_count) (va_wpProof_Aes_counter_loop_body0
    va_old alg va_in_icb_BE va_in_key va_in_keys_b va_in_old_iv va_in_out_b va_in_plain_b
    va_in_round_keys va_in_count))
#pop-options
//--
//-- Aes_counter_loop_while0
#push-options "--z3rlimit 800"

val va_code_Aes_counter_loop_while0 : alg:algorithm -> Tot va_code
[@ "opaque_to_smt" va_qattr]
let va_code_Aes_counter_loop_while0 alg =
  (va_Block (va_CCons (va_While (va_cmp_gt (va_op_cmp_reg64 rRdx) (va_const_cmp 0)) (va_Block
    (va_CCons (va_code_Aes_counter_loop_body0 alg) (va_CNil ())))) (va_CNil ())))

val va_codegen_success_Aes_counter_loop_while0 : alg:algorithm -> Tot va_pbool
[@ "opaque_to_smt" va_qattr]
let va_codegen_success_Aes_counter_loop_while0 alg =
  (va_pbool_and (va_codegen_success_Aes_counter_loop_body0 alg) (va_ttrue ()))

[@ "opaque_to_smt" va_qattr]
let va_qcode_Aes_counter_loop_while0 (va_mods:va_mods_t) (va_old:va_state) (alg:algorithm)
  (va_in_icb_BE:quad32) (va_in_key:(seq nat32)) (va_in_keys_b:buffer128) (va_in_old_iv:quad32)
  (va_in_out_b:buffer128) (va_in_plain_b:buffer128) (va_in_round_keys:(seq quad32))
  (va_in_count:nat) : (va_quickCode (nat) (va_code_Aes_counter_loop_while0 alg)) =
  (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in let (icb_BE:quad32) =
    va_in_icb_BE in let (key:(seq nat32)) = va_in_key in let (keys_b:buffer128) = va_in_keys_b in
    let (old_iv:quad32) = va_in_old_iv in let (out_b:buffer128) = va_in_out_b in let
    (plain_b:buffer128) = va_in_plain_b in let (round_keys:(seq quad32)) = va_in_round_keys in let
    (count:nat) = va_in_count in va_QBind va_range1
    "***** PRECONDITION NOT MET AT line 586 column 1 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_qWhile va_mods (Cmp_gt (va_op_cmp_reg64 rRdx) (va_const_cmp 0)) (fun va_g -> let
    (count:nat) = let count = va_g in count in qblock va_mods (fun (va_s:va_state) -> va_QBind
    va_range1
    "***** PRECONDITION NOT MET AT line 586 column 1 of file /home/gebner/everest/hacl-star/vale/code/thirdPartyPorts/Intel/aes/x64/Vale.AES.X64.AESCTR.vaf *****"
    (va_quick_Aes_counter_loop_body0 va_old alg icb_BE key keys_b old_iv out_b plain_b round_keys
    count) (fun (va_s:va_state) (count:nat) -> va_QEmpty ((count))))) (fun (va_s:va_state) va_g ->
    let (count:nat) = let count = va_g in count in va_get_ok va_s /\ sse_enabled /\ (0 <
    va_get_reg64 rRdx va_old /\ 4 `op_Multiply` va_get_reg64 rRdx va_old < pow2_32 - 4) /\ (0 <=
    va_get_reg64 rRdx va_s /\ va_get_reg64 rRdx va_s <= va_get_reg64 rRdx va_old) /\ count ==
    va_get_reg64 rRdx va_old - va_get_reg64 rRdx va_s /\ (0 <= count /\ count <= pow2_32 - 4) /\
    Vale.X64.Decls.modifies_buffer128 out_b (va_get_mem_heaplet 1 va_old) (va_get_mem_heaplet 1
    va_s) /\ Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_s) plain_b ==
    Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_old) plain_b /\
    Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 1 va_s) (va_get_reg64 rR9 va_old) plain_b
    (va_get_reg64 rRdx va_old `op_Multiply` 4) (va_get_mem_layout va_s) Secret /\
    Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 1 va_s) (va_get_reg64 rR10 va_old) out_b
    (va_get_reg64 rRdx va_old `op_Multiply` 4) (va_get_mem_layout va_s) Secret /\ va_get_reg64 rR9
    va_s == va_get_reg64 rR9 va_old + count `op_Multiply` 64 /\ va_get_reg64 rR10 va_s ==
    va_get_reg64 rR10 va_old + count `op_Multiply` 64 /\ va_get_reg64 rR9 va_old + va_get_reg64
    rRdx va_old `op_Multiply` 64 < pow2_64 /\ va_get_reg64 rR10 va_old + va_get_reg64 rRdx va_old
    `op_Multiply` 64 < pow2_64 /\ Vale.X64.Decls.buffer_length #Vale.X64.Memory.vuint128 plain_b <=
    Vale.X64.Decls.buffer_length #Vale.X64.Memory.vuint128 out_b /\
    Vale.X64.Decls.buffers_disjoint128 plain_b out_b /\ va_get_xmm 8 va_s ==
    Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123 67438087 66051 /\
    va_get_xmm 0 va_s == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 67438087 66051 202182159
    134810123 /\ va_get_xmm 15 va_s == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 4 0 4 0 /\
    (va_get_reg64 rRdx va_s > 0 ==> 4 `op_Multiply` count < pow2_32 - 4) /\ (va_get_reg64 rRdx va_s
    <= 0 ==> 4 `op_Multiply` count < pow2_32) /\ va_get_xmm 9 va_s == Vale.Def.Words_s.Mkfour
    #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 old_iv)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32
    (Vale.Def.Words_s.__proj__Mkfour__item__lo0 icb_BE) (Vale.Arch.Types.add_wrap32 (4
    `op_Multiply` count) 1))) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 old_iv)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32
    (Vale.Def.Words_s.__proj__Mkfour__item__lo0 icb_BE) (Vale.Arch.Types.add_wrap32 (4
    `op_Multiply` count) 0))) /\ va_get_xmm 10 va_s == Vale.Def.Words_s.Mkfour
    #Vale.Def.Types_s.nat32 (Vale.Def.Words_s.__proj__Mkfour__item__hi2 old_iv)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32
    (Vale.Def.Words_s.__proj__Mkfour__item__lo0 icb_BE) (Vale.Arch.Types.add_wrap32 (4
    `op_Multiply` count) 3))) (Vale.Def.Words_s.__proj__Mkfour__item__hi2 old_iv)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32
    (Vale.Def.Words_s.__proj__Mkfour__item__lo0 icb_BE) (Vale.Arch.Types.add_wrap32 (4
    `op_Multiply` count) 2))) /\ aes_reqs alg key round_keys keys_b (va_get_reg64 rR8 va_s)
    (va_get_mem_heaplet 0 va_s) (va_get_mem_layout va_s) /\ pclmulqdq_enabled /\ old_iv ==
    Vale.Def.Types_s.reverse_bytes_quad32 icb_BE /\ va_get_reg64 rRdi va_s == Vale.Arch.Types.lo64
    old_iv /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (FStar.Seq.Base.slice
    #Vale.X64.Decls.quad32 (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_s) out_b) 0 (4
    `op_Multiply` va_get_reg64 rRdx va_old)) > 0 /\ va_get_xmm 1 va_s ==
    Vale.AES.GHash.ghash_incremental0 (Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 11 va_s))
    (va_get_xmm 1 va_old) (FStar.Seq.Base.slice #Vale.X64.Decls.quad32
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_s) out_b) 0 (4 `op_Multiply` count))
    /\ Vale.AES.GCTR.gctr_partial_def alg (4 `op_Multiply` count) (Vale.X64.Decls.buffer128_as_seq
    (va_get_mem_heaplet 1 va_old) plain_b) (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1
    va_s) out_b) key icb_BE) (fun (va_s:va_state) va_g -> let (count:nat) = let count = va_g in
    count in va_get_reg64 rRdx va_s) ((count))) (fun (va_s:va_state) va_g -> let (count:nat) = let
    count = va_g in count in let va_g = (count) in let (count:nat) = va_g in va_QEmpty ((count)))))


val va_lemma_Aes_counter_loop_while0 : va_b0:va_code -> va_s0:va_state -> va_old:va_state ->
  alg:algorithm -> va_in_icb_BE:quad32 -> va_in_key:(seq nat32) -> va_in_keys_b:buffer128 ->
  va_in_old_iv:quad32 -> va_in_out_b:buffer128 -> va_in_plain_b:buffer128 -> va_in_round_keys:(seq
  quad32) -> va_in_count:nat
  -> Ghost (va_state & va_fuel & nat)
  (requires (va_require_total va_b0 (va_code_Aes_counter_loop_while0 alg) va_s0 /\ va_get_ok va_s0
    /\ sse_enabled /\ (0 < va_get_reg64 rRdx va_old /\ 4 `op_Multiply` va_get_reg64 rRdx va_old <
    pow2_32 - 4) /\ (0 <= va_get_reg64 rRdx va_s0 /\ va_get_reg64 rRdx va_s0 <= va_get_reg64 rRdx
    va_old) /\ va_in_count == va_get_reg64 rRdx va_old - va_get_reg64 rRdx va_s0 /\ (0 <=
    va_in_count /\ va_in_count <= pow2_32 - 4) /\ Vale.X64.Decls.modifies_buffer128 va_in_out_b
    (va_get_mem_heaplet 1 va_old) (va_get_mem_heaplet 1 va_s0) /\ Vale.X64.Decls.buffer128_as_seq
    (va_get_mem_heaplet 1 va_s0) va_in_plain_b == Vale.X64.Decls.buffer128_as_seq
    (va_get_mem_heaplet 1 va_old) va_in_plain_b /\ Vale.X64.Decls.validSrcAddrs128
    (va_get_mem_heaplet 1 va_s0) (va_get_reg64 rR9 va_old) va_in_plain_b (va_get_reg64 rRdx va_old
    `op_Multiply` 4) (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs128
    (va_get_mem_heaplet 1 va_s0) (va_get_reg64 rR10 va_old) va_in_out_b (va_get_reg64 rRdx va_old
    `op_Multiply` 4) (va_get_mem_layout va_s0) Secret /\ va_get_reg64 rR9 va_s0 == va_get_reg64 rR9
    va_old + va_in_count `op_Multiply` 64 /\ va_get_reg64 rR10 va_s0 == va_get_reg64 rR10 va_old +
    va_in_count `op_Multiply` 64 /\ va_get_reg64 rR9 va_old + va_get_reg64 rRdx va_old
    `op_Multiply` 64 < pow2_64 /\ va_get_reg64 rR10 va_old + va_get_reg64 rRdx va_old `op_Multiply`
    64 < pow2_64 /\ Vale.X64.Decls.buffer_length #Vale.X64.Memory.vuint128 va_in_plain_b <=
    Vale.X64.Decls.buffer_length #Vale.X64.Memory.vuint128 va_in_out_b /\
    Vale.X64.Decls.buffers_disjoint128 va_in_plain_b va_in_out_b /\ va_get_xmm 8 va_s0 ==
    Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123 67438087 66051 /\
    va_get_xmm 0 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 67438087 66051 202182159
    134810123 /\ va_get_xmm 15 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 4 0 4 0 /\
    (va_get_reg64 rRdx va_s0 > 0 ==> 4 `op_Multiply` va_in_count < pow2_32 - 4) /\ (va_get_reg64
    rRdx va_s0 <= 0 ==> 4 `op_Multiply` va_in_count < pow2_32) /\ va_get_xmm 9 va_s0 ==
    Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` va_in_count) 1))) (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` va_in_count) 0))) /\ va_get_xmm 10 va_s0 ==
    Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` va_in_count) 3))) (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` va_in_count) 2))) /\ aes_reqs alg va_in_key
    va_in_round_keys va_in_keys_b (va_get_reg64 rR8 va_s0) (va_get_mem_heaplet 0 va_s0)
    (va_get_mem_layout va_s0) /\ pclmulqdq_enabled /\ va_in_old_iv ==
    Vale.Def.Types_s.reverse_bytes_quad32 va_in_icb_BE /\ va_get_reg64 rRdi va_s0 ==
    Vale.Arch.Types.lo64 va_in_old_iv /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32
    (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.buffer128_as_seq
    (va_get_mem_heaplet 1 va_s0) va_in_out_b) 0 (4 `op_Multiply` va_get_reg64 rRdx va_old)) > 0 /\
    va_get_xmm 1 va_s0 == Vale.AES.GHash.ghash_incremental0 (Vale.Def.Types_s.reverse_bytes_quad32
    (va_get_xmm 11 va_s0)) (va_get_xmm 1 va_old) (FStar.Seq.Base.slice #Vale.X64.Decls.quad32
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_s0) va_in_out_b) 0 (4 `op_Multiply`
    va_in_count)) /\ Vale.AES.GCTR.gctr_partial_def alg (4 `op_Multiply` va_in_count)
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_old) va_in_plain_b)
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_s0) va_in_out_b) va_in_key
    va_in_icb_BE))
  (ensures (fun (va_sM, va_fM, count) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM
    /\ sse_enabled /\ (0 < va_get_reg64 rRdx va_old /\ 4 `op_Multiply` va_get_reg64 rRdx va_old <
    pow2_32 - 4) /\ (0 <= va_get_reg64 rRdx va_sM /\ va_get_reg64 rRdx va_sM <= va_get_reg64 rRdx
    va_old) /\ count == va_get_reg64 rRdx va_old - va_get_reg64 rRdx va_sM /\ (0 <= count /\ count
    <= pow2_32 - 4) /\ Vale.X64.Decls.modifies_buffer128 va_in_out_b (va_get_mem_heaplet 1 va_old)
    (va_get_mem_heaplet 1 va_sM) /\ Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_sM)
    va_in_plain_b == Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_old) va_in_plain_b /\
    Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 1 va_sM) (va_get_reg64 rR9 va_old)
    va_in_plain_b (va_get_reg64 rRdx va_old `op_Multiply` 4) (va_get_mem_layout va_sM) Secret /\
    Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 1 va_sM) (va_get_reg64 rR10 va_old)
    va_in_out_b (va_get_reg64 rRdx va_old `op_Multiply` 4) (va_get_mem_layout va_sM) Secret /\
    va_get_reg64 rR9 va_sM == va_get_reg64 rR9 va_old + count `op_Multiply` 64 /\ va_get_reg64 rR10
    va_sM == va_get_reg64 rR10 va_old + count `op_Multiply` 64 /\ va_get_reg64 rR9 va_old +
    va_get_reg64 rRdx va_old `op_Multiply` 64 < pow2_64 /\ va_get_reg64 rR10 va_old + va_get_reg64
    rRdx va_old `op_Multiply` 64 < pow2_64 /\ Vale.X64.Decls.buffer_length
    #Vale.X64.Memory.vuint128 va_in_plain_b <= Vale.X64.Decls.buffer_length
    #Vale.X64.Memory.vuint128 va_in_out_b /\ Vale.X64.Decls.buffers_disjoint128 va_in_plain_b
    va_in_out_b /\ va_get_xmm 8 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159
    134810123 67438087 66051 /\ va_get_xmm 0 va_sM == Vale.Def.Words_s.Mkfour
    #Vale.Def.Types_s.nat32 67438087 66051 202182159 134810123 /\ va_get_xmm 15 va_sM ==
    Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 4 0 4 0 /\ (va_get_reg64 rRdx va_sM > 0 ==> 4
    `op_Multiply` count < pow2_32 - 4) /\ (va_get_reg64 rRdx va_sM <= 0 ==> 4 `op_Multiply` count <
    pow2_32) /\ va_get_xmm 9 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32
    (va_in_old_iv.hi2) (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32
    (va_in_icb_BE.lo0) (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` count) 1))) (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` count) 0))) /\ va_get_xmm 10 va_sM ==
    Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` count) 3))) (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` count) 2))) /\ aes_reqs alg va_in_key
    va_in_round_keys va_in_keys_b (va_get_reg64 rR8 va_sM) (va_get_mem_heaplet 0 va_sM)
    (va_get_mem_layout va_sM) /\ pclmulqdq_enabled /\ va_in_old_iv ==
    Vale.Def.Types_s.reverse_bytes_quad32 va_in_icb_BE /\ va_get_reg64 rRdi va_sM ==
    Vale.Arch.Types.lo64 va_in_old_iv /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32
    (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.buffer128_as_seq
    (va_get_mem_heaplet 1 va_sM) va_in_out_b) 0 (4 `op_Multiply` va_get_reg64 rRdx va_old)) > 0 /\
    va_get_xmm 1 va_sM == Vale.AES.GHash.ghash_incremental0 (Vale.Def.Types_s.reverse_bytes_quad32
    (va_get_xmm 11 va_sM)) (va_get_xmm 1 va_old) (FStar.Seq.Base.slice #Vale.X64.Decls.quad32
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_sM) va_in_out_b) 0 (4 `op_Multiply`
    count)) /\ Vale.AES.GCTR.gctr_partial_def alg (4 `op_Multiply` count)
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_old) va_in_plain_b)
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_sM) va_in_out_b) va_in_key
    va_in_icb_BE /\ ~(va_get_reg64 rRdx va_sM > 0) /\ va_state_eq va_sM (va_update_xmm 9 va_sM
    (va_update_xmm 7 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM
    (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM
    (va_update_xmm 12 va_sM (va_update_xmm 10 va_sM (va_update_xmm 1 va_sM (va_update_reg64 rRdx
    va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR10 va_sM
    (va_update_ok va_sM (va_update_mem va_sM (va_update_mem_heaplet 1 va_sM (va_update_flags va_sM
    va_s0))))))))))))))))))))))
[@"opaque_to_smt"]
val va_lemma_Aes_counter_loop_while0 : va_b0:va_code -> va_s0:va_state -> va_old:va_state ->
  alg:algorithm -> va_in_icb_BE:quad32 -> va_in_key:(seq nat32) -> va_in_keys_b:buffer128 ->
  va_in_old_iv:quad32 -> va_in_out_b:buffer128 -> va_in_plain_b:buffer128 -> va_in_round_keys:(seq
  quad32) -> va_in_count:nat
  -> Ghost (va_state & va_fuel & nat)
  (requires (va_require_total va_b0 (va_code_Aes_counter_loop_while0 alg) va_s0 /\ va_get_ok va_s0
    /\ sse_enabled /\ (0 < va_get_reg64 rRdx va_old /\ 4 `op_Multiply` va_get_reg64 rRdx va_old <
    pow2_32 - 4) /\ (0 <= va_get_reg64 rRdx va_s0 /\ va_get_reg64 rRdx va_s0 <= va_get_reg64 rRdx
    va_old) /\ va_in_count == va_get_reg64 rRdx va_old - va_get_reg64 rRdx va_s0 /\ (0 <=
    va_in_count /\ va_in_count <= pow2_32 - 4) /\ Vale.X64.Decls.modifies_buffer128 va_in_out_b
    (va_get_mem_heaplet 1 va_old) (va_get_mem_heaplet 1 va_s0) /\ Vale.X64.Decls.buffer128_as_seq
    (va_get_mem_heaplet 1 va_s0) va_in_plain_b == Vale.X64.Decls.buffer128_as_seq
    (va_get_mem_heaplet 1 va_old) va_in_plain_b /\ Vale.X64.Decls.validSrcAddrs128
    (va_get_mem_heaplet 1 va_s0) (va_get_reg64 rR9 va_old) va_in_plain_b (va_get_reg64 rRdx va_old
    `op_Multiply` 4) (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs128
    (va_get_mem_heaplet 1 va_s0) (va_get_reg64 rR10 va_old) va_in_out_b (va_get_reg64 rRdx va_old
    `op_Multiply` 4) (va_get_mem_layout va_s0) Secret /\ va_get_reg64 rR9 va_s0 == va_get_reg64 rR9
    va_old + va_in_count `op_Multiply` 64 /\ va_get_reg64 rR10 va_s0 == va_get_reg64 rR10 va_old +
    va_in_count `op_Multiply` 64 /\ va_get_reg64 rR9 va_old + va_get_reg64 rRdx va_old
    `op_Multiply` 64 < pow2_64 /\ va_get_reg64 rR10 va_old + va_get_reg64 rRdx va_old `op_Multiply`
    64 < pow2_64 /\ Vale.X64.Decls.buffer_length #Vale.X64.Memory.vuint128 va_in_plain_b <=
    Vale.X64.Decls.buffer_length #Vale.X64.Memory.vuint128 va_in_out_b /\
    Vale.X64.Decls.buffers_disjoint128 va_in_plain_b va_in_out_b /\ va_get_xmm 8 va_s0 ==
    Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123 67438087 66051 /\
    va_get_xmm 0 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 67438087 66051 202182159
    134810123 /\ va_get_xmm 15 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 4 0 4 0 /\
    (va_get_reg64 rRdx va_s0 > 0 ==> 4 `op_Multiply` va_in_count < pow2_32 - 4) /\ (va_get_reg64
    rRdx va_s0 <= 0 ==> 4 `op_Multiply` va_in_count < pow2_32) /\ va_get_xmm 9 va_s0 ==
    Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` va_in_count) 1))) (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` va_in_count) 0))) /\ va_get_xmm 10 va_s0 ==
    Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` va_in_count) 3))) (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` va_in_count) 2))) /\ aes_reqs alg va_in_key
    va_in_round_keys va_in_keys_b (va_get_reg64 rR8 va_s0) (va_get_mem_heaplet 0 va_s0)
    (va_get_mem_layout va_s0) /\ pclmulqdq_enabled /\ va_in_old_iv ==
    Vale.Def.Types_s.reverse_bytes_quad32 va_in_icb_BE /\ va_get_reg64 rRdi va_s0 ==
    Vale.Arch.Types.lo64 va_in_old_iv /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32
    (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.buffer128_as_seq
    (va_get_mem_heaplet 1 va_s0) va_in_out_b) 0 (4 `op_Multiply` va_get_reg64 rRdx va_old)) > 0 /\
    va_get_xmm 1 va_s0 == Vale.AES.GHash.ghash_incremental0 (Vale.Def.Types_s.reverse_bytes_quad32
    (va_get_xmm 11 va_s0)) (va_get_xmm 1 va_old) (FStar.Seq.Base.slice #Vale.X64.Decls.quad32
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_s0) va_in_out_b) 0 (4 `op_Multiply`
    va_in_count)) /\ Vale.AES.GCTR.gctr_partial_def alg (4 `op_Multiply` va_in_count)
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_old) va_in_plain_b)
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_s0) va_in_out_b) va_in_key
    va_in_icb_BE))
  (ensures (fun (va_sM, va_fM, count) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM
    /\ sse_enabled /\ (0 < va_get_reg64 rRdx va_old /\ 4 `op_Multiply` va_get_reg64 rRdx va_old <
    pow2_32 - 4) /\ (0 <= va_get_reg64 rRdx va_sM /\ va_get_reg64 rRdx va_sM <= va_get_reg64 rRdx
    va_old) /\ count == va_get_reg64 rRdx va_old - va_get_reg64 rRdx va_sM /\ (0 <= count /\ count
    <= pow2_32 - 4) /\ Vale.X64.Decls.modifies_buffer128 va_in_out_b (va_get_mem_heaplet 1 va_old)
    (va_get_mem_heaplet 1 va_sM) /\ Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_sM)
    va_in_plain_b == Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_old) va_in_plain_b /\
    Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 1 va_sM) (va_get_reg64 rR9 va_old)
    va_in_plain_b (va_get_reg64 rRdx va_old `op_Multiply` 4) (va_get_mem_layout va_sM) Secret /\
    Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 1 va_sM) (va_get_reg64 rR10 va_old)
    va_in_out_b (va_get_reg64 rRdx va_old `op_Multiply` 4) (va_get_mem_layout va_sM) Secret /\
    va_get_reg64 rR9 va_sM == va_get_reg64 rR9 va_old + count `op_Multiply` 64 /\ va_get_reg64 rR10
    va_sM == va_get_reg64 rR10 va_old + count `op_Multiply` 64 /\ va_get_reg64 rR9 va_old +
    va_get_reg64 rRdx va_old `op_Multiply` 64 < pow2_64 /\ va_get_reg64 rR10 va_old + va_get_reg64
    rRdx va_old `op_Multiply` 64 < pow2_64 /\ Vale.X64.Decls.buffer_length
    #Vale.X64.Memory.vuint128 va_in_plain_b <= Vale.X64.Decls.buffer_length
    #Vale.X64.Memory.vuint128 va_in_out_b /\ Vale.X64.Decls.buffers_disjoint128 va_in_plain_b
    va_in_out_b /\ va_get_xmm 8 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159
    134810123 67438087 66051 /\ va_get_xmm 0 va_sM == Vale.Def.Words_s.Mkfour
    #Vale.Def.Types_s.nat32 67438087 66051 202182159 134810123 /\ va_get_xmm 15 va_sM ==
    Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 4 0 4 0 /\ (va_get_reg64 rRdx va_sM > 0 ==> 4
    `op_Multiply` count < pow2_32 - 4) /\ (va_get_reg64 rRdx va_sM <= 0 ==> 4 `op_Multiply` count <
    pow2_32) /\ va_get_xmm 9 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32
    (va_in_old_iv.hi2) (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32
    (va_in_icb_BE.lo0) (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` count) 1))) (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` count) 0))) /\ va_get_xmm 10 va_sM ==
    Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` count) 3))) (va_in_old_iv.hi2)
    (Vale.Def.Types_s.reverse_bytes_nat32 (Vale.Arch.Types.add_wrap32 (va_in_icb_BE.lo0)
    (Vale.Arch.Types.add_wrap32 (4 `op_Multiply` count) 2))) /\ aes_reqs alg va_in_key
    va_in_round_keys va_in_keys_b (va_get_reg64 rR8 va_sM) (va_get_mem_heaplet 0 va_sM)
    (va_get_mem_layout va_sM) /\ pclmulqdq_enabled /\ va_in_old_iv ==
    Vale.Def.Types_s.reverse_bytes_quad32 va_in_icb_BE /\ va_get_reg64 rRdi va_sM ==
    Vale.Arch.Types.lo64 va_in_old_iv /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32
    (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.buffer128_as_seq
    (va_get_mem_heaplet 1 va_sM) va_in_out_b) 0 (4 `op_Multiply` va_get_reg64 rRdx va_old)) > 0 /\
    va_get_xmm 1 va_sM == Vale.AES.GHash.ghash_incremental0 (Vale.Def.Types_s.reverse_bytes_quad32
    (va_get_xmm 11 va_sM)) (va_get_xmm 1 va_old) (FStar.Seq.Base.slice #Vale.X64.Decls.quad32
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_sM) va_in_out_b) 0 (4 `op_Multiply`
    count)) /\ Vale.AES.GCTR.gctr_partial_def alg (4 `op_Multiply` count)
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_old) va_in_plain_b)
    (Vale.X64.Decls.buffer128_as_seq (va_get_mem_heaplet 1 va_sM) va_in_out_b) va_in_key
    va_in_icb_BE /\ ~(va_get_reg64 rRdx va_sM > 0) /\ va_state_eq va_sM (va_update_xmm 9 va_sM
    (va_update_xmm 7 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM
    (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM
    (va_update_xmm 12 va_sM (va_update_xmm 10 va_sM (va_update_xmm 1 va_sM (va_update_reg64 rRdx
    va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR10 va_sM
    (va_update_ok va_sM (va_update_mem va_sM (va_update_mem_heaplet 1 va_sM (va_update_flags va_sM
    va_s0))))))))))))))))))))))

    va_b0: Vale.X64.Decls.va_code ->
    va_s0: Vale.X64.Decls.va_state ->
    va_old: Vale.X64.Decls.va_state ->
    alg: Vale.AES.AES_common_s.algorithm ->
    va_in_icb_BE: Vale.X64.Decls.quad32 ->
    va_in_key: FStar.Seq.Base.seq Vale.X64.Memory.nat32 ->
    va_in_keys_b: Vale.X64.Memory.buffer128 ->
    va_in_old_iv: Vale.X64.Decls.quad32 ->
    va_in_out_b: Vale.X64.Memory.buffer128 ->
    va_in_plain_b: Vale.X64.Memory.buffer128 ->
    va_in_round_keys: FStar.Seq.Base.seq Vale.X64.Decls.quad32 ->
    va_in_count: Prims.nat
  -> Prims.Ghost ((Vale.X64.Decls.va_state * Vale.X64.Decls.va_fuel) * Prims.nat)