Q:

I am trying to write code in matlab for inner current control loop, my aim is minimizing error, need code verification

I am trying to write following inner current control loop structure in MATLAB. Both these diagrams are inter related and using these diagrams I made a following code, my aim in this code is to minimize id*-id, i am doing this by using ITEA. plz help me in verifying this code. the diagram is in image link below. i have implemented that link in code below.
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A:

The standard way to connect a block diagram is to use append/connect. Your system actually is .
To connect the output, we need the additional block 7 (we can not connect the system output to the input of some block, only to the output):
 
So, the code can look like this:
sys1= tf(1,[Lt Rt]);
sys2= omega*Lt;
sys3= omega*Lt;
sys4= tf(1,[Lt Rt]);
sys5= (Kp + Ki/s);
sys6=(Kp + Ki/s);
sys7 = 1;
system= append(sys1,sys2,sys3,sys4,sys5,sys6,sys7);
connections= [ 1 2 -5;
    2 4 0;
    3 1 0;
    4 -3 -6;
    5 7 0;
    6 -4 0;
    7 -1 0];  
inputs=  [7 4 5 6];
outputs= 7; 
system= connect(system,connections,inputs,outputs); 

Note that you can't use name-based and index-based connections at one time.

