1. Field of the Invention
The present invention relates to a semiconductor integrated circuit device which is designed considering testability. The present invention also relates to a test method for testing such a semiconductor integrated circuit device.
2. Description of the Background Art
FIG. 1 is a plan view showing the structure of a conventional semiconductor integrated circuit device which is designed while taking testability into account. As shown in FIG. 1, a semiconductor integrated circuit 2 is formed on a semiconductor substrate 1. The semiconductor integrated circuit 2 comprises in its peripheral edge portion electrode pads 4 anti test electrode pads 5, the electrode pads 4 being external terminals for regular use and the test electrode pads 5 being external terminals only for test use. Surrounded by the electrode pads 4 and 5 is an electrical circuit part 3. The electrical circuit part 3 includes, in addition to regular circuit parts, a test circuit part for executing a testability-considered test such as the adhock method and the scan path method. The test electrode pads 5 are electrically connected to input/output parts of the test circuit part.
Operation of the electrical circuit part 3 of the semiconductor integrated circuit 2 is tested in the following manner. First, the electrode pads 4 and the test electrodes pads 5 are supplied with a predetermined test signal. Next, it is judged whether output signals from the electrode pads 4 and the test electrodes pads 5 each have an expected value.
Since the semiconductor integrated circuit 2 comprises the test electrode pads 5 and the test circuit part which is incorporated in the electrical circuit part 3, the test is superior regarding rationality and reduction in required time for a test of a semiconductor integrated circuit device which does not employ the test electrode pads 5 and the test circuit.
Thus, in general, the conventional testability-considered device as above includes the test circuit part which is designed for testability and the test electrode pads which are electrically connected to the test circuit part.
Among testability-considered test methods in light of which the test circuit part is designed are the adhock method and the scan path method. While proposed as a testability-considered test method, these methods require in order to ensure good testability a test circuit part that is complex in structure, and hence, difficult to design.
If improvement in testability is desired aiming at test time reduction, the test circuit part needs to be large, which in turn requires a greater number of the test electrode pads 5. This invites increase in the circuit area of the semiconductor integrated circuit 2, thereby increasing up the net manufacturing cost.
A semiconductor integrated circuit device enhanced in testability further requires a larger and more expensive test apparatus for testing the same.