It is desirable to convert analog signals to digital form, typically because a physical variable is in analog form and processing of it is more practical if it is in a digital form such as a stream of values representing samples of the analog signal. Analog to digital converters are well known and are frequently implemented with a first sample and-hold or track-and-hold stage that converts a continuously-variable analog signal to a sequence of stable analog levels followed by a second quantization stage that converts these stable analog signals to digital form.
Many architectures and electronic circuits are known for converting analog to digital signals, but practical limitations of the electronic devices used to implement these systems limit sampling rate, accuracy and consume power. It is known that these considerations need to be traded off, so that, for example, sampling rate can be increased at a cost in decreased resolution and increased power consumption.
It is known to combine a pair of analog to digital converters that operate in alternation, so that the effective sampling rate of the pair is twice that of the individual converters and this is often referred to as a “ping-pong” architecture. It is known to generalize this principle to use large numbers of subconverters operating in rotation to implement converters operating at very high speeds. These are sometimes known as interleaved, or N-path, architectures.
In interleaved architectures it is necessary that each sample-and-hold stage of each subconverter path be capable of sampling the input signal at the bandwidth of the overall desired system, rather than at the lower bandwidth for which a lower-speed converter would typically be designed. This difficulty reduces the practical speed advantage available by using interleaved architectures. It is also known that when signals to be sampled have spectra that are not “white” (where, as is now to those of skill in the art, “white” means that the signal does not have correlation between samples) the correlation between consecutive samples reduces the effective information rate of the ensemble of samplers. Still another problem exists in that sample-and-hold circuits are difficult to implement in some technologies, such as with bipolar transistors.
It is desired to have a means of combining multiple subconverters to form a conversion system with a higher effective sampling rate than the sampling rate of the subconverters that does not suffer from the sampling difficulties of conventional interleaved systems.