1. Field of the Invention
The present invention relates to a method of pre-programming a flash memory cell. In particular, the present invention relates to a method of pre-programming a flash memory cell which can execute a continuous program operation and can reduce a pre-programming time by performing a program verification operation using a local clock.
2. Description of the Prior Art
Generally, prior to an erase operation, a pre-program operation is performed repeatedly for all the cells of the sector to be erased by byte or word unit in a normal programming step. In pre-program operation, it can be seen that when a pre-program operation is performed based on a normal program step, the time of the pre-program operation is not so small at the time of erasure operation.
Also, as a semiconductor device becomes more higher integrated, the time taken by pre-program operation is longer than the time taken by erasure operation in an erasure operation.
FIG. 1 is a functional block diagram of a conventional method of pre-programming a flash memory cell.
A general step of programming can be mainly divided into a programming step and a program verifying step when considering internal algorithms. The programming step is consisted of a pumping up step for programming, a real programming step, a pumping down for program verifying. Since data to be programmed are not always selected in the programming step, a program verify operation is performed simultaneously with the program operation at the time of program operation, and then data are provided so that cells can be programmed according to specified addresses, as shown in FIG. 2A and FIG. 2B.
FIG. 3 is a flow chart for explaining a conventional method of pre-programming, the pre-programming procedures will be explained as follows.
At step 102, a pre-program operation is performed in response to an erase command of step 101 for a cell by means of an internal counter. Thereafter, at step 103, a pumping time for programming is lapsed, then at step 104, a byte or a word program operation is executed. At step 105, when pumping-down time for a program verify operation is lapsed, a verify operation is performed at step 106. At step 107, a verify operation is performed for verifying whether the cell is normally programmed or not. If the cell was not normally programmed, a verify operation is performed at step 108 for verifying whether a maximum looping number is same as a maximum programming number preset within the internal counter N of the chip or not. If the looping number is not same as the maximum programming number, the number of program operation is increased at step 109, and then returns to step 103 in order to repeatedly perform a program operation.
However, at step 108, if the looping number is same as the maximum programming number preset within the internal counter N of the chip, it is determined whether the cell is defective or not at step 112, and then a program operation stops. Also, at step 107, if the cell is in a normally programmed state, an address of final sector is verified at step 110. At step 110, if it was not an address of the final sector, the number of the sector address preset within the internal counter of the chip is increased at step 111, and then returns to step 103 in order to repeatedly perform a program operation. Meanwhile, if it was an address of a final sector at step 110, it is determined whether the cell is normal or not at step 110, and then a program operation is finished.
In a conventional method of pre-programming as described above, since all the cells of a sectors are pre-programmed repeatedly by a byte or word unit at a normal programming step, the entire programming time of a chip is delayed.