The present invention relates to components and assemblies useful in microelectronic assemblies, to assemblies incorporating such components and to methods of making such components and assemblies.
Microelectronic elements such as semiconductor chips typically are provided in packages that protect the semiconductor chip itself from the external environment and which facilitate mounting the chip on a circuit board. For example, some microelectronic packages include a connection component incorporating a dielectric element such as a board or sheet having top and bottom surfaces and having electrically conductive terminals exposed at the bottom surface. The chip is mounted to the top surface and connected to the terminals by various arrangements such as electrically conductive traces extending on a surface of the dielectric element, or within the dielectric element. The chip typically has a front surface with small contacts thereon and an oppositely-facing rear surface. The chip may be mounted in a face-down arrangement, so that the front surface of the chip confronts the top surface of the dielectric element and the rear surface of the chip faces upwardly, away from the dielectric element. In other cases, the chip may be mounted in a face-up arrangement, with the rear surface of the chip facing downwardly toward the top surface of the dielectric element. The contacts on the front face of the chip typically are connected to the traces on the dielectric element either by direct bonds between the contacts and leads formed integrally with the traces, or by wire bonds. As disclosed, for example, in U.S. Pat. No. 6,177,636, the disclosure of which is incorporated by reference herein, similar chip packages can be made with terminals in the form of posts projecting from the bottom surface of the dielectric element. The posts can be fabricated using an etching process.
Efforts have been made to fabricate electronic connection structures such as individual layers for multi-layer circuit boards using a metallic post structure. In one process, disclosed by the North Corporation of Tokyo, Japan, a metallic plate is etched to form numerous metallic posts projecting from the plate. A dielectric layer is applied to this plate so that the posts project through the dielectric layer. An inner or upper side of the dielectric layer faces upwardly toward the metallic plate, whereas the outer or lower side of the dielectric layer faces downwardly towards the tip of the posts. The dielectric layer may be fabricated by coating a dielectric such as polyimide onto the plate around the posts or, more typically, by forcibly engaging the posts with the dielectric sheet so that the posts penetrate through the sheet. Once the sheet is in place, the metallic plate is etched to form individual traces on the inner side of the dielectric layer extending to the bases of the various posts.
The components made by this process suffer from certain drawbacks for use as connection components in certain types of semiconductor chip packages. For example, it is often desirable to mount a chip in a face-down orientation and connect the contacts on the chip to the traces of the connection component using wire bonds which extend from the chip through a large opening or slot in the dielectric element, or around the edges of the dielectric element, and approach the outer or bottom surface of the dielectric element. However, in the aforementioned process, the traces are formed on the inner or upper side of the dielectric element. Therefore, the traces are not exposed for connection to the wire bonds. While this problem can be overcome by forming additional openings in the dielectric element in alignment with the traces, this adds cost and complexity to the manufacturing process.
Moreover, the posts must have a certain minimum height in order to facilitate the process of applying the dielectric layer. Typically, the posts must be at least about 100 microns high and must be of substantially uniform height. In some applications, this is advantageous. However, where a packaged chip is to be mounted using conventional large solder balls, this substantial height may be undesirable.
It would, therefore, be desirable to provide component fabrication methods which allow fabrication of connection components using the formed-post process, but which do not suffer from the aforementioned limitations. The present invention, in its various aspects, addresses some or all of these needs.