The invention relates to a semiconductor device and a method for fabricating the same, and especially to a semiconductor device in which a bare chip is coated with protective resin and prevented from being cracked and a method for fabricating the same.
Since a bare chip is provided with plural bumps serving as electrodes on an obverse surface thereof and not coated with protective resin, a space necessary for mounting it is small. Accordingly, the bare chip is suited for an electronic instrument in which the space for accommodating parts is limited, such as a portable telephone.
FIG. 1 shows a conventional semiconductor device (a bare chip).
An insulating layer 102 is provided for an obverse surface of a LSI chip 1, and a wiring layer 104 having LSI electrodes 103 thereon is formed on the insulating layer 102. Plural bumps 105 serving as external electrodes are mounted on leading ends of the LSI electrodes 103 formed on a circuit area 106.
FIG. 2 shows the steps of a process for fabricating the conventional semiconductor device shown in FIG. 1.
FIG. 3A shows a plan view of the wafer, which is not yet diced into the bare chips. FIG. 3B shows a cross-sectional view of the bare chip. FIG. 3A corresponds to a prior treatment of the step 201. The steps of the fabrication process ranging from dicing to mounting will be explained referring to FIGS. 2, 3A, 3B. xe2x80x9cSxe2x80x9d in FIG. 2 means the step.
As shown in FIG. 3A, the wafer is diced along boundary lines (broken lines) between the LSI chips 101, and the individuated semiconductor devices (the bare chips) 100 are obtained. After the wafer is diced into the semiconductor device 100 (S201), the semiconductor devices of a predetermined number are transferred to a tray (S202). Each semiconductor device 100 in the tray is supported by a jig on the inside of a crack permissible areas 107 so that circuit surfaces and the bumps 105 are not brought into contact with the tray, wherein the crack permissible area means a frame-shaped region ranging from edges of the LSI chip 101 to exterior electrodes on the same, and a width thereof is about 50 xcexcm. The tray is carried to the step of inspecting the semiconductor devices by means of a transportation jig for exclusive use (S203). After the step of inspecting the semiconductor devices 100 is over (S204), the semiconductor devices 100 are again transferred to the tray (S205), carried to the step of packing the semiconductor devices 100, and packed up (S206). Thereafter, the package is transported to the user (S207). The user opens the package delivered in this way (S208), transfers the semiconductor devices to a transportation jig (S209), mounts the semiconductor devices 100 on a printed circuit board by means of a pickup tool, and connects the bumps 105 with wirings by reflow soldering (S210).
However, according to the aforementioned semiconductor devices, since the individuated semiconductor devices are transferred to the tray and transported in condition that they are contained therein, there is a possibility that a shock may exert on the semiconductor devices, particularly in cases where they are brought into contact with the tray at the time of transportation or the jig at the time of inspection. In such a case, the semiconductor device is apt to be cracked or broken off, and the electrodes or the circuit area may be damaged. Especially, the edges of the chip are apt to be cracked and broken off. This leads to a deterioration of the yield rate of the products and or quality of the transported semiconductor devices.
Accordingly, it is an object of the invention to provide a semiconductor device and a method for fabricating the same, in which a semiconductor device is prevented from being cracked, yield rate thereof is improved, and quality of forwarded products is guaranteed.
According to the first feature of the invention, the semiconductor device comprises:
a bare chip fabricated as a large scale integrated circuit,
plural bumps provided for an obverse surface of the bare chip, and
protective members formed on at least side surfaces of the bare chip.
According to the aforementioned structure, a protective member provided for at least side surfaces of a bare chip reduces an external force exerted on a chip, and especially prevents corners of a chip from being cracked or broken off. As a result, defects occurring at the time of transportation or mounting, imperfections in joints occurring at the time of mounting, etc. are reduced, hence the semiconductor device can be small-sized and reliability thereof can be heightened.
According to the second feature of the invention, a method for fabricating the semiconductor device comprises the steps of:
sticking a wafer on which plural bumps are formed to an adhesive sheet,
dicing the wafer into individuated chips so as not to dice the adhesive sheet,
forming spacings having predetermined widths between the individuated chips stuck to the adhesive sheet,
coating the spacings formed between the individuated chips with resin,
hardening the resin to unify the individuated chips like a wafer, and
providing separate chips by dicing the unified chips along boundary lines between the individuated chips.
According to the aforementioned method, since the wafer on which plural bumps are formed is stuck to the adhesive sheet, it becomes possible to expand the adhesive sheet after the wafer is diced, and thereby the spacings between the chips which are wide enough to be coated with resin can be formed. When resin is hardened after the spacings are coated with resin, the chips unified like a wafer can be formed. The individuated chips, each of which is coated with resin at the side surfaces thereof, can be obtained by dicing the unified chips along the boundary lines between the chips. Accordingly, since the separated chips do not through the fabrication process, the steps of handling the chips can be eliminated, the number of the steps of using jigs and tools is reduced, and a metallic mold used in the step of molding resin becomes unnecessary. Then, the method for fabricating the semiconductor device is simplified. Moreover, since the LSI chip is prevented from being cracked by providing protective resin for the side surfaces thereof, reliability and yield rate of the products can be heightened. Stillmore, since the specific character of the bare chip is maintained, the number of parts does not increase, the semiconductor device can be small-sized, and cost thereof can be cut down.
According to the third feature of the invention, a method for fabricating the semiconductor device comprises the steps of:
sticking a wafer on which intermediate electrodes for mounting bumps thereon are arranged in accordance with a circuit pattern to an adhesive sheet,
dicing the wafer into individuated chips so as not to dice the adhesive sheet,
forming spacings between the individuated chips stuck to the adhesive sheet,
coating the spacings formed between the individuated chips and a surface of the wafer on which the intermediated electrodes are arranged with resin,
hardening the resin to unify the individuated chips like a wafer,
grinding an obverse surface of the unified chips to expose the intermediate electrodes, and
providing separate chips by dicing the unified chips along boundary lines between the individuated chips.
According to the aforementioned method, the intermediate electrodes formed on a circuit pattern on the wafer have function of adjusting the height of the bumps above the chip surface and relaxing external forces exerting on the semiconductor device. Since the wafer on which the intermediate electrodes are formed is stuck to the adhesive sheet, the adhesive sheet can be expanded after the wafer is diced, and the spacings, which are wide enough to be coated with protective resin, can be formed between the individuated chips. If the spacings are coated with protective resin which is hardened thereafter, the chip are unified like a wafer. After the bumps are respectively mounted on the intermediate electrodes formed on the chips, the unified chips are diced along the boundary lines between the respective chips, and the separate LSI chips are completed. As mentioned in the above, since the separate chips do not pass through the fabrication process, the steps of handling the chips can be eliminated, the number of the steps of using jigs and tools is reduced, and the metallic mold used in the step of molding becomes unnecessary. Then, the fabrication process of the semiconductor device is simplified. Moreover, since the LSI chip is prevented from being cracked by providing protective resin for the side surfaces and the obverse surface of the LSI chip, reliability and yield rate of the products can be heightened. Stillmore, since the specific character of the bare chip is maintained, the number of parts does not increase, the semiconductor device can be small-sized, and cost thereof can be cut down.