Continued emphasis in the semiconductor industry on producing smaller processor integrated circuits (I/C's) by making all of the circuits smaller and denser is ever driving increasing power requirements. The increased power consumption results in more heat generated by the I/C as it is operating and the need to control/stabilize I/C temperature during the test and burn-in processes. Generally, the I/C is contacted by a heat sink to control temperature during burn in. High performance heat sinks are well known in the prior art. They are typically liquid cooled and may also incorporate additional control features, such as temperature sensors, heaters, thermoelectric devices and fluid control valves. The shape and size of the liquid cooling passages are optimized for heat transfer. The heat sink is a part of the burn-in oven. The state of the art of heat sink design is such that the biggest limitation to temperature control is transferring the heat from the IC to the heat sink. The thermal interface between the I/C and heat sink must be high performance and temporary so the heat sink can be removed from the I/C after test. Known thermal interface methods are: (1) minimum tolerance surface flatness of heat exchanger and coplanarity between an I/C and heat exchanger (which still results in a microscopic air gap between the I/C/heat exchanger surfaces); (2) continuous injection of an inert gas (example—helium) to fill the air gap between the I/C heat exchanger surfaces; (3) placing a compliant material (example—Egraf) with high thermal conductivity on the heat exchanger surface that contacts the I/C to enable thermal control of the I/C under test and burn-in conditions; (4) remote/external dispense of a liquid (with a higher viscosity than water) for maximum effective heat transfer applications. Methods 1, 2 and 3 do not provide the level of thermal transfer that can be accomplished with method 4 required for current/future generations of processor I/C's. Method 4 does support current/future power dissipation requirements but the external/remote liquid dispense method leaves the end-user with the liquid in a static condition and prone to liquid breakdown and residual build-up which lessens liquid thermal performance and power dissipation significantly below that required, resulting in inadequate test or false fails.
The breakdown of liquid and residual build-up affects thermal performance and reliability of the test or burn-in (B/I) tooling, resulting in more frequent tool cleaning and heat exchanger replacement, driving significant increase in cost of ownership (COO).
The contamination on the I/C backside is a paramount concern as (a) if it is not detected and removed, the contamination adversely affects long term reliability of the thermal solution incorporated into the final I/C package assembly, resulting in premature I/C failure; (b) increased COO to implement an inspection/detection process resulting in yield loss if contamination removal is not possible, and (c) increased COO to develop/implement an inspect/detect/contamination removal process, resulting in revenue/profit impact. This is all explained in some detail in patent application Ser. No. 11/330,922, filed Jan. 12, 2006, entitled “Enhanced Thermo-Oxidative Stability Thermal Interface Compositions and Use Thereof in Microelectronics Assembly”, which is incorporated herein by reference.
Thus, it is desired that an improved technique for burn-in of electronic devices, such as chips, be developed that overcomes these defects.