The present invention relates in general to interconnect or metallization structures for integrated circuits on a semiconductor chip wherein blocked segments of good electrical conductors are formed in the interconnects to minimize void or hillock growth produced by stress migration and electromigration damage.
The metallization systems used in integrated circuits on a semiconductor chip often include several levels of narrow and thin metal interconnects which are separated by insulator or passivation layers and are connected by vias through the same. More particularly, narrow and thin metal interconnects are deposited on an insulator layer that covers the semiconductor chip and are connected to the underlying devices in the chip through holes or vias drilled through the insulator layer. The interconnects are covered by a passivation layer for corrosion and electromigration resistance.
Stress migration and electromigration damage can both occur in the form of voids and hillocks. The former increase the resistance of the metal lines that make up an interconnect and may eventually sever the interconnect. In severe cases, the latter fracture the passivation layers and produce shorts between neighboring interconnects. The fracture of passivation layers will also expose the metal interconnects to the external environment which is corrosive.
Stress migration is caused by thermal stresses produced by the mismatch between the coefficients of thermal expansion of the metal interconnect and its surrounding passivation and insulator layers. Depending on prior thermal history, the thermal stresses can either be tensile or compressive. Void formation is associated with tensile stresses while hillock growth is associated with compressive stresses.
Thermal stress induced voids participate in the electromigration damage processes in ways depending on their sizes. When the sizes of these voids are large, they migrate under electrical currents without being trapped by barriers such as grain boundaries. When the size of these voids are small, they are first trapped at grain boundaries and other barriers and grow through electrical current induced atomic transport until they are sufficiently large to free themselves from the barriers. Migrating voids coalesce with other voids and thus provide an effective way for void growth. Independently of the mechanism of void growth, continued void growth will eventually sever an interconnect.
Another consequence of electrical current induced atomic transport is hillock growth. Under the influence of a high electrical current, atoms will move preferentially in one direction while vacancies (empty atomic sites) will move in the opposite direction. The excess vacancies are collected by voids. Correspondingly the excess atoms are collected by hillocks which are protrusions made of migrated atoms.
In the case when thermal stress induced voids are absent in a metal interconnect, the electrical current induced atomic transport discussed above will produce high tensile stresses at locations where excess vacancies are accumulated. Such high tensile stresses are believed to cause the nucleation of voids that participate in the electromigration damage processes in the same way as small and trapped thermal stress induced voids.
To improve electromigration damage resistance, a variety of approaches are being practiced. Notable among these are those relying on alloying additions and those relying on backup refractory metal or alloy layers.
An example of such an approach is the addition of a few percent of copper to aluminum interconnects. It is believed that the benefits of copper addition are derived from the decreased rate of atomic transport, which slows down void and hillock growth, and from the formation of second phase precipitates that trap moving voids. However, although copper and similar alloying additions have been shown to be beneficial, electromigration induced damage will ultimately cause failures in metal interconnects.
The use of backup layers of tungsten, titanium or their alloys under and/or on top of an aluminum based layer are examples of the second approach mentioned above. These backup layers provide electrical continuity when the aluminum based layer fails because of stress migration and/or electromigration damage. The high melting temperatures of the refractory metals or alloys are the reason for their immunity to stress migration and electromigration damage. However, their high resistances prevent the use of them for the primary conducting layer as well. For the same reason the resistance of the interconnect increases when the primary, aluminum based conductor fails.
U.S. Pat. No. 5,252,382 to Li discloses the use of patterned interfaces between the metal interconnect and its surrounding passivation and insulation layers as a method of minimizing or eliminating stress migration damage. The stress state in a passivated metal interconnect is here altered by the presence of patterned interfaces which contain regions of good adhesion and regions of poor adhesion. Thus the nucleation and growth of voids and hillocks are suppressed. It is believed that patterned interfaces will also improve electromigration resistance by limiting the current induced stress build-up.