With the explosive popularity of wireless devices, such as laptops, netbooks, cell phones, and other mobile and hand-held communications devices capable of accessing the Internet, wireless data communications is becoming an integral, indispensible feature in portable consumer electronics. The trend towards ever increasing wireless usage has been aided in large part by the availability of highly efficient wireless local area networks (WLAN). Wireless networks create numerous opportunities for connectivity by allowing portable devices to connect to access points linked to the wired Internet, and by eliminating the need for costly wiring systems that would be required to link a multitude of devices to a single point.
The dominant standards for WLAN are those of the IEEE 802.11 family, also known as Wi-Fi. The latest Wi-Fi standard is called IEEE 802.11n. The standard is a significant improvement over earlier standards because it allows for the use of multiple channels. The maximum data rate depends on how much bandwidth each channel is allowed, how many channels are used, and how the data is coded. However, in applications using only one channel to send and receive—1×1 applications—the standard can achieve a maximum data rate of 150 megabits per second (Mbps). If enough resources are dedicated, and the right coding is used, the standard can achieve up to 600 Mbps. However, most applications will have data rates below 400 Mbps.
The ability to connect to a WLAN is generally provided to a host device through the addition of a wireless communication circuit. The wireless communication circuit is set to transfer data between a wireless network and the host device in accordance with a particular standard such as IEEE 802.11n. A host device could be a handset, laptop, personal data assistant, computer, portable gamming system, camera, or any other electronic device. The main element of a wireless communication circuit is the circuit's radio.
In most modern applications, the wireless communication circuit will have an integrated radio wherein each of a radio frequency processing (RF) component, a base band processing component (BB), and a media access control component (MAC) are all contained on a single integrated circuit (IC). The MAC is tasked with assuring that packets sent across a network by different stations on a wireless network do not conflict, that such packets are delivered as desired, and that the data within the packets is properly packaged in accordance with the relevant standard. The BB and the RF prepare the packaged communication data for transfer through the air. The RF modulates the signal in accordance with the relevant standard. Example modulation techniques include quadrature amplitude modulation (QAM), amplitude modulation (AM), and frequency modulation (FM).
Communication data generally needs to be transferred from the host device to the wireless communication circuit across an interface. The term interface can refer to the entire system that links the host device to the wireless communication circuit, but it can also be used to refer to the portion of either that allows the system to communicate. As such, the portion of the host device that allows it to communicate externally would be called the host interface. Interfaces need to operate according to certain generally accepted standards because they are often used to link devices that are built by separate entities. Two common examples of interface standards used for wireless communication circuits are the peripheral component interconnect express (PCIe) standard, and the secure digital input/output (SDIO) standard. As such, an interface following the SDIO standard would be called an SDIO interface. PCIe is generally used when the host device has a large power supply, while SDIO is used when the host device is portable and is constrained by a tight power budget.
The operation of a wireless communication circuit that uses a PCIe interface with its host device can best be understood with reference to FIG. 1. In FIG. 1, host device 100 contains system memory 101, and is connected to wireless communication circuit 110 through a PCIe interface comprised of host PCIe interface 102, and endpoint PCIe interface 111. Wireless communication circuit 110 additionally comprises MAC 112, BB 113, RF 114, and antenna 115.
The system displayed in FIG. 1 uses a feed-through data transfer scheme. The term feed-through is meant to refer to the fact that there is no requirement that communication data be temporarily stored on wireless communication circuit 110 before it is sent out by antenna 115. The PCIe interface is capable of running at 2.5 GHz. Therefore, data is transferred fast enough across the interface for data to be sent directly through from host device 100 to antenna 115.
PCIe is a standard that allows for bidirectional bus mastering. This means that either host device 100, or wireless communication circuit 110 can take control of bus 120, and data can flow just as easily in one direction or the other. As described above, this allows wireless communication circuit 110 to take control of the bus and easily transfer communication data between the system memory in host device 100 and through antenna 115. In addition, this allows host device 100 to take control of bus 120 and configure MAC 112, BB 113, and RF 114. Finally, bidirectional bus mastering allows MAC 112 to write data directly into system memory 101 at an internally specified address without the need for additional intelligence or storage on memory circuit 110.
Although the system using a PCIe interface has high throughput, this high speed comes at the cost of high power consumption. This may be highly undesirable for most hand-held mobile devices since they run off small lithium batteries. The PCIe standard is more suitable for mobile computers which run off large battery packs and can therefore afford the power-hungry PCIe solution. Incorporating a PCIe interface would unduly shorten the amount of time between charges for a hand-held mobile device. Therefore, the PCIe approach gives good throughput performance, but it is so power hungry, that it is not a practical solution for hand-held portable devices. Moreover, the PCIe interface requires a relatively large amount of silicon area to implement. The resulting increase in manufacturing cost and increased chip size makes the PCIe interface a very unattractive candidate for use in hand-held portable, mobile applications.
The operation of a wireless communication circuit that uses an SDIO interface to communicate with its host device can best be understood with reference to FIG. 2. In FIG. 2, host device 200 contains system memory 201, and is connected to wireless communication circuit 210 through an SDIO interface comprised of master SDIO interface 202, and slave SDIO interface 211. Wireless communication circuit 210 additionally comprises MAC 212, BB 213, RF 214, and antenna 215. Also, wireless communication circuit 210 comprises internal bus 216, memory 217, and CPU 218.
The system displayed in FIG. 2 uses a store-and-forward data transfer scheme. The term store-and-forward refers to the fact that communication data that transfers between host device 200 and antenna 215 is temporarily stored in memory 217. The SDIO interface does not allow bus mastering by the client chip, so data has to be buffered on wireless communication circuit 210. The memory required for such buffering can run into the range of hundreds of kilo-bytes (kb). This memory will usually be comprised of area consuming random access memory for the communication data, as well as read only memory for CPU 218.
SDIO is a master-slave interface standard, and therefore allows only single directional bus mastering. The physical connections that connect master SDIO interface 202 and slave SDIO interface 211 comprise bus 220, and interrupt line 221. When data is transmitted by host device 200, it will use SDIO master interface 202 to write the communication data into memory 217. Then, host device 200 will inform CPU 218 that the data is ready to be transmitted. Next, CPU 218 will configure MAC 212, BB 213, and RF 214. Finally, MAC 212 will act as master of internal bus 216, will request data from memory 217, and then will send it out. When data is received, this process happens in reverse, except that CPU 218 informs host device 200 that the data is ready to be written into memory 201 by using interrupt line 221. Unfortunately, the downside to using an SDIO interface is that it does not allow bus mastering by the client wireless chip. Consequently, all wireless chips that use this interface typically require a large amount of buffer memory as well as a central processing unit (CPU) to manage this memory. The disadvantages to using an SDIO interface is that the buffer and CPU increase manufacturing costs as well as increase the overall size of the wireless chip. Therefore, neither the SDIO approach nor the PCIe approach is optimal for hand-held portable device applications.
As wireless demands continue expanding, the pressure for electronic devices to provide wireless connectivity at a faster rate, with longer battery life, and less cost will continue to grow. Inventions that contribute to improvements in the power conservation, miniaturization, and speed of wireless communication circuits are of extreme importance as they will all facilitate the potential explosion of new applications for all of society's electronic devices.