1. Field of the Invention
The present invention is generally related to chip assembly and packaging, and more particularly, to a base substrate for chip scale packaging.
2. Description of the Related Art
The conventional chip scale packaging, as shown in FIG. 1, generally has a base board 1 made of glass fibers mixed with epoxy resin. Base board 1 has a center through opening 2 and an upper circuit side 3 with a plurality of bond pads 4. A chip 5 has an active side 7 attached to a bottom side 6 of base board 1. Active side 7 of chip 5 has a plurality of bond pads 8 disposed on the centre portion thereof. Bond pads 8 are interconnected to bond pads 4 via connecting bond wires 9 passing though opening 2.
The packaging mentioned above has a chief defect. It is that for being made of hard materials, base board 1 is always deformed or destroyed during punching or drilling used to form through opening 2.
To eliminate this defect, U.S. Pat. No. 6,717,276 discloses a base substrate constructed by an upper metal layer, a bottom metal layer and an organic tape layer attached therebetween. For needing not to punch or drill, such a base substrate is capable of eliminating the defect of the prior art base board mentioned above. However, it needs a plurality of vias disposed on the organic tape layer, and a plurality of openings disposed on the bottom metal layer to provide a series of electrical interconnects between the upper metal layer and the bottom metal layer. The vias and openings are formed generally by etching methods which are expensive and time-consuming.
Thus, there is desired an improved base substrate for chip scale packaging which can effectively eliminate these and other defects in prior art base substrates mentioned above.