Hierarchical Networks-on-Chip Interconnect for Astrocyte-Neuron Network Hardware
Scalable hardware interconnect is a significant research challenge for neuromorphic systems in particular, this becomes more pronounced when we seek to realise the integration of neurons with astrocytes cells. This paper presents a novel interactive architecture for the astrocyte-neuron network (ANN) hardware systems, and the novel Hierarchical Astrocyte Network Architecture (HANA) using networks-on-chip (NoC) for the efficient information exchange between astrocyte cells. The proposed HANA incorporates a two-level NoC packet transmission mechanism to increase the information exchange rate between astrocyte cells and to provide a NoC traffic balance for local and global astrocyte networks. Experimental results demonstrate that the proposed HANA approach can provide efficient information exchange rates for the ANN, while the hardware synthesis results using 90 nm CMOS technology show that it has a low area overhead which maintains scalability.
This report documents work performed by the University of California at Davis in collaboration with the California Department of Transportation (Caltrans) in relationship to a Precursor System Analysis dealing with a study of automated construction, maintenance, and operational requirements for Automated Highway Systems (AHSs). This study was conducted in the activity area "K" dealing with AHS roadway operational analysis. The report documents a design analysis for a robotic system for automated installation of discrete magnetic markers for AHSs. The design includes a manpower assessment and a cost-benefit analysis. Summaries for supporting research are included in appendices, including: a literature review, a reference architecture and classification system for an AHS, and a computer simulation and animation of the prototype discrete magnetic marker placement system described in this report.