Athlon
Athlon is the brand name applied to a series of x86-compatible microprocessors designed and manufactured by AMD. The original Athlon (now called Athlon Classic) was the first seventh-generation x86 processor and the first desktop processor to reach speeds of one gigahertz (GHz). It made its debut as AMD's high-end processor brand on June 23, 1999. Over the years AMD has used the Athlon name with the 64-bit Athlon 64 architecture, the Athlon II, and Accelerated Processing Unit (APU) chips targeting the Socket AM1 desktop SoC architecture, and Socket AM4 Zen microarchitecture. The modern Zen-based Athlon with a Radeon Graphics processor was introduced in 2019 as AMD's highest-performance entry-level processor.

Athlon comes from the Ancient Greek  (athlon), meaning "(sport) contest", or "prize of a contest", or "place of a contest; arena". With the Athlon name originally used for AMD's high-end processors, AMD currently uses Athlon for budget APUs with integrated graphics. AMD positions the Athlon against its rival, the Intel Pentium.

Brand history

K7 design and development
The first Athlon processor was a result of AMD's development of K7 processors in the 1990s. AMD founder and then-CEO Jerry Sanders aggressively pursued strategic partnerships and engineering talent in the late 1990s, working to build on earlier successes in the PC market with the AMD K6 processor line. One major partnership announced in 1998 paired AMD with semiconductor giant Motorola to co-develop copper-based semiconductor technology, resulting in the K7 project being the first commercial processor to utilize copper fabrication technology. In the announcement, Sanders referred to the partnership as creating a "virtual gorilla" that would enable AMD to compete with Intel on fabrication capacity while limiting AMD's financial outlay for new facilities. The K7 design team was led by Dirk Meyer, who had previously worked as a lead engineer at DEC on multiple Alpha microprocessors. When DEC was sold to Compaq in 1998 and discontinued Alpha processor development, Sanders brought most of the Alpha design team to the K7 project. This added to the previously acquired NexGen K6 team, which already included engineers such as Vinod Dham.

Original release
The AMD Athlon processor launched on June 23, 1999, with general availability by August 1999. Subsequently, from August 1999 until January 2002, this initial K7 processor was the fastest x86 chip in the world. Wrote the Los Angeles Times on October 5, 1999: "AMD has historically trailed Intel’s fastest processors, but has overtaken the industry leader with the new Athlon. Analysts say the Athlon, which will be used by Compaq, IBM and other manufacturers in their most powerful PCs, is significantly faster than Intel’s flagship Pentium III, which runs at a top speed of 600MHz." A number of features helped the chips compete with Intel. By working with Motorola, AMD had been able to refine copper interconnect manufacturing about one year before Intel, with the revised process permitting 180-nanometer processor production. The accompanying die-shrink resulted in lower power consumption, permitting AMD to increase Athlon clock speeds to the 1 GHz range. The Athlon architecture also used the EV6 bus licensed from DEC as its main system bus, allowing AMD to develop its own products without needing to license Intel's GTL+ bus. By the summer of 2000, AMD was shipping Athlons at high volume, and the chips were being used in systems by Gateway, Hewlett-Packard, and Fujitsu Siemens Computers among others.

Later Athlon iterations
The second-generation Athlon, the Thunderbird, debuted in 2000. AMD released the Athlon XP the following year, and the Athlon XP's immediate successor, the Athlon 64, was an AMD64-architecture microprocessor released in 2003. After the 2007 launch of the Phenom processors, the Athlon name was also used for mid-range processors, positioned above brands such as Sempron. The Athlon 64 X2 was released in 2005 as the first native dual-core desktop CPU designed by AMD, and the Athlon X2 was a subsequent family based on the Athlon 64 X2.  Introduced in 2009, Athlon II was a dual-core family of Athlon chips.

A USD$55 low-power Athlon 200GE with a Radeon graphics processor was introduced in September 2018, sitting under the Ryzen 3 2200G. This iteration of Athlon used AMD's Zen-based Raven Ridge core, which in turn had debuted in Ryzen with Radeon graphics processors. With the release, AMD began using the Athlon brand name to refer to "low-cost, high-volume products", in a situation similar to both Intel's Celeron and Pentium Gold. The modern Athlon 3000G was introduced in 2019 and was positioned as AMD's highest-performance entry-level processor. AMD positions the Athlon against its rival, the Intel Pentium. While CPU processing performance is in the same ballpark, the Athlon 3000G uses Radeon Vega graphics, which are rated as more powerful than the Pentium's Intel UHD Graphics.

Generations

Athlon Classic (1999)

The AMD Athlon processor launched on June 23, 1999, with general availability by August 1999. Subsequently, from August 1999 until January 2002, this initial K7 processor was the fastest x86 chip in the world. At launch it was, on average, 10% faster than the Pentium III at the same clock for business applications and 20% faster for gaming workloads. In commercial terms, the Athlon "Classic" was an enormous success.

Features

The Athlon Classic is a cartridge-based processor, named Slot A and similar to Intel's cartridge Slot 1 used for Pentium II and Pentium III. It used the same, commonly available, physical 242-pin connector used by Intel Slot 1 processors but rotated by 180 degrees to connect the processor to the motherboard. The cartridge assembly allowed the use of higher-speed cache memory modules than could be put on (or reasonably bundled with) motherboards at the time. Similar to the Pentium II and the Katmai-based Pentium III, the Athlon Classic contained 512 KB of L2 cache. This high-speed SRAM cache was run at a divisor of the processor clock and was accessed via its own 64-bit back-side bus, allowing the processor to service both front-side bus requests and cache accesses simultaneously, as compared to pushing everything through the front-side bus.

The Argon-based Athlon contained 22 million transistors and measured 184 mm2. It was fabricated by AMD in a version of their CS44E process, a 250 nm complementary metal–oxide–semiconductor (CMOS) process with six levels of aluminium interconnect. "Pluto" and "Orion" Athlons were fabricated in a 180 nm process.

The Athlon's CPU cache consisted of the typical two levels. Athlon was the first x86 processor with a 128 KB split level-1 cache; a 2-way associative cache separated into 2×64 KB for data and instructions (a concept from Harvard architecture). SRAM cache designs at the time were incapable of keeping up with the Athlon's clock scalability, resulting in compromised CPU performance in some computers. With later Athlon models, AMD would integrate the L2 cache onto the processor itself, removing dependence on external cache chips. The Slot-A Athlons were the first multiplier-locked CPUs from AMD, preventing users from setting their own desired clock speed. This was done by AMD in part to hinder CPU remarking and overclocking by resellers, which could result in inconsistent performance. Eventually a product called the "Goldfingers device" was created that could unlock the CPU.

AMD designed the CPU with more robust x86 instruction decoding capabilities than that of K6, to enhance its ability to keep more data in-flight at once. The critical branch-predictor unit was enhanced compared to the K6. Deeper pipelining with more stages allowed higher clock speeds to be attained. Like the AMD K5 and K6, the Athlon dynamically buffered internal micro-instructions at runtime resulting from parallel x86 instruction decoding. The CPU is an out-of-order design, again like previous post-5x86 AMD CPUs. The Athlon utilizes the Alpha 21264's EV6 bus architecture with double data rate (DDR) technology.

AMD ended its long-time handicap with floating point x87 performance by designing a super-pipelined, out-of-order, triple-issue floating-point unit (FPU). Each of its three units could independently calculate an optimal type of instructions with some redundancy, making it possible to operate on more than one floating-point instruction at once. This FPU was a huge step forward for AMD, helping compete with Intel's P6 FPU. The 3DNow! floating-point SIMD technology, again present, received some revisions and was renamed "Enhanced 3DNow!" Additions included DSP instructions and the extended MMX subset of Intel SSE.

Specifications
 L1-cache: 64 + 64 KB (data + instructions)
 L2-cache: 512 KB, external chips on CPU module with 50%, 40% or 33% of CPU speed
 MMX, 3DNow!
 Slot A (EV6)
 Front-side bus: 200 MT/s (100 MHz double-pumped)
 Vcore: 1.6 V (K7), 1.6–1.8 V (K75)
 First release: June 23, 1999 (K7), November 29, 1999 (K75)
 Clock-rate: 500–700 MHz (K7), 550–1000 MHz (K75)

Athlon Thunderbird (2000–2001)

The second-generation Athlon, the Thunderbird or T-Bird, debuted on June 4, 2000. This version of the Athlon was available in a traditional pin-grid array (PGA) format that plugged into a socket ("Socket A") on the motherboard, or packaged as a Slot A cartridge. The major difference between it and the Athlon Classic was cache design, with AMD adding in 256 KB of on-chip, full-speed exclusive cache. In moving to an exclusive cache design, the L1 cache's contents were not duplicated in the L2, increasing total cache size and functionally creating a large L1 cache with a slower region (the L2) and a fast region (the L1), making the L2 cache into basically a victim cache. With the new cache design, need for high L2 performance and size was lessened, and the simpler L2 cache was less likely to cause clock scaling and yield issues. Thunderbird also moved to a 16-way associative layout.

The Thunderbird was "cherished by many for its overclockability" and proved commercially successful, as AMD's most successful product since the Am386DX-40 ten years earlier. AMD's new fab facility in Dresden increased production for AMD overall and put out Thunderbirds at a fast rate, with the process technology improved by a switch to copper interconnects. After several versions were released in 2000 and 2001 of the Thunderbird, the last Athlon processor using the Thunderbird core was released in 2001 in the summer, at which point speeds were at 1.4 GHz.

The locked multipliers of Socket A Thunderbirds could often be disabled through adding conductive bridges on the surface on the chip, a practice widely known as "the pencil trick".

Specifications
 L1-cache: 64 + 64 KB (data + instructions)
 L2-cache: 256 KB, full speed
 MMX, 3DNow!
 Slot A & Socket A (EV6)
 Front-side bus: 100 MHz (Slot-A, B-models), 133 MHz (C-models) (200 MT/s, 266 MT/s)
 Vcore: 1.70–1.75 V
 First release: June 4, 2000
 Transistor count: 37 million
 Manufacturing process: /180 nm
 Clock rate:
 Slot A: 650–1000 MHz
 Socket A, 100 MHz FSB (B-models): 600–1400 MHz
 Socket A, 133 MHz FSB (C-models): 1000–1400 MHz

Athlon XP (2001–2003)

Overall, there are four main variants of the Athlon XP desktop CPU: the Palomino, the Thoroughbred, the Thorton, and the Barton. A number of mobile processors were also released, including the Corvette models, and the Dublin model among others.

Palomino 

On May 14, 2001, AMD released the Athlon XP processor. It debuted as the Mobile Athlon 4, a mobile version codenamed Corvette, with the desktop Athlon XP released in the fall. The third-generation Athlon, code-named Palomino, came out on October 9, 2001, as the Athlon XP, with the suffix signifying extreme performance and unofficially referencing Windows XP. Palomino's design used 180 nm fabrication process size. The Athlon XP was marketed using a performance rating (PR) system comparing it to the Thunderbird predecessor core. Among other changes, Palomino consumed 20% less power than the Thunderbird, comparatively reducing heat output, and was roughly 10% faster than Thunderbird. Palomino also had enhanced K7's TLB architecture and included a hardware data prefetch mechanism to take better advantage of memory bandwidth. Palomino was the first K7 core to include the full SSE instruction set from the Intel Pentium III, as well as AMD's 3DNow! Professional. Palomino was also the first socketed Athlon officially supporting dual processing, with chips certified for that purpose branded as the Athlon MP (multi processing), which had different specifications. According to HardwareZone, it was possible to modify the Athlon XP to function as an MP.

Specifications
 L1-cache: 64 + 64 KB (data + instructions)
 L2-cache: 256 KB, full speed
 MMX, 3DNow!, SSE
 Socket A (EV6)
 Front-side bus: 133 MHz (266 MT/s)
 Vcore: 1.50 to 1.75 V
 Power consumption: 68 W
 First release: October 9, 2001
 Clock-rate:
 Athlon 4: 850–1400 MHz
 Athlon XP: 1333–1733 MHz (1500+ to 2100+)
 Athlon MP: 1000–1733 MHz

Thoroughbred

The fourth-generation of Athlon was introduced with the Thoroughbred core, or T-Bred, on April 17, 2002. The Thoroughbred core marked AMD's first production 130 nm silicon, with smaller die size than its predecessor. There came to be two steppings (revisions) of this core commonly referred to as Tbred-A and Tbred-B. Introduced in June 2002, the initial A version was mostly a direct die shrink of the preceding Palomino core, but did not significantly increase clock speeds over the Palomino. A revised Thoroughbred core, Thoroughbred-B, added a ninth "metal layer" to the eight-layered Thoroughbred-A, offering improvement in headroom over the A and making it popular for overclocking.

Specifications
 L1-cache: 64 + 64 KB (data + instructions)
 L2-cache: 256 KB, full speed
 MMX, 3DNow!, SSE
 Socket A (EV6)
 Front-side bus: 133/166 MHz (266/333 MT/s)
 Vcore: 1.50–1.65 V
 First release: June 10, 2002 (A), August 21, 2002 (B)
 Clock-rate:
 Thoroughbred "A": 1400–1800 MHz (1600+ to 2200+)
 Thoroughbred "B": 1400–2250 MHz (1600+ to 2800+)
 133 MHz FSB: 1400–2133 MHz (1600+ to 2600+)
 166 MHz FSB: 2083–2250 MHz (2600+ to 2800+)

Barton / Thorton

Fifth-generation Athlon Barton-core processors were released in early 2003. While not operating at higher clock rates than Thoroughbred-core processors, they featured an increased L2 cache, and later models had an increased 200 MHz (400 MT/s) front side bus. The Thorton core, a blend of thoroughbred and Barton, was a later variant of the Barton with half of the L2 cache disabled. The Barton was used to officially introduce a higher 400 MT/s bus clock for the Socket A platform, which was used to gain some Barton models more efficiency. By this point with the Barton, the four-year-old Athlon EV6 bus architecture had scaled to its limit and required a redesign to exceed the performance of newer Intel processors. By 2003, the Pentium 4 had become more than competitive with AMD's processors, and Barton only saw a small performance increase over the Thoroughbred-B it derived from, insufficient to outperform the Pentium 4. The K7-derived Athlons such as Barton were replaced in September 2003 by the Athlon 64 family, which featured an on-chip memory controller and a new HyperTransport bus.

Notably, the 2500+ Barton with 11× multiplier was effectively identical to the 3200+ part other than the FSB speed it was binned for, meaning that seamless overclocking was possible more often than not. Early Thortons could be restored to the full Barton specification with the enabling of the other half of the L2 cache from a slight CPU surface modification, but the result was not always reliable.

Specifications
Barton (130 nm)
 L1-cache: 64 + 64 KB (data + instructions)
 L2-cache: 512 KB, full speed
 MMX, 3DNow!, SSE
 Socket A (EV6)
 Front-side bus: 166/200 MHz (333/400 MT/s)
 Vcore: 1.65 V
 First release: February 10, 2003
 Clock rate: 1833–2333 MHz (2500+ to 3200+)
 133 MHz FSB: 1867–2133 MHz (2500+ to 2800+); uncommon
 166 MHz FSB: 1833–2333 MHz (2500+ to 3200+)
 200 MHz FSB: 2100, 2200 MHz (3000+, 3200+)

Thorton (130 nm)
 L1-cache: 64 + 64 KB (Data + Instructions)
 L2-cache: 256 KB, full speed
 MMX, 3DNow!, SSE
 Socket A (EV6)
 Front-side bus: 133/166/200 MHz (266/333/400 MT/s)
 Vcore: 1.50–1.65 V
 First release: September 2003
 Clock rate: 1667–2200 MHz (2000+ to 3100+)
 133 MHz FSB: 1600–2133 MHz (2000+ to 2600+)
 166 MHz FSB: 2083 MHz (2600+)
 200 MHz FSB: 2200 MHz (3100+)

Mobile Athlon XP 

The Palomino core debuted in the mobile market before the PC market in May 2001, where it was branded as Mobile Athlon 4 with the codename "Corvette". It distinctively used a ceramic interposer much like the Thunderbird instead of the organic pin grid array package used on all later Palomino processors. In November 2001, AMD released a 1.2 GHz Athlon 4 and a 950 MHz Duron. The Mobile Athlon 4 processors included the PowerNow! function, which controlled a laptop's "level of processor performance by dynamically adjusting its operating frequency and voltage according to the task at hand", thus extending "battery life by reducing processor power when it isn't needed by applications". Duron chips also included PowerNow! In 2002, AMD released a version of PowerNow! called Cool'n'Quiet, implemented on the Athlon XP but only adjusting clock speed instead of voltage.

In 2002 the Athlon XP-M (Mobile Athlon XP) replaced the Mobile Athlon 4 using the newer Thoroughbred core, with Barton cores for full-size notebooks. The Athlon XP-M was also offered in a compact microPGA socket 563 version. Mobile XPs were not multiplier-locked, making them popular with desktop overclockers.

Athlon 64 (2003–2009)

The immediate successor to the Athlon XP, the Athlon 64 is an AMD64-architecture microprocessor produced by AMD, released on September 23, 2003. A number of variations, all named after cities, were released with 90 nm architecture in 2004 and 2005. Versions released in 2007 and 2009 utilized 65 nm architecture.

Athlon 64 X2 (2005–2009)

The Athlon 64 X2 was released in 2005 as the first native dual-core desktop CPU designed by AMD using an Athlon 64. The Athlon X2 was a subsequent family of microprocessors based on the Athlon 64 X2. The original Brisbane Athlon X2 models used 65 nm architecture and were released in 2007.

Athlon II (2009–2012) 
Athlon II is a family of central processing units. Initially a dual-core version of the Athlon II, the K-10-based Regor was released in June 2009 with 45-nanometer architecture. This was followed by a single-core version Sargas, followed by the quad-core Propus, the triple-core Rana in November 2009, and the Llano 32 nm version released in 2011.

Bristol-Ridge-based Athlon X4 (2017)

Main Article: Athlon X4 "Bristol Ridge" (2017, 28 nm) 
The Bristol Ridge Athlon X4 lineup was released in 2017. It was based on the Excavator microarchitecture and used 2 Excavator modules tolalling 4 "cores". It had a dual-channel DDR4-2400 memory controller with clockspeeds up to 4.0GHz. It ran on the new Socket AM4 platform that was being used for Zen1-3 CPU's.

Zen-based Athlon (2018–present)
The Zen-based Athlon with Radeon graphics processors was launched in September 2018 with the Athlon 200GE. Based on AMD's Raven Ridge core previously used in variants of the Ryzen 3 and Ryzen 5, the Athlon 200GE had half of the cores but left SMT enabled. It also kept the same 4 MiB L3 cache, but the L2 cache was halved to 1 MiB.

In addition, the number of graphics compute units was limited to 3 in the Athlon 200GE, and the chip was multiplier-locked. Despite its limitations, the Athlon 200GE performed competitively against the 5000-series Intel Pentium-G, displaying similar CPU performance but an advantage in GPU performance.

On November 19, 2019, AMD released the Athlon 3000G, with a higher 3.5 GHz core clock and 1100 MHz graphics clock compared to the Athlon 200GE, also with two cores. The main functional difference between the 200GE was the Athlon 3000G's unlocked multiplier, allowing the latter to be overclocked on B450 and X470 motherboards.

Specifications
Raven Ridge (14 nm), Picasso (12 nm) (see the list article for more details)
 L1 cache: 192 KiB (2×64 KiB + 2×32 KiB)
 L2 cache: 1 MiB (2×512 KiB)
 L3 cache: 4 MiB
 Memory: dual-channel DDR4-2666, 64 GiB max.
 Socket AM4
 TDP: 35 W
 First release: September 6, 2018
 CPU clock rate: 3.2 to 3.5 GHz
 GPU clock rate: 1000 to 1100 MHz

Supercomputers
A number of supercomputers have been built using Athlon chips, largely at universities. Among them:
 In 2000, several American students claimed to have built the world's least expensive supercomputer by clustering 64 AMD Athlon chips together, also marking the first time Athlons had been clustered in a supercomputer.
 The PRESTO III, a Beowulf cluster of 78 AMD Athlon processors, was built in 2001 by the Tokyo Institute of Technology. That year it ranked 439 on the TOP500 list of supercomputers.
 In 2002, a "128-Node 256-Processor AMD Athlon Supercomputer Cluster" was installed at the Ohio Supercomputer Center at the University of Toledo.
 Rutgers University, Department of Physics & Astronomy. Machine: NOW Cluster—AMD Athlon. CPU: 512 AthlonMP (1.65 GHz). Rmax: 794 GFLOPS.

See also
 List of AMD Athlon processors
 List of AMD Duron processors
 List of AMD Phenom processors
 List of AMD Opteron processors
 List of AMD Sempron processors

References

External links

Website

Computer-related introductions in 1999
AMD x86 microprocessors
AMD microarchitectures
Superscalar microprocessors
X86 microarchitectures