1. A method of configuring an integrated circuit (IC) comprising a plurality of configurable circuits, the method comprising: assigning a plurality of consecutive logical operations to be performed by a plurality of configurable logic circuits, each of the configurable logic circuits assigned to perform one of the consecutive logical operations; identifying consecutive first and second logical operations in the plurality of consecutive logical operations, wherein the second logical operation starts at a first clock cycle and completes at a second clock cycle that is immediately subsequent to the first clock cycle; configuring a particular latch to (i) open and pass the result of the first logical operation from the first configurable logic circuit to the second configurable logic circuit during the first clock cycle and (ii) close and hold the result of the first logical operation for the second configurable logic circuit during the second clock cycle.