1. A method for designing integrated circuits, comprising: receiving a register transfer level (RTL) description of a circuit; synthesizing the RTL description by selecting cells from a standard cell library to implement functions in accordance with the RTL description, the selection of cells based in part on timing requirements indicated by the RTL description; determining if the selected cells meet the timing requirements indicated by the RTL description for both a slow corner and a fast corner, the slow corner being determined at least in part by a slow process parameter, a slow voltage parameter, and a slow temperature parameter, the fast corner being determined at least in part by a fast process parameter, a fast voltage parameter, and a fast temperature parameter, with the slow voltage parameter approximate the fast voltage parameter.