1. A method of creating a floor plan design for a circuit, comprising: receiving an initial floor plan design specifying a plurality of blocks and one or more PG wires routed among the blocks; receiving design constraints associated with the initial floor plan design; identifying problems in the PG wires; modifying the PG wires so as to correct the problems, and comply with the received design constraints; and producing a modified floor plan design specifying the modified PG wires.