1. A method of performing systemic diagnostics for a wafer, the wafer including a plurality of integrated circuit (IC) chips fabricated according to a layout design, the method comprising: selecting a rule for analysis, the rule being a design for manufacturability (DFM) rule; for each IC chip, extracting two sets of IC features adjacent the rule based on the layout design; running upconverted diagnostics to generate computed numbers associated with combination categories for each set; running zonal analysis on the two sets using the computed numbers to derive metrics for the two sets; and generating a report based on the zonal analysis.