1. A method of modeling designs customized in via-customizable integrated circuits, comprising: automatically creating a set of legal via sites by determining all intersections of user configurable metals adjacent to a via programmable layer and performing design rule checks to determine the legality of each via site; placing a model of an unselected via at a via sites in said set of legal via sites in a customizable integrated circuit; and replacing each model of an unselected via with a model of a selected via at customizable via sites to be utilized in a design to customize the customizable integrated circuit.