1. A method for checking constraints equivalence of an integrated circuit (IC) design, comprising: receiving, via a computer device, a group of constraint files of the IC design, wherein the group of constraint files includes at least a first constraint file and a second constraint file, each constraint file containing a plurality of constraints; determining whether the first constraint file and the second constraint file are clean; selecting a pair of design constraints from the plurality of constraints, a first design constraint from the first constraint file and a second design constraint from the second constraint file; and for each pair of constraints, performing a plurality of checks to determine equivalency of the first design constraint to the second design constraint; wherein a constraint is defined to meet a design goal of the IC.