1. A method of vectorless dynamic power estimation for a circuit design, the method comprising: forming, using a processor, a complex basic element within the circuit design, wherein the complex basic element has a single input node and a single output node and comprises a plurality of basic elements where at least two of the basic elements are coupled by a feedback path; determining, using the processor, initial toggle rates for basic elements within the circuit design; determining, using the processor, an initial toggle rate for the complex basic element; generating, using the processor, final toggle rates by updating the initial toggle rates according to a control signal analysis; and calculating, using the processor, dynamic power dissipation for the circuit design using the final toggle rates; wherein the circuit design is configured for implementation within an integrated circuit.