1. A system for dynamic development of computing applications comprising: one or more processors; one or more linked repositories storing components, blueprints, and graphs; a visual design subsystem and a software development kit for creating, testing and outputting at least one computing application realized by a blueprint, the blueprint used to instantiate a graph at application runtime, the graph representing a workflow of the components from the components stored in the one or more linked repositories, the graph defining an arrangement of the components in functional blocks with specific orders of operation for the functional blocks, and connections between the functional blocks; the one or more processors configured to: define a computing processing mechanism for processing data containers of computing data at the application runtime using each of the component, the each of component is a distribution plug in unit; instantiate the graph using the blueprint; using the graph, define connections between the components using pins to pass data between the components, and properties for the components, wherein the graph is an instantiation of the corresponding the computing application realized by the blueprint at the application runtime, and the components of the graph comprise at least one compound component with an inner component embedded within an outer component, the inner component promoting its properties to the outer component; wherein the graph instantiated by the blueprint comprises: a label referencing a subgraph of the one or more components, wherein the subgraph connects to the graph using input and output pins, wherein the graph and sub-graph initiate running process instances on disparate host systems, wherein the input and output pins decouple the graph and sub-graph and handle interprocess communication between the running process instances on the disparate host systems; and at least two components written for different architectures, wherein the graph instantiates the running process instances on the disparate host systems for each of the different architectures, and additional pins handle interprocess communication between the running process instances for the each of the different architectures.