1. A method for executing a vector instruction in a processor, comprising: while dispatching instructions at runtime, encountering an Actual instruction; upon determining that a result of the Actual instruction is predictable, dispatching a prediction micro-operation associated with the Actual instruction, wherein the prediction micro-operation generates a predicted result vector for the Actual instruction; and executing the prediction micro-operation, which comprises: optionally receiving a predicate vector; generating a predicted result vector, wherein, if the predicate vector is received, for each element of the predicted result vector for which the predicate vector is active, otherwise, for each element of the predicted result vector, generating the predicted result vector comprises setting the element of the predicted result vector to true.