1. A method of determining the effective capacitance of a gate in an integrated circuit design comprising: constructing a π model for the gate which includes an output resistance and a total capacitance, by executing first program instructions in a computer system; reducing the π model to first and second parameters based on the output resistance and the total capacitance, by executing second program instructions in the computer system; providing a slew definition which includes a first voltage level and a second voltage level, by executing third program instructions in the computer system; computing a capacitance coefficient as a function of a slew value of the π model for the slew definition based on the first and second parameters, by executing fourth program instructions in the computer system; and calculating the effective capacitance of the gate as the product of the capacitance coefficient and the total capacitance, by executing fifth program instructions in the computer system.