1. A computer implemented method for performing integer division operations on a central processing unit (CPU), the method comprising: receiving an integer dividend and an integer divisor; computing a floating-point reciprocal based on the divisor; computing a lowered floating-point reciprocal based on the floating-point reciprocal, wherein the lowered floating-point reciprocal is lower than the floating-point reciprocal by up to two least significant bits of the mantissa of the floating-point reciprocal; computing, via an execution unit within the CPU, a lower bound quotient based on a product of the lowered floating-point reciprocal and a floating point variable assigned a value of the integer dividend, wherein the product is designated as an unsigned integer; generating a reduced error quotient based on the lower bound quotient; and correcting the reduced error quotient to generate a final quotient, wherein the CPU does not include any circuitry specifically configured to perform integer division operations.