1. A method for designing the architecture of an embedded system, comprising: (a) a pre-processing phase comprising the steps of: (1) parsing one or more task graphs, one or more system/task constraints, and a resource library for the embedded system, wherein the embedded system has two or more instances of at least one task graph; and (2) generating an association array for the task graphs, wherein the association array stores a limited amount of information for each instance of a task graph of the embedded system to avoid replication of a full description for each task graph having two or more instances and its associated parameters; and (b) a synthesis phase, following the pre-processing phase, comprising the step of allocating one or more groups of one or more tasks in the tasks graphs to one or more processing elements (PEs) in the resource library and allocating one or more edges in the tasks graphs to one or more communication links in the resource library, based on performance evaluation of one or more possible allocations for each of the groups and edges in light of the system/task constraints, wherein the performance evaluation uses the association array.