1. A computer-implemented method of invariant-guided abstraction within a design under verification, the method comprising: initiating a verification process for an identified design; generating by a processor of a computing device one or more invariants corresponding to the design under verification by executing a proof algorithm with an input comprising at least a portion of the design and a specified resource limit; deterministically assigning priority information to the one or more invariants generated, and to components of said design referenced by said invariants; and generating an abstracted design model by performing invariant-guided localization abstraction on a design model utilizing the assigned priority information as a localization hint that results in abstractions that are at least one of (a) smaller abstractions and (b) easier to verify abstractions.