1. A method for verifying an operation of a processor, the method comprising: executing, by a software simulator, a test instruction used for verifying a model dependent operation of the processor; obtaining an expectation value from a result of the executed test instruction; obtaining a result value of the test instruction executed by the processor; and comparing, by a verification processor, the obtained expectation value with the obtained result value to determine a match or mismatch between the expectation value and the result value.