1. A semiconductor wafer, comprising: a test structure operatively configured to detect the presence of a semiconductor material lattice dislocation defect within said test structure, said test structure comprising a plurality of test devices each having a test response and comprising: a first component; second component in a predetermined physical relationship with said first component, wherein said predetermined physical relationship is different from said predetermined physical relationship of each other of said plurality of test devices; and sensing circuitry operatively configured to sense said test response of each corresponding respective one of said plurality of test devices.