1. An analog processor comprising: a first memory module for storing a first set of storage values in respective storage elements each representing a respective input to the processor; a second memory module for storing a second set of storage values in analog form in respective storage, the second set of storage values including intermediate values determined during operation of the processor; an analog computation module coupled to the first and the second memory modules, the analog processor being configurable such that in each of a plurality of operation cycles the analog computational module determines values for at least some of the second set of storage values based on at least some of the first and the second sets of storage values; and an output module for generating a set of outputs at least in part from the at least some of the second set of storage values.