1. One or more processor-readable storage device storing computer-executable instructions for causing one or more processors to perform a method, the method comprising: receiving information of a via-type feature group, the via-type feature group comprising two or more via-type features in a layout design, the information comprising targeted locations of the two or more via-type features; constructing a guiding pattern for the via-type feature group based on the targeted locations of the two or more via-type features; determining a backbone structure for the guiding pattern; computing simulated locations of the two or more via-type features based on the backbone structure and a self-assembly model; and comparing the simulated locations with the targeted locations.