1. A method running on a processor, the method comprising: receiving a description of circuit behavior, wherein the description is un-timed; generating a scheduling solution for use in scheduling the description, the scheduling solution including scheduling variables and an objective function, the scheduling variables scheduling the time of at least one operation, the objective function including a penalty term and constraints comprising at least one hard constraint and at least one soft constraint, wherein the constraints are created on the scheduling variables, wherein the penalty term comprises a slack variable representing violations of the constraints, the penalty term measuring a design cost of violating the at least one soft constraint; scheduling the description by applying the scheduling solution to the description; providing timing information of the description as an output of the scheduling.