1. A semiconductor device design system comprising: at least one processor; a schematic design block connected to the at least one processor configured to generate schematic information and pre-coloring information for a semiconductor device, wherein the schematic design block is configured to receive the pre-coloring information from a user, and the pre-coloring information includes mask number information; a netlist file connected to the at least one processor configured to store the schematic information and the pre-coloring information on a non-transitory computer readable medium; a layout design block connected to the at least one processor configured to design a plurality of masks based on the schematic information and the pre-coloring information, wherein the layout design tool is configured to receive the pre-coloring information from the extraction tool; and a layout versus schematic (LVS) comparison block connected to the at least one processor configured to compare the at least one mask to the schematic information and the pre-coloring information.