1. An automated method for identifying specific instructions causing performance degradation within a processing element while running a program using paired performance sampling comprising: upon a first detection of an event of a selected type or source, capturing by a processor an address value representing a storage location of an instruction instance causing the first event; upon subsequent occurrences of events of the selected type or source: counting with a first performance counter in a microprocessor all events of the selected type or source; counting with a second performance counter in a microprocessor only events which are caused by instructions having addresses matching the captured address value; and responsive to the second performance counter reaching a second terminal value prior to or concurrently with the first performance counter reaching a first terminal value, posting an interrupt to an interrupt handler to notify a program that a significant source of the event has been found as represented by the currently captured address.