1. A computer implemented simulation method comprising: during a simulation, simulating a first portion of a sequence of instructions by a first simulation model of a processor; during the simulation, receiving an accuracy control input from a debugger and switching from the first simulation model of the processor to a second simulation model of the processor responsive to the accuracy control input from the debugger, the second simulation model providing a different simulation speed and accuracy than the first simulation model; and during the simulation, simulating a second portion of the sequence of instructions by the second simulation model of the processor upon switching from the first simulation model to the second simulation model.