1. A two-buffer graphic data generation device comprising: a frame memory having a first memory region for storing first graphic data corresponding to a prescribed image and a second memory region for storing second graphic data obtained by reducing said first graphic data, said second graphic data being output as a video signal to be displayed on a display device; and a graphic data generation circuit for generating the second graphic data for display by performing reduction processing on the first graphic data read out from the first memory region of said frame memory during a display blanking period of said display device.