1. A video signal decoder module for processing video signals of different resolutions, said different resolutions including a first resolution and a second resolution, the first resolution being a higher resolution than said second resolution, the video signal decoder module comprising: a mode control circuit for controlling said decoder module to operate in one of a plurality of different modes of operation, said plurality of different modes of operation including a first mode of operation during which a particular data reduction operation is performed and a second mode of operation during which decoding is performed without performing said particular data reduction operation which is performed during said first mode of operation, said mode control circuit controlling said decoder to operate in said first data reduction mode of operation when processing video signals of the first resolution and operating in the second mode of operation when processing video signals of the second resolution; and a controllable data reduction circuit for performing said particular data reduction operation when said mode control circuit indicates that operation is in said first mode of operation but not when said mode control circuit indicates that operation is in said second mode of operation.