1. An on-die termination (“ODT”) circuit for use in a synchronous memory device, the ODT circuit comprising: a termination voltage port for receiving a termination voltage; a data input/output (“I/O”) port; a first termination resistor, one end of which is connected to the data I/O port; and a switch that selectively connects the other end of the first termination resistor to the termination voltage port in response to a termination enable signal.