1. An apparatus for inspecting overlapping figures comprising: a chip overlap inspection unit configured to input a data file on each chip of a plurality of chips arranged in a writing pattern, and inspect an existence of an overlap between a plurality of chips, based on arrangement data on each region of the plurality of chips; a setting unit configured to set, with respect to the plurality of chips, a plurality of hierarchies and a plurality of cell regions of each of the plurality of hierarchies; an extraction unit configured to extract, with respect to a plurality of chips where the overlap occurs, a cell region where the overlap is located, from a higher hierarchy level to a lower hierarchy level in order; a figure overlap judging unit configured to judge an existence of an overlap between a figure in the cell region extracted and a figure in the other cell region extracted; and an output unit configured to output data on a plurality of figures overlapping.