1. A computer-implemented method for electronic design verification comprising: providing, using one or more processors, an electronic design associated with an electronic design automation tool, the electronic design having at least one floating point variable associated therewith; converting the at least one floating point variable of the electronic design to a fixed point variable to generate a fixed point implementation of the electronic design; processing, using a formal engine, the fixed point implementation of the electronic design; and automatically adjusting the fixed-point implementation based upon, at least in part, the at least one floating point variable.