1. A digital signal processor for use with a radar receiver, comprising: an adaptive constant false alarm threshold loop connected to receive signal returns from said radar receiver for producing a signal indicative of a target, memory means connected to receive said signal indicative of a target for storing said signal and updating said signal in accordance with successive signals indicative of a target and producing a digital word indicative of said target, an adaptive background average threshold loop connected to receive said digital word indicative of said target for comparing said word with selected words which precede and follow said word in time and for producing an output signal declaring a target if said word exceeds said selected words, a track signal processor having a first input connected to a track loop signal and a second input connected to receive said output signal from said adaptive background average threshold loop for providing digital range and velocity signals, and an error word generator connected to receive said digital range and velocity signals from said track signal processor for producing an error word signal which is fed back to said first input of said track signal processor for closing a track signal loop.