1. A mask for use in the manufacture of an integrated circuit device, the mask comprising: a transparent substrate having a plurality of mask features disposed thereon, the plurality of mask features comprising, a first set of nearest neighbor mask features spaced substantially equidistant from each other along a first direction, and a second set of nearest neighbor mask features spaced at nonequidistant distances from each other along the first direction; and sub-resolution assist features spaced at various distances away from the plurality mask features, wherein the sub-resolution assist features are spaced away from the plurality of mask features as a function of the spacing between the nearest neighbor mask features.