1. An information processing apparatus comprising: a memory configured to store: a plurality of images including a first image representing a first circuit which is a part of an overall circuit, and a plurality of second images representing respectively a plurality of connection destinations and a plurality of second circuits which are another part of the overall circuit, and correspondence information defining an association relationship between position of each of the plurality of connection destinations at which the first circuit and the plurality of second circuits are coupled, and wiring information of wiring which has one end located at the position of each of the plurality of connection destinations; and a processor coupled to the memory and configured to execute processes comprising: identifying the first circuit represented by the first image from among the overall circuit; accepting a selection, previously performed by a user, of a connection point in the first image; acquiring, based on the correspondence information, position information of a position of one of the plurality of connection destinations in a second image of a second circuit, the one of the plurality of connection destinations in the second image being coupled to the connection point in the first image; acquiring, based on the correspondence information, the wiring information of a first wiring whose one end is located at the position of the one of the plurality of destination connections; extracting, from the plurality of second images, a plurality of partial images that are portions of the plurality of second images, the plurality of partial images including area of the first wiring and the plurality of connection destinations based on the acquired position information and the acquired wiring information; and outputting a circuit image comprising a plurality of extracted partial images along with the first image.