1. A high throughput CMOS Image Sensor including: a plurality of digital image sensors arranged in a two dimensional array; each digital image sensor including: a photodiode; an inverter; a first transistor connecting a cathode of the photodiode to a positive supply rail; a second transistor connecting the cathode of the photodiode to an input of the inverter; a third transistor connected to the input and an output of the inverter configured to cancel offset voltage when the second transistor is off; wherein said first transistor provides a reset of said photodiode, said second transistor provides a path for discharging the input of said inverter through said photodiode and the output of the inverter is unary encoded; a plurality of unary to binary converters for sequentially converting output of a plurality or rows of the digital image sensors to binary numbers; a controller for synchronising readout from the plurality of rows of the digital image sensors.