1. A DDR and QDR converter, comprising: a QDR interface, to perform a signal exchange with a QDR device; a DDR interface, to perform a signal exchange with a DDR device; a clock controller, to convert a clock signal output from the QDR device into an operation clock signal used by the DDR and QDR converter and the DDR device; a state register set, to store a QDR device state; a data converter, to convert a QDR data format into an appropriate DDR data format, and to convert a DDR data format into an appropriate QDR data format; and a command controller, to obtain a QDR command signal from the QDR device and process the QDR command signal into a corresponding DDR command signal output to the DDR device.