1. An imager array, comprising: a plurality of focal planes, where each focal plane comprises a two dimensional arrangement of pixels having at least two pixels in each dimension and each focal plane is contained within a region of the imager array that does not contain pixels from another focal plane; control circuitry configured to control the capture of image information by the pixels within the focal planes, where the control circuitry is configured so that the capture of image information by the pixels in at least two of the focal planes is separately controllable, wherein the control circuitry is further configured to capture images for each of the plurality of active focal planes; sampling circuitry configured to convert pixel outputs into digital pixel data; master control logic circuitry configured to generate at least one line of image data by time multiplexing the digital pixel data of each image captured by each of the plurality of active focal planes, wherein the control circuitry is further configured to insert codes between the digital pixel data that provide information for use in re-assembling the at least one line of image data back into the individual images captured by each active focal plane; and output interface circuitry configured to transmit pixel data via an output interface.