1. An image processing apparatus comprising: (a) an image memory comprising a plurality of memory elements each capable of being addressed and accessed independently of other memory elements, wherein pixel data in each area of a plurality of areas obtained by dividing an image into said plurality of areas are assigned an identical address, and corresponding pixel data at identical positions in said areas are assigned to an identical one of said memory elements; and (b) a processor unit comprising a plurality of processor elements corresponding to said memory elements for simultaneously processing data of a plurality of pixels in said image memory.