1. A system for displaying an enhanced output pixel pattern by improving the quality of an original pixel pattern, comprising: an input port for receiving said original pixel pattern; an input memory coupled to said input port for storing said original pixel pattern; a processing unit, containing a processor and a processor memory, coupled to said input memory for generating said enhanced output pixel pattern, wherein said processor memory contains a plurality of output pixel patterns, an output pixel pattern being indexed using a block of pixels, comprising one or more target pixels and their surrounding neighboring pixels, said output pixel pattern for replacing only said one or more target pixels in said block of pixels, said plurality of output pixel patterns being created for a plurality of possible pixel patterns in said block of pixels by: creating a high resolution bit map for substantially each possible pixel pattern in said plurality of possible pixel patterns by replicating each of said pixels in said block of pixels z times in a vertical direction and q times in a horizontal direction; smoothing said high resolution bit map; segmenting a middle portion of said high resolution bit map into a plurality of pixel areas; creating an output pattern of pixels comprising a plurality of output pixels, each of said output pixels being associated with one of said pixel areas, wherein each of said output pixels is determined by calculating a number of pixels of a first type in a pixel area and comparing said number to a threshold number, wherein said processor is programmed to: read said original pixel pattern as a plurality of blocks of pixels, each of said blocks being a portion of said original pixel pattern comprising one or more target pixels and their surrounding neighboring pixels, and determine, for each of said blocks, an output pixel pattern by indexing said processor memory with said pixel pattern in each of said blocks, said output pixel pattern for replacing only said one or more target pixels in each of said blocks; and a display device coupled to said processing unit to display said enhanced output pattern.