1. A method comprising: receiving an IC design layout for a target pattern given ideal processing conditions, wherein the target pattern includes a target feature having a target contour; modifying the target contour of the target feature to compensate for processing conditions that cause a fabricated pattern to vary from the target pattern; generating an optimized target pattern when the modified target contour of the target feature achieves functionality of the target pattern as defined by a constraint layer, wherein the constraint layer defines a portion of the target pattern that constrains the modified contour of the target feature; and fabricating a mask based on the optimized target pattern.