1. A method of determining a feature failure coefficient for an integrated circuit design feature, comprising: defining an integrated circuit design feature corresponding to a physical structure in an integrated circuit; identifying a plurality of logical units incorporating the feature; for each of the identified logical units, determining an amount of the feature occurring in the logical unit, and determining a failure rate of an integrated circuit portion corresponding to the logical unit; and correlating an amount of the feature with the failure rates to determine at least one feature failure function defined by a feature failure coefficient for the feature.