1. An imager comprising: an array of pixels arranged in rows; a control circuit for sequentially capturing first and second image frames from the array of pixels; and the control circuit for sequentially capturing first and second pairs of adjacent rows of pixels during first and second exposure times, respectively, when capturing the first image frame, and the control circuit for sequentially capturing first and second pairs of adjacent rows of pixels during second and first exposure times, respectively, when capturing the second image frame, wherein the first exposure times during the first and second frames are of similar duration, and the second exposure times during the first and second frames are of similar duration.