1. An imaging system comprising: a plurality of pixels configured to convert light into a charge, each pixel comprising: a photodiode, a transfer gate, a storage capacitor electrically connected in series with the photodiode via the transfer gate disposed between the photodiode and the storage capacitor, the storage capacitor having a capacitance for storage of an accumulated charge representing a plurality of charge dumps from the connected photodiode, each of the plurality of charge dumps comprising a charge representative of the light integrated in the connected photodiode, and a timing circuit electrically connected in series with the storage capacitor, the timing circuit configured to control the flow of charge from the storage capacitor to a floating diffusion node; one or more amplifier transistors configured to convert a charge from the plurality of pixels; one or more selection transistors configured to select a row or column of the plurality of pixels to be read out; one or more reset transistors configured to reset at least one of the plurality of pixels; a pixel array including the plurality of pixels arranged in one or more shared pixel architectures, the pixel array configured to independently control the transfer gate of each pixel to dump each of the plurality of charge dumps from the respective photodiode to the respective storage capacitor and independently control the timing circuit of each pixel so that charge dumps from each storage diode to the floating diffusion node occur one pixel at a time; a first silicon layer upon which the plurality of pixels are disposed; and a second silicon layer upon which at least one of the one or more amplifier transistors, selection transistors, and reset transistors are disposed.