1. A method of reducing complexity of a digital circuit comprising: providing circuitry for analysis comprising a plurality of cells; categorizing one or more of the plurality of cells as either a combinational cell or a state cell, wherein the plurality of cells comprise a plurality of combinational cells and a plurality of state cells; identifying a first combinational cell group among the plurality of combinational cells that each affect a same portion of the plurality of state cells; and replacing the first combinational cell group with a first cloud.