1. A memory system comprising: a memory controller coupled to one or more memory modules, at least one of the memory modules including a buffer; wherein the memory controller is configured to: convey a command to at least one of the memory modules in response to detecting that no memory requests addressed to the at least one of the memory modules have been received during a specified window of time; and change a duration of the specified window of time based on a comparison of a number of memory requests entering and exiting a memory request queue and number of times the buffer has entered a reduced power state during a given period of time; wherein in response to the command, the buffer of the at least one of the memory modules is configured to enter the reduced power state.