1. A method of designing a measurement target for a semiconductor device, the method comprising: obtaining a process window and design rules for the semiconductor device, wherein the semiconductor device comprises a structure to be measured that has a spectrum response that is comparable to or below system noise level for an optical critical dimension measurement device to be used to measure the structure; determining prospective pitches for an array of the semiconductor devices in the measurement target based on the process window and design rules by modeling the measurement of the structures in the array of semiconductor devices for different pitches of the array to identify pitches that produce a spectrum response from the structures that is at least 10 times greater than a system noise level for the optical critical dimension measurement device; determining a resonance window for each prospective pitch by modeling the measurement of the structures in the array of semiconductor devices for variations of the prospective pitches of the array to identify the variations for the prospective pitches of the array in which the spectrum response from the structures does not decrease by more than a first threshold; determining a robustness of the resonance window for each prospective pitch by modeling the measurement of the structures in the array of semiconductor devices for variations in design parameters of semiconductor device other than pitch to identify the variations in the design parameters of the array in which the spectrum response from the structures does not decrease by more than a second threshold; selecting one or more pitches for the array of semiconductor devices in the measurement target based on the prospective pitches, the resonance window for each prospective pitch, and the robustness of the resonance window for each prospective pitch; and producing and storing a target design for the array of semiconductor devices in the measurement target with the one or more pitches that are selected.