1. A method of producing a processed data structure representation from an image based source data structure of an IC layout with reduced occurrences of dummy features comprising the steps of: (a) examining a portion of the source data structure and selecting a dummy feature pattern to be used as a reference pattern in a computerized processing system; (b) selecting a cut-off correlation threshold value to be used in the computerized processing system; (c) computing, in the computerized processing system, correlation coefficients between feature patterns in the source data structure and the reference pattern to detect dummy features; and (d) removing the detected dummy features from the source data structure.