1. A method, comprising: providing a design layout; transferring the design layout onto a first semiconductor substrate using a mask; determining one or more scanning parameters including a scanning pixel size based on the design layout; generating an image contour including at least one closed curve from the first semiconductor substrate using the determined one or more scanning parameters including the scanning pixel size; and performing a defect inspection by comparing a first number of closed curves in a region of the image contour and a second number of polygons in a corresponding region of the design layout.