1. A semiconductor memory module which is provided with a plurality of dynamic semiconductor memories, and which generates internal control signals as a command to be applied to the plurality of individual dynamic semiconductor memories according to external control signals externally input to thereby execute the command, the semiconductor memory module comprising: mode determining means for determining whether or not the command is a refresh command in a refresh mode according to the internal control signals; and delay means for establishing a delay in applying the internal control signals to a partial number of dynamic semiconductor memories preliminarily selected among the plurality of dynamic semiconductor memories, whereby the refresh command is transferred to the plurality of dynamic semiconductor memories with a time difference according to the delay in the refresh mode.