1. An imager comprising: a pixel array comprising a plurality of pixels arranged in rows and columns, each pixel comprising a photosensor and selection circuitry for reading out a pixel signal from the pixel; and a circuit for operating said pixel array to control integration and read out of pixel signals from the pixels in said pixel array, said circuit being configured to: operate a first group of pixels in the array causing them to integrate an image signal for a first integration time; operate a second group of pixels in the array causing them to integrate an image signal for a second integration time, the first and second groups of pixels each comprising pixels in a plurality of interleaving columns of the pixel array; and read out signals from said first and second groups of pixels as first and second interleaved images, wherein the step of reading out the first and second interleaved images comprises outputting the images as a single image and using a processor to separate the first interleaved image from the second.