1. A memory subsystem comprising memory devices which may be placed in a standby mode or in a low power mode in which greater access time is required, the subsystem comprising: means for placing the memory devices in the low power mode; means for selectively accessing discrete blocks of memory which are in either the standby mode or the low power mode; means for delaying access to a block of memory which is in the low power mode; and means for retaining an accessed block of memory in the standby mode and for preventing delay of subsequent access to the retained block of memory.