1. Image processing circuitry that produces an output data frame during a frame time interval, comprising: control circuitry coupled to an image sensor, wherein the image sensor comprises a plurality of pixels arranged in rows and columns, wherein the control circuitry is configured to output a first set of data during a first portion of the frame time interval and a second set of data during a second portion of the frame time interval that is subsequent to the first portion; a plurality of image processing blocks that are configured to process the first and second sets of row data output by the control circuitry; and a test pattern generator that is configured to output test patterns to the plurality of image processing blocks during the second portion of the frame time interval.