1. A digital image signal processing apparatus comprising: a plurality of line memories; a line memory control unit that controls input image data corresponding to an input image to be input to each of the plurality of line memories, and controls the input image data to be output from the plurality of line memories; a data patch generating unit that sequentially accesses the input image data stored in each of the plurality of line memories, and generates a data patch for noise reduction filtering; and a filtering unit that performs the noise reduction filtering on the data patch, and generates output image data, wherein the line memory control unit generates a second vertical signal and a second horizontal signal obtained by respectively extending a first vertical signal and a first horizontal signal that correspond to the input image, and controls input and output of the plurality of line memories according to the second vertical signal and the second horizontal signal, and wherein the line memory control unit further comprises: a vertical signal extending unit that generates the second vertical signal by extending each of a start and an end of the first vertical signal by (N−1)/2 according to a (N×N) filter for the noise reduction filtering; and a horizontal signal extending unit that generates the second horizontal signal by extending each of a start and an end of the first horizontal signal by (N−1)/2 according to the (N×N) filter.