1. A method for placing probing pads suitable for placing at least one probing pad in an integrated circuit (IC), wherein, the probing pad is used to electrically conduct a probing point to a top metal layer, the IC comprising at least one interesting pin, and the method comprises: a. building a cross-reference database between a netlist and a layout; b. determining grid spacing based on the layout characteristic and generating a plurality of grids with fixed grid spacing; c. defining the preformed grids located on the net connecting to the interesting pin as the first candidate probing points based on the cross-reference database; d. selecting one first candidate probing point among the first candidate points on each net where the probing pad can be placed on based on the metal layer where the first candidate probing points are located and the corresponding locations between the first candidate probing points and the interesting pin; and e. placing the probing pad on the probing point of each net.