1. An image signal processing system for an integrated sensor processor, comprising: a focal plane array for generating continuous source image frames in real time, said focal plane array divided logically into blocks of pixels; an analog to digital converter (ADC) layer having an array of ADC elements for converting the source image frames into a digital data; a digital processor layer having an array of processing elements for processing the digital data; and an interconnecting layer for connecting each one of said ADC elements, said digital processing elements substantially vertically to the focal plane and substantially parallel to one another.