1. A method of validating design of complex integrated circuits (IC) where a design process is carried out under electronic design automation (EDA) environment, comprising the following steps of: building prototype silicon based on IC design data produced under the EDA environment; applying event based test vectors derived from the IC design data to the prototype silicon by an event based test system and evaluating the response output of the prototype silicon; modifying the event based test vectors by the event test system to acquire desired response outputs from the silicon prototype; and feedbacking the modified event based test vectors to the EDA environment to modify the IC design data, thereby correcting design errors in the IC design data.