1. A method, in a data processing system, for determining a worst case current waveform for testing an integrated circuit device, comprising: generating a worst case power workload for the integrated circuit device; simulating the worst case power workload on a primitive level model of the integrated circuit device to generate a worst case current waveform; simulating the worst case current waveform on an electrical model of the integrated circuit device to generate a worst case noise value; measuring actual noise of the integrated circuit device running the worst case power workload; comparing the actual noise to the worst case noise value; and selecting, based on results of the comparison, the worst case current waveform for use in testing integrated circuit devices if the actual noise is within a tolerance of the worst case noise value.