1. A system for testing a high-speed circuit having a first frequency of greater than one GHz, the high-speed circuit being a high-speed phase and clock recovery circuit, the system comprising: a tester for providing at least one signal to the high-speed circuit, the tester having a second frequency of not greater than one GHz, the tester being external to the high-speed circuit; at least one computer system, coupled with the tester, for obtaining a high-speed statistical signature of the high-speed circuit using the tester by oversampling an output of the high-speed circuit and for comparing the high-speed statistical signature of the high-speed circuit to an expected signature.