1. In a system employing a CPU and a memory subsystem, a method for performing adaptive power management of said memory subsystem, said method comprising: determining if said CPU is idle by generating a CPU throttle control signal and controlling the throttling of said CPU with said CPU throttle control signal; determining if any bus master initiated memory access break events have occurred; determining if there are any pending read accesses or write accesses to said memory subsystem; and closing certain memory banks and powering down certain portions of said memory subsystem based on said determinings.