1. A method of forming a stacked memory module, comprising: providing a plurality of memory devices to include a logic block for decoding a plurality of chip select signals; stacking the plurality of memory devices; interconnecting a plurality of pins between the plurality of memory devices, including a chip select pin and a first unused pin of each of the plurality of memory devices; and updating a serial presence detect device to indicate the stacked memory module includes the plurality of memory devices and each of the plurality of chip select signals is transmitted to a corresponding one of a plurality of designated pins on the plurality of memory devices.