1. A method of correcting for a failed memory cell in a DRAM integrated circuit, the method comprising: (a) determining an address of the failed memory cell; (b) setting at least one soft fuse associated with the DRAM integrated circuit to record the address of the failed memory cell; and (c) associating at least one redundant memory cell with the at least one set soft fuse, wherein the at least one redundant memory cell substitutes for the failed memory cell when the DRAM integrated circuit matches the address.