1. A method, comprising: replicating, using a computer, routing of a first subset of transistors of a first base cell to determine a layout of a first portion of a target cell; adjusting a layout of a net segment included in routing of a second subset of transistors of the first base cell to determine a layout of a second portion of the target cell; and in response to determining that replicating the routing of the second subset of transistors will not result in a second net segment of the second subset of transistors being obstructed, replicating placement of the second net segment.