1. A method comprising: generating a three-dimensional table, wherein table cells of the three-dimensional table comprise normalized parasitic capacitance values selected from a group consisting essentially of normalized poly-to-fin parasitic capacitance values and normalized poly-to-metal-contact parasitic capacitance values of Fin Field-Effect Transistors (FinFETs), and wherein the three-dimensional table is indexed by: poly-to-metal-contact spacings of the FinFETs; fin-to-fin spacings of the FinFETs; and metal-contact-to-second-poly spacings of the FinFETs, wherein the step of generating the three-dimensional table is performed using a computer.