1. A method of inspecting a subject integrated circuit, the method comprising the sequential steps of: analyzing a set of historical integrated circuits to detect defects and produce historical data, designating features of the historical integrated circuits that have an occurrence of defects that is greater than a given limit as high risk features, based on the historical data, identifying locations of the high risk features on the subject integrated circuit, inputting the locations of the high risk features into an inspection tool, and inspecting the locations of the high risk features on the integrated circuit by inspecting an area of a given minimum size that includes the high risk feature to at least one of detect defects and measure critical dimensions, and produce subject data.