1. A method comprising: determining two or more parameters associated with designing a semiconductor device; determining two or more layers associated with designing the semiconductor device; determining a process window associated with acceptable limits of the two or more parameters; correlating distributions of the two or more parameters between the two or more layers; and applying, by a processor, a probability density function and the correlated distribution of the two or more parameters to the process window to generate a yield metric that relates the two or more parameters to yield.