1. An electronic test system for testing an electronic device under test (DUT), said test system comprising: an electronic processor; an electronic memory coupled to said electronic processor; a hierarchical program structure residing in said memory and executed by said processor, said hierarchical program structure having multiple levels including a measurement level corresponding to a measurement to be performed on said DUT, a test level corresponding to one or more of said measurements, and a procedure level corresponding to an ordered list of said tests to be performed on said DUT.