1. A method comprising: identifying a target sigma level for a semiconductor device; determining a metric distribution corresponding to each of a plurality of metrics for the semiconductor device; transforming the metric distributions into respective input distributions having a common distribution type; calculating a correlation value for each input distribution; calculating a joint probability distribution as a function of the input distributions and their respective correlation values, such that the joint probability distribution has a joint probability corner at the target sigma level; calculating, for each input distribution, an output distribution manifesting an output metric corner scaled as a function of the joint probability distribution and the respective correlation value of the input distribution; and analyzing the semiconductor device, using a computer-implemented circuit analyzer, according to the output metric corners of the output distributions.