1. A method for wafer inspection, comprising: scanning a wafer with an inspection system thereby generating image patches in inspection image frames for the wafer, wherein the scanning step is performed with an optical subsystem of the inspection system; aligning each of the image patches in each of the inspection image frames to design information for the wafer; detecting defects in the image patches; deriving multiple layer design attributes at locations of the defects from the image patches corresponding to the locations of the defects; building a decision tree with the multiple layer design attributes, wherein the decision tree is used to separate the defects into bins with different yield impacts on a device being formed on the wafer; and binning the defects with the decision tree, wherein the aligning, detecting, deriving, building, and binning steps are performed with one or more computer subsystems of the inspection system.