1. A read only memory device, comprising: a P-type substrate having an N well therein; a plurality of essentially parallel P-pole regions located on the N well, said P-pole regions extending in a first direction, and being separated from each other by a space, said P-pole regions forming bit lines; a plurality of P-type diffusion regions located in the N well, each underlying a respective selected P-pole region so that each respective selected P-pole region is isolated from the N well to prevent current leakage; a plurality of N-type diffusion regions, each being located within each one of the respective selected P-pole regions so that each N-type diffusion region is surrounded by each respective one of the selected P-pole region, each respective N-type diffusion region and each respective selected P-pole region together forming a diode; and a plurality of essentially parallel word lines extending in a second direction, each of said word lines being coupled to each respective N-type diffusion regions.