1. A method of reducing proximity effects in a lithographic process wherein an integrated circuitry pattern is transferred from a mask onto a semiconductor substrate, the method comprising: defining a desired spacing between a main feature which is to reside on the mask and which is to be transferred onto the substrate and a pair of adjacent proximity effects-correcting features disposed on opposing sides of the main feature; and after said defining, adjusting dimensions of the main feature relative to the pair of proximity effects-correcting features to achieve a desired transferred main feature dimension.