1. A method of reducing variation of a parameter of a circuit design comprising: providing the circuit design; identifying a field of interest and a parameter of interest for the circuit design; dividing the field of interest into a plurality of tiles; determining initial values of the parameter of interest for the field of interest and for each tile of the plurality of tiles; determining a variation of the parameter of interest; adjusting the parameter of interest; comparing the variation of the adjusted parameter of interest to an exit condition; storing the design in response to the variation satisfying the exit condition; and in response to the exit condition not being met, setting the adjusted values to the initial values, and repeating the steps of calculating, adjusting, and comparing until the exit condition is satisfied.