
Example 1 does not properly show any voltage source as Vref - it can come from ADVREF or VDD_MAIN
Example 2 has a potential divider (R307 and R306) forming a voltage that is buffered by the OP-AMP. This uses a voltage reference chip (a 4.096 shunt regulator) across the potential divider to keep things fairly stable if the power rail (VCC_P5V0) moves around.
Example 3 uses a 3V reference (or 3.3V aka VCC33) directly connectable to the VREF pin.


Example 1 should be ignored and you should concentrate on 2 and 3.

Example 3 is the most stable when linked to the voltage reference. Example 2 will be less stable because it uses a potential divider and an op-amp and these add errors to the voltage produced from the reference.


  In ex.3, if I apply a 3.3v to LM4040 with a 2.2k Resistor, I'll still
  have 3.0v?


This is because it is a shunt regulator i.e. it works like a zener diode (read the device data sheet)

AdvRef pin setup
In an inspection report on my house, the inspector said "hot and neutral" are not separated. I think he meant "neutral and ground" are not separated. I've attached the picture, is that the case? 
