In the optimization of the consistency check for the CPU, we encounter the same difficulty as in the implementation of the approximated consistency check for the GPU, namely that the required data from the aggregated cost volume does not lie physically next to each other (cf. fig:implconsistencyprobl).
This makes it inefficient to load the data into vector-registers first and then process it with NEON intrinsics. There are two ways to solve this problem: The first possibility, which is proposed by [1]}, is to first transform the aggregated cost volume \(\bar{\mathcal {S}}\)  into a temporary volume in such a way that the data which is required to compute the approximated disparity map \(D^{\mathrm {R}}\)  will physically lie next to each other in memory. Afterwards, the vector-registers can be filled with the data and the approximated disparity map \(D^\mathrm {R}\) , corresponding to the matching image, can be calculated efficiently with *SIMD instructions. The second option, which we chose, is to refrain from using *SIMD instructions for the consistency check. In our implementation of the consistency check, we only use a thread-level parallelization in which each thread is processing a different part of the cost volume. This saves us the need to rearrange the cost volume necessary to use *SIMD instructions.
