In order to study the impact of parallelizing pLUTo operations on performance, we examine the maximum internal data bandwidth that can be achieved with pLUTo when using the most commonly-used commodity DRAM technologies (DDR3/4/5) and several widely-used high-bandwidth memories (GDDR6, HMC2, HBM3). The theoretical maximum bandwidth for each of these technologies is dictated by their timing parameters and plotted in Figure REF . As DRAM timing parameters are largely limited by power constraints, the maximum bandwidth is fixed for each of these DRAM standards. However, since pLUTo takes advantage of several mechanisms that take exploit parallelism at the granularity of subarrays (typically 512 rows), pLUTo's bandwidth improves with increasing DRAM capacity.
pLUTo's theoretical maximum bandwidth is calculated under the assumption that every subarray can be operated on in parallel, and therefore that the internal maximal memory bandwidth increases linearly with DRAM capacity (number of subarrays). For a 16GB DRAM, this bandwidth is 508 GB/s, 1017 GB/s and 2027 GB/s, for DDR4-based pLUTo-GSA, pLUTo-BSA and pLUTo-GMC, respectively.
On the upper end, a 64GB DRAM would achieve a bandwidth greater than 10TB/s with pLUTo-GMC.
This contrasts with the available bandwidth in conventional systems, which is typically around \(20-60\)  GB/s for DDR3/4/5 memories, and around \(400-600\)  GB/s for high-bandwidth memories [1]}, [2]}, [3]}, [4]}, [5]}, [6]}, [7]}.
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