(i) Embedded Patches: In a similar way to the Vision Transformer (ViT) architecture [1]}, the input segment \(\mathbf {X}_{i}\)  is divided into \(N\)  non-overlapping patches. Here, \(N= L/ P\) , where \(P\)  shows the size of each patch. This patching mechanism helps reduce memory and computation requirements. As shown in Fig. REF , the sequence of linear projections of these patches are fed as input to the \(\text{TC-HGR}\)  architecture. More specifically, each patch is first flattened and then is mapped into the model dimension \(D\)  with a trainable linear projection. The output of this projection is called the “Embedded Patches”.
