If the computational device is capable of executing independent threads in parallel, it may be advantageous to distribute computation across multiple threads to further reduce latency.
For example, a possible parallelization strategy for standard MAMPC is as follows: 1) compute the three control modes of MAMPC in three parallel threads, 2) among those that pass their corresponding switch conditions, execute whichever that finishes first, and 3) reset threads for next control step and repeat.
This way, the worst-case running time will be roughly identical to that of the original MPC.
As a result, the parallelized MAMPC scheme is at worst equivalent to the hybrid strategy in [1]}.
