The analog canceller at node \(k\)  consists of \(N\)  taps with each tap connected via a \(N_k^{\mathrm {(RF)}}\) -to-1 MUltipleXer (MUX) to all \(N_k^{\mathrm {(RF)}}\)  outputs of the respective TX RF chains. A tap includes a fixed delay, a variable phase shifter, and a variable attenuator [1]}, [2]}. To route the cancellation signal to one of the adders located just before the RX RF chains, the output of each tap is connected to a 1-to-\(M_k^{\mathrm {(RF)}}\)  DEMUltipleXer (DEMUX). There is a total of \(NM_k^{\mathrm {(RF)}}\)  such adders and we use the notation “Adder (\(i,j\) )” to label the adder that connects DEMUX \(j\)  to RX RF chain \(i\) , where \(i=1,2,\ldots ,M_k^{\mathrm {(RF)}}\)  and \(j=1,2,\ldots ,N\) . The adders before the RX RF chains can be implemented via power combiners or directional couplers, while the analog RF MUXs/DEMUXs can be implemented with RF switches. Clearly, the proposed analog canceller interconnects the outputs of some of the available TX RF chains to the inputs of some of the RX RF chains, and in contrast to [2]}, the size of each MUX/DEMUX depends on the number of TX/RF RF chains and not on the number of TX/RX antennas. Similar to [2]}, we model in BB the analog processing realized by the analog canceller as \(k\triangleq \mathbf {L}_3\mathbf {L}_2\mathbf {L}_1\in \mbox{$\mathbb {C}$}^{M_k^{\mathrm {(RF)}}\times N_k^{\mathrm {(RF)}}}\) , where \(\mathbf {L}_1\in \mbox{$\mathbb {R}$}^{N \times N_k^{\mathrm {(RF)}}}\) , \(\mathbf {L}_2\in \mbox{$\mathbb {C}$}^{N\times N}\) , and \(\mathbf {L}_3\in \mbox{$\mathbb {R}$}^{M_k^{\mathrm {(RF)}}\times N}\) . The elements \([\mathbf {L}_1]_{j,\ell }\)  and \([\mathbf {L}_3]_{i,j}\)  with \(j=1,2,\ldots ,N\) , \(\ell =1,2,\ldots ,N_k^{\mathrm {(RF)}}\) , and \(i=1,2,\ldots ,M_k^{\mathrm {(RF)}}\)  take the binary values 0 or 1, and it must hold that
\(\sum _{\ell =1}^{N_k^{\mathrm {(RF)}}}[\mathbf {L}_1]_{j,\ell } = \sum _{i=1}^{M_k^{\mathrm {(RF)}}}[\mathbf {L}_3]_{i,j} = 1 \,\,\,\forall j=1,2,\ldots ,N.\) 
