In this paper, we focus on PCM for AIMC, which is arguably the most mature technology among the class of resistance-based or memristive memory devices (Fig. REF (a)). PCM devices have the potential to scale to nanoscale dimensions and can be integrated in the back-end of a CMOS chip [1]}. PCM-based implementations hence offer high performance densities (TOp/s/mm\(^2\) ), where a pair of PCM devices can represent signed multi-bit weights [2]}.
