Sometimes it cannot compete with dedicated FPGA accelerators, as with a sorter that achieves up to 49x speedup on the same platform [1]}. This gap is expected and relates to the presence of instructions in general, such as by trying to avoid internal states. As sorting is not a purely streaming task, many accelerators try to “internalise" processing to reduce the number of times the data is read, but not on CPUs [2]}.
