Load-balancing problem of FPGA-based designs has been studied extensively.
Ramanathan et al. [1]} studied HLS-based work-stealing with K-means algorithm as a case study, and the OpenCL atomic operation is used for synchronization among PEs.
Later, Yan et al. [2]} improved their performance by replacing the work-stealing with a round-robin work distributor.
Geng et al. [3]} proposed an HDL-based runtime workload balancing method for graph convolutional networks.
Those studies mainly focus on the problems where the computation is the key performance bottleneck. In contrast, data-intensive applications involve only lightweight computation and require multiple workloads dispatched in one cycle.
Likewise, software-based flexible skew handling methods for stream processing [4]} are too heavy to fit into cycle-level requirements.
