Consider a locking bit thread configuration that can lock three regions \(A\) , \(B\) , and \(C\)  (which are three RT extremal surfaces) simultaneously, as shown in figure REF (a). Denote the numbers of threads connecting \(AB\) , \(AC\) , and \(BC\)  in the configuration as \({F_{AB}}\) , \({F_{AC}}\) , and \({F_{BC}}\)  respectively, which are exactly half of the mutual information \({I_{AB}}\) , \({I_{AC}}\) , and \({I_{BC}}\)  [1]}. The thread/state correspondence prescription is as follows:
