1. Field of the Invention
The present invention relates generally to packaging of electronic devices in the form of semiconductor dice. More particularly, the present invention relates to embodiments of an interposer for mounting a semiconductor die, wherein the interposer includes flexible solder pad elements configured for attachment to a carrier substrate or to the semiconductor die. The present invention further relates to materials and methods for forming the interposer.
2. State of the Art
An electronic device in the form of a semiconductor die or chip is conventionally manufactured of materials such as silicon, germanium, or gallium arsenide. Circuitry is formed on an active surface of the semiconductor die and may include further levels of circuitry within the die itself. Due to the materials used and the intricate nature of construction, semiconductor dice are highly susceptible to physical damage or contamination from environmental conditions including, for example, moisture. In order to protect a semiconductor die from environmental conditions, it is commonly enclosed within a package that provides hermetic sealing and prevents environmental elements from physically contacting the semiconductor die.
In recent years, the demand for more compact electronic devices has increased, and this trend has led to the development of so called “chip-scale packages” (CSPs). One exemplary CSP design is typified by mounting a semiconductor die to a substrate, termed an interposer, having substantially the same dimensions as the semiconductor die. Bond pads of the semiconductor die are electrically connected to bond pads on a first surface of the interposer, and the semiconductor die is encased within an encapsulant material. Conductive pathways, which may comprise a combination of traces and vias, extend from the interposer bond pads to a second, opposing side of the interposer where they terminate in external electrodes to which further electrical connections are made. Typically, a CSP is then mounted to a carrier substrate, such as a circuit board having a number of other electronic devices attached thereto.
Electrically connecting the bond pads of a semiconductor die to the bond pads of a CSP interposer generally involves using one of two types of interconnection methods, depending on the manner in which the semiconductor die is mounted. As shown by FIG. 1, a CSP 2 is configured with the first interconnection method by mounting a semiconductor die 4 to an interposer 6 with die bond pads 8 in a face-up orientation, and electrically connecting die bonds pads 8 to interposer bond pads 10 with bond wires 12. As shown by FIG. 2, CSP 2′ is configured with the second interconnection method by mounting semiconductor die 4 with die bond pads 8 in a face-down or flip-chip orientation, and electrically connecting die bond pads 8 directly to interposer bond pads 10 with conductive elements, such as bumps 14, formed of solder or a conductive adhesive material. Once the interconnection method used for CSP 2 or CSP 2′ is complete, semiconductor die 4 is encased within an encapsulant material 15 such as a polymer-based molding compound.
Further, FIGS. 1 and 2 show there are generally two types of external electrode structures used for mounting CSPs to a carrier substrate 16. CSP 2 of FIG. 1 is configured as a land grid array (LGA) type package, wherein the external electrodes comprise solder pads 18 that are intended to be directly attached to corresponding solder pads 20 on a carrier substrate 16. In FIG. 2, CSP 2′ is configured as a ball grid array (BGA) type package, wherein the external electrodes comprise solder ball pads 22 having solder balls 24 formed thereon, such that solder balls 24 will be attached to the solder pads 20 on carrier substrate 16.
Although CSPs of the type described above have provided a compact and economical approach to packaging of semiconductor dice, they still present certain disadvantages, especially in terms of the LGA or BGA electrode structures used for mounting CSPs to a carrier substrate.
During the operation of an electronic device configured as a CSP, for example, the functioning of the circuits within the semiconductor die and resistance in the circuit connections of the semiconductor die, interposer, and carrier substrate generate heat. This heating results in the expansion and contraction of all of these components as temperatures rise and fall. Because the semiconductor die, interposer, and carrier substrate are made of different materials exhibiting different coefficients of thermal expansion (CTE), they expand and contract at different rates during thermal cycling. This mismatch in thermal expansion rates places stress on the electrode structures joining the CSP interposer to the carrier substrate, and may eventually cause cracks in the electrode structures leading to the failure of electrical connections.
This thermal stress may be especially problematic with a CSP configured as an LGA type package as in FIG. 1, because the stress is concentrated within the relatively small thickness H of the solder pads 18 between interposer 6 and carrier substrate 16. With a CSP configured as a BGA type package as in FIG. 2, the thermal stress may be more effectively absorbed by being spread across the increased thickness H′ provided by the solder balls 24. However, because modem circuitry layouts tend to require increasing numbers of I/Os, the external electrodes on a CSP must be very densely spaced, and there are physical limits to the minimum spacing that may be attained when forming solder balls 24. The conventional process of printing and reflowing solder paste on solder ball pads 22 to form solder balls 24, for example, requires that solder ball pads 22 must be spaced at a pitch of about 0.4 mm to ensure reliable formation without bridging. Furthermore, high I/O CSPs require the use of smaller diameter solder balls that may not provide a thickness H′ sufficient to overcome thermal induced stress failures. Forming a CSP as a BGA type package also includes the additional processing required to form solder balls 24, which is undesirable in terms of mass-scale production.
Another problem associated with prior art package interposers is that the LGA or BGA type external electrode structures are typically formed entirely of metal or metal alloys and are, therefore, rigid. In many cases, one or both of the interposer and the carrier substrate to which it is to be mounted may have uneven surfaces or may become warped by thermal stresses during attachment of a CSP by solder reflow. When this occurs, the space between the interposer and the carrier substrate may vary, and the rigid construction of LGA or BGA type external electrodes in contact with the carrier substrate at narrower spaces may prevent contact by external electrodes at wider spaces.
In view of the foregoing, what is needed is an interposer for a semiconductor die package such as a CSP that is simple and inexpensive to produce and overcomes the problems associated with the prior art external electrode structures used to mount the interposer to a carrier substrate.