1. Field of the Invention
The invention relates to a power amplifier, and in particular to a power amplifier circuit and method thereof.
2. Description of the Related Art
Spectrum usage in technology and telecommunication industries is typically governed by a spectrum regulator such as the Federal Communications Commission (FCC) for transmission power over a particular spectrum to manage interference and spectrum shortage.
In practice, a sharp change in signal envelope amplitude usually exerts frequency components outside the regulated power spectrum. This phenomenon is known as “spectral spatter”, referring to the frequency “spattering” beyond its intended spectrum boundaries. Spectral spatter is usually not desirable, since it not only produces undesirable interference on adjacent spectra, but also is energy inefficient.
Various efforts have been made to reduce the spectral spatter, such as applying a filter to remove excess frequency components. However, a filter may not effectively remove undesired frequency components, and attenuates the magnitude of spectrum in use. Another attempt focuses on power amplifier circuit with ramp control. This approach retards the amplitude variation of signal envelope. Whenever the ramp circuit experiences an abrupt change at its input, it delivers a gradually inclining signal transition to the power amplifier. Consequently the power amplifier follows the inclining signal transition to output a progressive slanted signal envelope, whereby the excess frequency components are suppressed.
FIG. 1 is a block diagram of a conventional power amplifier circuit with ramp control, comprising operational amplifier (OA) 10, MOS 12, and power amplifier (PA) 14. The output of OA 10 is coupled to the gate of MOS 12, the inverting input of OA 10 is coupled to the drain of MOS 12 and a supply power input of PA 14.
When the conventional power amplifier circuit is required to amplify input signal Sin1 to output signal Sout1, the non-inverting input of OA 10 receives enable signal Sen1 from logic “low” to logic “high”, such that the output of OA 10 generates a bias voltage to turn MOS 12 on, rendering the supply voltage at the supply voltage input of PA 14. The supply voltage is also fedback to the inverting input of OA 10, so that as the voltage difference between the inverting and non-inverting inputs of OA 10 decreases, the bias voltage decreases accordingly, leading to a ramp voltage to the supply voltage input of PA 14. Consequently PA 14 amplifies input signal Sin1 by a variable gain corresponding to the ramp voltage from the supply voltage input, and generates output voltage Sout1 with a ramp envelop.
Although the conventional power amplifier circuit provides ramp control capability, it also presents inherent circuit deficiency. Firstly, PA 10 in the conventional power amplifier circuit increases circuit complexity. Secondly, power consumption in MOS 12 causes ineffective power utilization. Thirdly, the supply voltage to PA 14 cannot complete a full VCC swing since there is a finite voltage drop across MOS 12. Finally, the device size of MOS 12 has to be large to withstand a large driving current, consuming more circuit area and increasing manufacturing cost.
In addition, the power amplifier circuit is also required to control the initialization of the ramp bias signal. If the input signal arrives at the power amplifier after the ramp bias signal reaches a maximal or minimal value the spectral spatter can still be present in the output signal. As a result a programmable delay can be incorporated into the power amplifier circuit such that the ramp bias signal is synchronous with the input signal.
Thus it is desirable to have a power amplifier circuit capable of ramp control and programmable delay control.