1. Technical Field
The present invention relates to a semiconductor device and method for manufacturing the semiconductor device.
2. Related Art
A typical conventional process for forming a generally-used base layer in a hetero bipolar transistor is illustrated in FIGS. 11A to 11C and FIG. 12. The following description will be made in reference to selectively growing crystal of SiGe for forming the base layer. A silicon oxide film 14, a p-type polycrystalline silicon film 16 and a silicon nitride film are formed on a substrate 10, which is provided with an n-type collector layer 12, and a concave portion is provided in the silicon nitride film and the p-type polycrystalline silicon film 16. Further, the side wall of the concave portion is covered with a silicon nitride film to form a silicon nitride film 18. Then, a portion of the silicon oxide film 14 exposed over the bottom of the concave portion is etched, and further, a side etching in the transverse direction is conducted to provide an opening in the silicon oxide film 14 (FIG. 11A).
Next, a contamination in the surface is removed within hydrogen atmosphere at higher temperature, and then the base layer is formed in the bottom of the opening of the concave portion via a chemical vapor deposition (CVD) process. Available chemical compounds for a source gas for such CVD process includes hydrogen (H2), dichlorosilane (SiH2Cl2), germane (GeH4), diborane (B2H6), methylsilane (SiH3CH3) and the like. As shown in FIG. 11B, undoped SiGe is grown on the n-type collector layer 12 via an epitaxial process to form an SiGe monocrystalline layer 20. In such case, SiGe is grown on the exposed portion of the p-type polycrystalline silicon film 16 formed in the upper portion of the opening and exposed in the lower surface of a visor section of the p-type polycrystalline silicon film 16 including silicon nitride film 18 to form the SiGe polycrystalline layer 30.
Further, a p-type SiGe monocrystalline layer 22 doped with p-type impurity is formed, and SiGe is further deposited on the SiGe polycrystalline layer 30 to form a p-type SiGe polycrystalline layer 32 (FIG. 11C).
Subsequently, undoped SiGe monocrystalline layer 24 having an altered germanium ratio of SiGe and an undoped silicon layer 26 are respectively grown on the SiGe monocrystalline layer 22 to form a monocrystalline growth layer. In such case, an undoped SiGe polycrystalline layer 33 and an undoped silicon polycrystalline layer 34 are also deposited on the p-type SiGe polycrystalline layer 32 to form a polycrystalline layer, so that the polycrystalline layer is in con-tact with the monocrystalline layer and the polycrystalline layer also provides electrical coupling between the p-type polycrystalline silicon film 16 serving as the base drawing electrode and the base layer (FIG. 12).
Typical bipolar transistors having a base layer formed in the interior of an opening provided in the insulating layer are described in, for example, Japanese Patent Application Publication No. 2004-193454 and Japanese Patent Application Publication No. 2003-188177. Other related art documents includes Japanese Patent Application Publication No. 2003-45885 and Japanese Patent Application Publication No. 2005-57171.
Nevertheless, as shown in FIG. 12, a polycrystalline layer downwardly growing from the p-type polycrystalline silicon film 16 extends toward the transverse direction after being contacted with the monocrystalline layer, eventually being in direct contact with the portion of the silicon nitride film 18 exposed in the lower surface of the visor section. Larger dimensional area of such contact causes a larger stress generated due to a difference in thermal expansion coefficient between the silicon nitride film and the polycrystalline layer, leading to a creation of recombination energy level in vicinity of the emitter-base junction, so that a stable current gain is difficult to be obtained.