present invention relates to a micropin array and the method of producing the same, and more specifically relates to a set of I/O pins for use as an external connector of a PGA package etc. and the method of producing the same.
Conventionally, in the PGA package of an IC device, there are utilized I/O pins in the form of a set of micropins which are separately and independently fixed to an LSI chip. Such micropins are produced such that a lead wire material is treated by mechanical working such as stamping with header processing to form individual micropins. Namely, the micropins are produced in manner similar to the production method of the typical I/O pins attached to the typical PGA package. There may be other methods such as utilizing photolithographic technology to form chemically the micropins. These methods of producing micropins are disclosed, for example, in Japanese Patent Publication Nos. 62-24916, 62-32591, 62-32592 and 63-28515.
In use of the conventional micropins for electrical connection to an LSI chip, the micropins are individually fixed to the LSI chap in a given alignment pitch, thereby disadvantageously requiring a highly accurate alignment tool. Further, since the micropins are connected to the LSI chip one by one, micropins are easily curved or folded to thereby disadvantageously degrade the mechanical strength of an assembly.
In the conventional method of producing micropins according to the mechanical working, there is practical limitation in diameter and length dimension of micropins due to dimensional error in the header processing. Therefore, it is practically difficult to produce a pin having a diameter less than 0.1 mm.
On the other hand, a fine pin having a diameter less than 0.1 mm can be formed by the photolithographic technology. However, the aspect ratio thereof, i.e., pin length/pin diameter ratio cannot be increased by this method.