1. Technical Field
The present disclosure relates to an operational amplifier and, more particularly, to a low-voltage operational amplifier and an operational amplifying method.
2. Discussion of Related Art
As techniques in a semiconductor manufacturing process are improved, the width between the semiconductor circuit lines is gradually decreased. Because the width between the semiconductor circuit lines becomes narrower, an integration degree of the semiconductor is improved and a production cost of the semiconductor is reduced. In addition, as the width between the semiconductor circuit lines gradually becomes narrower, a power-supply voltage that is applied to the semiconductor gradually becomes lower. For example, a semiconductor that has a 90 nm width between the semiconductor circuit lines generally needs a power-supply voltage that is not more than 1.2V. On the other hand, a semiconductor that has a 90 nm width between the semiconductor circuit lines occasionally needs a power-supply voltage that is not more than 1.0V. Therefore, a circuit that operates properly at a high power-supply voltage may not operate properly at a low power-supply voltage. Accordingly, a circuit that has a new structure is needed.
FIG. 1 is a diagram illustrating a conventional operational amplifier that has a folded cascode structure.
The conventional operational amplifier usually includes a multi-stage structure in order to achieve a high gain. The conventional operation amplifier shown in FIG. 1 includes two stages 10 and 20 that each have a folded cascode structure.
The conventional operational amplifier of FIG. 1 achieves the high gain owing to the cascade connected stage. There are two cascade connected stages in each stage 10 and 20, and one such cascade stage 30 has four MOS transistors connected in series between a power-supply voltage VDD and a ground voltage VSS. A second cascade connected stage of four MOS transistors is in the first stage 10 and bias voltages BS1, BS2, and BS3 are fed to respective gates of corresponding transistors and a common mode feedback signal is connected to the gates of corresponding transistors whose drains are connected to the ground voltage VSS. The input signals IN+ and IN− are fed to an input pair of transistors that have their drains connected to a current source transistor that receives at its gate a bias voltage BS4. Outputs of the first stage 10 are fed to a pair of input transistors whose drains are commonly connected to a current source transistor whose gate receives the bias voltage BS4 and whose drain is connected to the ground voltage VSS. The second stage 20 employs the same structure as the first stage 10 with corresponding transistors receiving the bias voltages BS1, BS2, and BS3 and the common mode feedback signal CMFB. Outputs 40 the second stage 20 are at the same location as the outputs of the first stage 10, with the outputs OUT+ and OUT− of the first stage being coupled with respective capacitors. As is known, a common mode feedback signal decides a common mode voltage of an amplified first signal and an amplified second signal. Thus, the conventional operational amplifier of FIG. 1 does not efficiently obtain a large dynamic voltage margin at a relatively low power-supply voltage. In addition, a swing margin at the output terminal 40 of the second cascade stage 20 is limited at a low power-supply voltage.
FIG. 2 is a diagram illustrating another conventional operational amplifier.
The conventional operational amplifier of FIG. 2 has a structure where a folded cascode stage 110 is connected to a common source stage 120. Therefore, the conventional operational amplifier of FIG. 2 can obtain a larger swing margin at an output terminal than the conventional operational amplifier of FIG. 1. In a folded cascode stage 110, four MOS transistors 130 are connected in series between a power-supply voltage VDD and a ground voltage VSS, as in FIG. 1. A second set of four MOS transistors are provided in the first stage 110 and respective gates of corresponding transistors receive bias voltages BS1, BS2, and BS3, as well as the common mode feedback signal CMFB. The input signals IN+ and IN− are fed to a transistor pair whose common drains are connected to a current source transistor that receives at a gate thereof a bias voltage BS4 and that has a drain connected to the ground voltage VSS. The common source stage 120 has a pair of input MOS transistors having respective gates receiving the output signals from the folded cascode stage 130. A transistor pair has its drains connected to the power-supply voltage VDD, sources connected to the input transistor pair, and gates receiving the bias voltage BS1. A current source transistor is connected between the common drains of the input transistor pair and the ground voltage VSS with the common mode feedback signal CMFB connected to the gate thereof, the outputs OUT+ and OUT− of the operational amplifier are taken from the common source stage 120 by being capacitor coupled from the outputs of the folded cascode stage 110. Thus, the conventional operational amplifier of FIG. 2 does not efficiently obtain a large dynamic voltage margin at a low power-supply voltage. In addition, the conventional operational amplifier of FIG. 2 achieves a relatively low gain compared with the other conventional operational amplifier of FIG. 1.
Accordingly, a low-voltage operational amplifier that can operate properly at a low power-supply voltage and that can have a high gain is needed.