1. Field of the Invention
The present invention relates generally to integrated circuit devices and, more specifically, to a flip-chip having an on-chip decoupling capacitor.
2. Description of Related Art
It is generally desirable to have a semiconductor package which is more efficient and has high decoupling capacitance/low inductance. It is known that the effective inductance can be lowered by connecting decoupling capacitors nearer to a circuit (i.e, the effective inductance is lower by reducing the lead length). Inductance is a function of path length, therefore the longer the current path, the higher the inductance. High inductance, which yields higher supply noise in semiconductor packages, reduces the performance of integrated circuits (ICs). Also, inductance between an IC and power supply can induce spurious voltage spikes in the power supply system, which can in turn cause timing problems in signal switching.
Decoupling capacitors are housed on semiconductor packages in order to lower the inductance through the package by reducing the lead length. Decoupling capacitors placed close to power consuming circuits are able to smooth out voltage variation with a stored charge on the decoupling capacitor. The stored charge either dissipates or is used as a local power supply to device inputs during signal switching stages, allowing the decoupling capacitor to negate the effects of voltage noise induced into the system by parasitic inductance. Off-chip decoupling capacitors, however, are not sufficient for very high speed microprocessor applications. Since the decoupling capacitors are located at a relatively long distance from the switching circuits, the time delay caused by the long inductance path makes the off-chip capacitors unusable with gigahertz switching circuits.
In order to sustain high frequency circuit operation, an ample amount of capacitive decoupling must be provided close to the switching circuits. Although it is possible to integrate chip capacitors within the chip's circuit elements, the capacitors compete for valuable die area that could be used for building additional circuits. Due to the limited area in which to build these capacitors, the overall capacitive decoupling that they provide is also limited.