1. Field of the Invention
The present invention relates to an internal voltage dropping circuit for a semiconductor device, and more particularly, it relates to an internal voltage dropping circuit by which current consumption during a standby can be reduced.
2. Description of the Prior Art
In recent years, semiconductor integrated circuits have been increasingly miniaturized. Especially, that is most noticeable in dynamic RAMs. As transistors are miniaturized more and more, supply voltage must be reduced for various reasons, such as lifetime shortening caused by hot electrons. For instance, in transistors of 0.6 .mu.m gate length, supply voltage applied from the outside thereto is 5 V but must be reduced to 4 V or below (e.g., 3.3 V) by use of an internal voltage dropping circuit.
FIG. 8 shows an embodiment of a conventional internal voltage dropping circuit for an integrated circuit semiconductor load device. This circuit employs a current mirror type differential amplifier. The current mirror type differential amplifier 22 consists of two P-type MOSFETs 42 and 43 and two N-type MOSFETs 44 and 45, which are symmetrically arranged on two current paths, and one of the N-type MOSFETs, 44, has its gate connected to a reference potential terminal 24 while the other MOSFET 45 has its gate connected to an output terminal 25. A power source is connected via an output transistor 26 which is a P-type MOSFET to the output terminal 25, and a potential at a junction of the transistors 43 and 45 on the output path in the differential amplifier 22 is applied to a gate of the output transistor 26. There are two paths provided between the differential amplifier 22 and a lower potential power source (the ground in the embodiment in FIG. 8), and a transistor 27 which permits merely a small amount of current to flow is connected to one of the paths i.e. including transistor 44 while a transistor 28 which permits a relatively large amount of current to flow is connected to the other path i.e. including transistor 45.
The internal voltage dropping circuit works as follows. When a potential at the output terminal 25 is lower than that at the reference potential terminal 24, the differential amplifier 22 causes a gate potential at the output transistor 26 to drop, and the output transistor 26 turns on to supply current to the output terminal 25 until the output terminal 25 reaches the same potential as the reference potential terminal 24. The transistors 27 and 28 are for saving the current flowing in the differential amplifier 22, and when an active/standby switch signal 41 received from a control device (not shown) becomes low when a load, such as a CPU and the like, connected to the output terminal 25 is on standby, the transistor 28 turns off, and the transistor 27 permits merely a small current to flow. On the other hand, when the active/standby switch signal 41 becomes high when the load is activated, the transistor 28 turns on to permit a sufficient current to flow in the differential amplifier 22, and the operation speed of the differential amplifier 22 is enhanced.
As has been described, in the conventional internal voltage dropping circuit, even if the semiconductor device 28 is on standby, the transistor 27 permits a small current to always flow by virtue of the gate thereof being coupled to the same power source as transistors 26, 42 and 43, and this wastes electric power.
A power supply circuit having a power-down mode for reducing a current supply to a SRAM as a semiconductor device is disclosed in 1987 IEEE International Solid-State Circuit Conference Digest of Technical Report pp 252-253, "A 256 K SRAM with On-Chip Power Supply Conversion,".