1. Field of the Invention
The present invention relates to a method of manufacturing an electronic device having a fine pattern such as a semiconductor device or a wiring substrate device.
2. Description of Related Art
In fabricating a semiconductor circuit, there are repeatedly employed a film forming step such as CVD (Chemical Vapor Deposition), an impurity layer forming step such as ion implantation, a lithography step for forming a resist pattern, and an etching step. Microsizing a circuit pattern and improving the dimensional accuracy of the circuit pattern are effective as a method for improving the operating speed of a semiconductor circuit or improving the degree of device integration. Recently, both microsizing and improvement of dimensional accuracy have been promoted actively. The microsizing of a pattern mainly depends on lithography, so lithography now occupies an extremely important position in the manufacture of a semiconductor device.
In the lithography technique, a projection exposure system is primarily used. A pattern of a photomask mounted to the projection exposure system is transferred onto a semiconductor wafer to form a device pattern.
To meet the recent demand for higher device integration and a higher device operation speed, the microsizing of the pattern has been promoted. With this as background, an exposure method called a halftone phase shift method is employed. The halftone phase shift method indicates a mask wherein a film (called a halftone film) translucent to exposure light is formed on a transparent substrate (blank). The transmittance through the film of exposure light is adjusted usually to a value in the range from 1% to 25%. Exposure light for passing through the film is adjusted so as to be phase-inverted in the absence of the film. A phase difference which brings about the highest resolving performance is 180° or an odd-number multiple thereof. But insofar as the phase difference is inside of 90° above and below 180°, there is obtained a resolution improving effect. It is generally known that the use of the halftone phase shift mask brings about an improvement of approximately 5% to 20% in resolution. Particularly, the higher the transmittance of the halftone film, the more outstanding the phase enhancing effect, i.e., the higher the resolution becomes. On the other hand, an image called a sub peak is apt to be formed in a field portion which should be a light shielding portion, and causes a transfer defect. This is a phenomenon caused by simultaneous enhancement of the phase of interference light from an adjacent pattern and that of light transmitted through the field portion. In this regard, reference will be made to an example of sub peak resulting from interference in a mutually enhancing direction of light rays emitted from four positions, called quadrupole. An example of a pattern layout as seen in plan in quadrupole is shown in FIG. 20A and a section taken on line A–A′ is shown in FIG. 20B. In these figures, the reference numeral 100 denotes quartz glass (blank), numeral 101 denotes a halftone film, and numeral 103 denotes a circuit pattern. FIG. 14 shows an optical transfer image corresponding to the range from B to B′ in FIG. 20B. It is seen that the higher the transmittance of the halftone mask member, the larger the sub peak. To suppress this phenomenon, there is adopted a method wherein in the case of a high-transmittance halftone phase shift mask with a relatively high transmittance of a halftone film, a fine light shielding pattern is formed using Cr on a portion of the halftone film corresponding to a sub peak pattern generated position, thereby cutting off the transmitted light in that portion. This method is called a tri-tone halftone phase shift method because three tones are used which are a transmitting portion (glass portion), a halftone portion, and a light shielding portion (Cr portion).
Descriptions on the tri-tone halftone phase shift are found, for example, in JP-A No.15130/1999, JP-A No.308715/1994, and JP-A No.90601/1997.
For providing a method of manufacturing an LSI of high integration and/or high-speed operation, it is necessary that a circuit pattern of fine dimensions be formed with a high dimensional accuracy. Therefore, a tri-tone halftone phase shift method having a high resolution is required to attain a high dimensional accuracy and a high phase control accuracy. In a halftone phase shift exposure method, exposure light which has passed through a halftone portion and exposure light which has passed through an aperture interfere with each other in the vicinity of a boundary between the aperture and the halftone portion to enhance the optical contrast and thereby improve the resolution and exposure latitude. Therefore, controlling the quantity of exposure light passing through the halftone portion, i.e., controlling the transmittance in the halftone portion, and phase control, are extremely important. Further, the pattern size accuracy of a halftone film greatly influences the dimensional accuracy of the pattern transferred. In a fine pattern near a resolution limit of a projection lens, the optical contrast decreases to a large extent due to optical diffraction, so that there arises a factor called MEF (Mask Error enhance Factor), which causes deterioration in dimensional accuracy of the transferred pattern to a greater extent than the dimensional accuracy of pattern on the mask. MEF is an index indicating to what degree a dimensional difference ΔLm of the transferred pattern is amplified relative to a dimensional difference ΔLw on the mask. It is represented by the following equation in which the reduction ratio of the projection lens is assumed to be M. For example, in case of using a 5× lens, the value of M becomes ⅕.MEF=ΔLm/(M·ΔLw)
In the case of such a fine pattern as used in a halftone phase shift mask, the value of MEF is usually in the range from 2 to 3, that is, variations in mask size are amplified from 2M to 3M and in this state there is made the transfer of pattern is made.
Recent tri-tone halftone masks require a fine and extremely high accuracy, such as a pattern size on mask of 320 nm and a dimensional accuracy on mask of 9 nm. Therefore, the dimensional yield in this class is usually as low as 10% to 30%. That is, on the average, it is necessary that three to ten sheets of mask be fed for producing one sheet of a good mask. Thus, the cost of mask is high and the Turn Around Time (TAT) is low.
Additional factors such as the resist characteristic factor and the substrate step structure factor, the position and size of a fine light shielding pattern (auxiliary pattern) using Cr, which pattern is for preventing unnecessary image transfer caused by a sub peak, cannot be accurately anticipated by simulation. Therefore, even if a halftone phase shift film is satisfactory in point of dimensional accuracy, if it is found to be defective in the state of transfer after the fabrication of mask, it is necessary that the mask be fabricated again from the beginning. This has caused an increase in the TAT of the mask feed.
In the course of manufacturing a semiconductor device there are used about 30 sheets of photomask. One important factor of determining the semiconductor device development period is the supply of photomask, and for shortening the development period it is absolutely necessary to improve the photomask feed TAT. Further, the IC grade development is often conducted in wiring step and this grade development power also depends much on the feed TAT of the photomask for the wiring step.