This invention relates to chip pads, and in particular to circuitry associated with chip pads.
FIG. 1 is a schematic diagram of an integrated circuit (IC). The IC is formed as a set of electrical components on a semiconductor die 1. The components include a main processing section of active components 2. Around the periphery of the die is a set of bonding pads 3, known collectively as a pad ring. The bonding pads serve to allow the die to be connected to other devices. For example, when the die is packaged, wire bond connections may be made from the pads 3 to solder pads on the exterior of the package. Those solder pads may then be soldered or clamped to a circuit board.
Each bonding pad 3 has interface circuitry 4 located between it and the active components 2. FIG. 2 shows a simple example of the form the interface circuitry may take. In this example the interface circuitry 4 provides electrostatic discharge (ESD) protection and level shifting. Diodes 5, 6 are arranged between the pad 3 and voltage supply rail 7 and ground 8. They resist ESD interference being passed to the line 10 that connects the pad to the active components 2. A level shifter 9 converts between the voltage level used to represent “high” in the domain of the active circuitry 2 and the voltage level used to represent “high” in the domain of the pads. In this example the voltage level used to represent “high” in the domain of the active circuitry is slightly lower than the voltage level used to represent “high” in the domain of the pads, so for output signals the level shifter converts a “high” signal input from the active components 2 into a slightly higher voltage that will be passed to the pad 3, and for input signals the level shifter converts a “high” signal input from the pad 3 into a slightly lower voltage that will be passed to the active components 2.
One trend in modern IC design is to drastically reduce the power consumption of ICs. One way to reduce power is to divide the IC into a set of power domains. A power domain is a set of components on the IC that can together be placed in a low power mode independently of the other components on the IC. Dividing the IC into multiple power domains allows parts of the IC that are not being used to be powered down, so that they are using little or no power, whilst other parts of the IC continue to function. Normally the IC will be equipped with a power controller which determines which power domains need to be turned on to satisfy the current requirements on the IC, and arranges for the other power domains on the IC to be powered down.
The IC might be intended to generate outputs that will be read by other devices. Those outputs will be presented as high or low voltages, representing binary ones or zeros, at its output pads. The state of an output pad will be determined by active circuitry on the IC. That active circuitry will generate a logical output, and the appropriate output pad will be set to high or low accordingly.
Once the active circuitry has generated the logical output, e.g. at point 10 in FIGS. 1 and 2, the active circuitry has completed its task. Assuming no more work is required of the active circuitry, the active circuitry could in principle be powered down to reduce energy consumption. However, if the chip pad has a simple driver circuit as shown in FIG. 2, if the active circuitry is powered down then the pad will no longer carry an output, or could revert to a default state. It is generally not known when the external device that is intended to consume the output has actually read the state of the pad. Therefore, it is normally desirable to keep the active circuitry powered up for some time after it has completed its processing, just to maintain an output at a pad that can at some stage be accessed by a consumer of that output. Keeping the active circuitry alive in that way consumes power that could otherwise be saved.
One way to address this is to make the entire pad ring, including those latch circuits, a separate power domain from the active circuitry, and to provide a buffer as part of that power domain into which the pad state can be written when the active circuitry is to be shut down. This provides advantages over keeping the active circuitry powered up, but the requirement to store the pad state into the buffer increases the time taken to power down the active circuitry, and it can be complex to lay out the IC to that the buffer can communicate with the pads and share their power domain.