FIG. 1 illustrates a prior art HDD drive amplification writer circuit 100. Generally, the circuit 100 sources large switching currents (from “Iw/X”, 110, 112, 150, 152, wherein “X” is ratio of an input resistor 120, 122 to a sum of output resistors 130, 132) through a resistive load 120, 122 to create the Iw reference voltage into a corresponding impedance match buffer amplifier 115, 117. In the circuit 100, current is sourced or disabled through the various current sources Iw/X, 110, 112, 150, and 152, depending upon whether it is desired to write a “1” or a “0” to a hard drive. In other words, a current can be driven through input resistors 120, 122, in opposite directions, and a voltage associated with the input resistor 120 at DC_P, and the input resistor 122 at DC_N drives inputs of the amplifiers 115, 117.
In the circuit 100, current sources 112, 150, are labeled PHI1 and current sources 110, 152 are labeled PHI2. In the circuit 100, PHI1 switching current 112 and PHI1 switching current 150 would be enabled and PHI2 switching current 110 and PHI2 switching current 152 would be disabled, or alternatively, PHI1 switching current 112 and PHI1 switching current 150 would be disabled and PHI2 switching current 110 and PHI2 switching current 152 would be enabled, whichever was preferred to write a “1” or a “0” between the write nodes 135 and 137.
However, there is a fundamental tradeoff between characteristics of a switching current, provided by current sources Iw/X 110, 112, 150, 152 and a switching speed (i.e. how quickly a transition can occur between a “1” or a “0”) of the preamplifier HDD write circuit 100. In order to achieve a desired switching speed, the resistance of the input resistors 120, 122 was kept small, such as a ratio of four times the sum of the output resistors 130, 132 and the load resistance to drive the output write nodes 135, 137. Consequently, with a gain of only four times to an output write nodes 135, 137 the switching current Iw/X of the current sources 110, 112, 150, 152, then was consequently disadvantageously large to achieve the needed write current magnitude at the output write nodes 135, 137. This is a high power consumption approach. For example, for a 60 milliamp write current, a constant 15 milliwatts is being variously sourced by sources 110, 112, 150, 152. Moreover, these current sources would be switched on or off, depending upon the value desired to be written to the hard drive, which further consumed power and created transients.
Furthermore, even with employing a smaller value of a current Iw/X so as to decrease power consumption, this introduces yet other disadvantages. The resistors 120, 122 need to be larger with smaller currents Iw/X to achieve the same needed write current magnitude at the write output nodes 135, 137. The input resistors 120, 122 create an additional RC pole, along with the parasitic capacitance at a node of DC_P and DC_N, and the capacitance can be large due to large devices and large metal capacitance to support the large switching current. As the input resistors 120, 122, become larger, this RC pole becomes more dominant within the circuit 100 and slows the switching speed.
Yet still further, the switching current is “X” dependent, as the switching current is employed to be gained up/amplified by a ratio of output resistor 130 divided by input resistor 120 and output resistor 132 divided by input resistor 122 to create the output write current. These ratios not only force the switching currents to be large in order to generate a large output write current as discussed above, but also does not allow for slew rate control at the write nodes DC_P, DC_N and hence at write nodes 135, 137. It would be desirable to be able to vary the slew rate at the write nodes 135, 137. However, doing so in this architecture would also vary the output write current, which needs to remain at the same value for all slew rates.
Therefore, there is a need in the art to address at least some of the issues associated with conventional HDD controllers.