The present invention is directed to polishing pads used for creating a smooth, ultra-flat surface on such items as glass, semiconductors, dielectric/metal composites, magnetic mass storage media and integrated circuits. More specifically, the present invention relates to grafting and preserving the grafted surface of polymers, preferably thermoplastic foam polymers, thereby transforming their mechanical and chemical properties to create more suitable polishing pads therefrom.
Chemical-mechanical polishing (CMP)is used extensively as a planarizing technique in the manufacture of VLSI integrated circuits. It has potential for planarizing a variety of materials in IC processing but is used most widely for planarizing metallizied layers and interlevel dielectrics on semiconductor wafers, and for planarizing substrates for shallow trench isolation.
In trench isolation, for example, large areas of field oxide must be polished to produce a planar starting wafer. Integrated circuits that operate with low voltages, i.e., 5 volts or less, and with shallow junctions, can be isolated effectively with relatively shallow trenches, i.e., less than a micron. In shallow trench isolation (STI) technology, the trench is backfilled with oxide and the wafer is planarized using CMP. The result is a more planar structure than typically obtained using LOCOS, and the deeper trench (as compared with LOCOS) provides superior latch up immunity. Also, by comparison with LOCOS, STI substrates have a much reduced xe2x80x9cbirds"" beakxe2x80x9d effect and thus theoretically provide higher packing density for circuit elements on the chips. The drawbacks in STI technology to date relate mostly to the planarizing process. Achieving acceptable planarization across the full diameter of a wafer using traditional etching processes has been largely unsuccessful. By using CMP, where the wafer is polished using a mechanical polishing wheel and a slurry of chemical etchant, unwanted oxide material is removed with a high degree of planarity.
Similarly, integrated circuit fabrication on semiconductor wafers require the formation of precisely controlled apertures, such as contact openings or xe2x80x9cvias,xe2x80x9d that are subsequently filled and interconnected to create components and very large scale integration (VLSI) or ultra large scale integration (ULSI) circuits. Equally well known is that the patterns defining such openings are typically created by optical lithographic processes that require precise alignment with prior levels to accurately contact the active devices located in those prior levels. In multilevel metallization processes, each level in the multilevel structure contributes to irregular topography. In three or four level metal processes, the topography can be especially severe and complex. The expedient of planarizing the interlevel dielectric layers, as the process proceeds, is now favored in many state of the art IC processes. Planarity in the metal layers is a common objective, and is promoted by using plug interlevel connections. A preferred approach to plug formation is to blanket deposit a thick metal layer on the interlevel dielectric and into the interlevel windows, and then remove the excess using CMP. In a typical case, CMP is used for polishing an oxide, such as SiO2, Ta2O5, W2O5. It can also be used to polish nitrides such as Si3N4, TaN, TiN, and conductor materials used for interlevel plugs, such as W, Ti, TIN.
CMP generally consists of the controlled wearing of a rough surface to produce a smooth specular finished surface. This is commonly accomplished by rubbing a pad against the surface of the article, or workpiece, to be polished in a repetitive, regular motion while a slurry containing a suspension of fine particles is present at the interface between the polishing pad and the workpiece. Commonly employed pads are made from felted or woven natural fibers such as wool, urethane-impregnated felted polyester or various types of filled polyurethane plastic.
A CMP pad ideally is flat, uniform across its entire surface, resistant to the chemical nature of the slurry and have the right combination of stiffness and compressibility to minimize effects like dishing and erosion. In particular, there is a direct correlation between lowering Von Mises stress distributions in the pad and improving polishing pad removal rates and uniformity. In turn, Von Mises stresses may be reduced though the controlled production of pad materials of uniform constitution, as governed by the chemical-mechanical properties of the pad material.
CMP pad performance optimization has traditionally involved the empirical selection of materials and use of macro fabrication technologies. For example, a pad possessing preexisting desirable porosity or surface texture properties may be able to absorb particulate matter such as silica or other abrasive materials. Or, patterns of flow channels cut into the surface of polishing pads may improve slurry flow across the workpiece surface. The reduction in the contact surface area effected by patterning also provides higher contact pressures during polishing, further enhancing the polishing rate.
Alternatively, intrinsic microtextures may be introduced into pads by using composite or multilayer materials possessing favorable surface textures as byproduct of their method of manufacture. Favorable surface microtextures may also be present by virtue of bulk non-uniformities introduced during the manufacturing process. When cross-sectioned, abraded, or otherwise exposed, these bulk non-uniformities become favorable surface microtextures. Such inherent microtextures, present prior to use, may permit the absorption and transport of slurry particles, thereby providing enhanced polishing activity without the need to further add micro- or macrotextures.
There are, however, several deficiencies in polishing pad materials selected or produced according to the above-described empirical techniques. Pads made of layers of polymer material may have thermal insulating properties, and therefore unable conduct heat away from the polishing surface, resulting in undesirable heating during polishing. Numerous virgin homogenous sheets of polymers such as polyurethane, polycarbonate, nylon, polyureas, felt, or polyester, have poor inherent polishing ability, and hence not used as polishing pads. In certain instances, mechanical or chemical texturing may transform these materials, thereby rendering them useful in polishing.
However, polyurethane based pads, currently in widespread use, are decomposed by the chemically aggressive processing slurries by virtue of the inherent chemical nature of urethane. This decomposition produces a surface modification in and of itself in the case of the polyurethane pads.
Yet another approach involves modifying the surface of CMP polishing pads materials to improve the wetability of the pad surface, the adhesion of surface coatings, and the application performance of these materials. Plasma treatment of polishing pad materials is one means to functionalize and thereby modify polishing pad surfaces. However, the simple functionalization of pad surfaces by plasma treatment is known to be a temporary effect, with spontaneous loss of functionalization after one to two days. While some success in the preservation of functionalized pad surfaces has been obtained for fluorinated polymeric surfaces, this has not been demonstrated for other polymeric surfaces, and in particular, thermoplastics.
Accordingly, what is needed in the art is an improved process for functionalizing and preserving a semiconductor wafer thermoplastic polishing pad surface, thereby providing a rapid rate of polishing and yet reducing scratches and resultant yield loss during chemical/mechanical planarization.
To address the deficiencies of the prior art, the present invention, in one embodiment, provides a polymer, preferably thermoplastic foam polymer, comprising a thermoplastic foam substrate having a modified surface thereon and a grafted surface on the modified surface.
In another embodiment, the present invention provides a method for preparing a polymer, preferably a thermoplastic foam polymer. The method comprises the steps of providing a thermoplastic foam substrate, exposing the substrate to an initial plasma reactant to produce a modified surface thereon, and exposing the modified surface to a secondary plasma reactant to create a grafted surface on the modified surface.
Yet another embodiment provides a method of manufacturing a polishing pad. The method comprises providing a thermoplastic foam substrate, and then forming a thermoplastic foam polishing body with a grafted surface by including those steps described above. A polishing pad is then formed from the thermoplastic foam polishing body that is suitable for polishing a semiconductor wafer or integrated circuit using the grafted surface.
In still another embodiment, the present invention provides a polishing apparatus. This particular embodiment includes a mechanically driven carrier head, a polishing platen, and a polishing pad attached to the polishing platen. The carrier head is positionable against the polishing platen to impart a polishing force against the polishing platen. The polishing pad includes a polishing body comprising a material wherein the material is a thermoplastic foam polymer.
The foregoing has outlined, rather broadly, preferred and alternative features of the present invention so that those skilled in the art may better understand the detailed description of the invention that follows. Additional features of the invention will be described hereinafter that form the subject of the claims of the invention. Those skilled in the art should appreciate that they can readily use the disclosed conception and specific embodiment as a basis for designing or modifying other structures for carrying out the same purposes of the present invention. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the invention in its broadest form.