Heretofore a method of mapping the passivation layers of integrated circuits was disclosed by the applicant herein in U.S. Pat. No. 4,777,364, entitled "Defect Detection and Thickness Mapping of the Passivation Layer(s) of Integrated Circuits," issued Oct. 11, 1988. In accordance with this patent, a penetration voltage method is used to determine the energy required by an electron beam to penetrate a passivation layer of an integrated circuit. As disclosed therein, an accelerating electron beam voltage is applied to an integrated circuit and is varied until the electrons have just enough energy to penetrate through the thickness of the passivation layer. Then, the acceleration voltage is increased to a predetermined amount (i.e., at least 3 KeV) so that the electron beam penetrates into the integrated circuit thin film and thereby interacts with the sublayer or film material to generate X-rays. The X-rays, in turn, are detected by an energy dispersive X-ray analyzer. The increased intensity-electron beam is x/y "raster" scanned over the area of the film and the generated X-ray intensity is stored at each pixel and displayed on a cathode ray tube.
With this method, however, greater accuracy is required in order to perform reliability tests on VHSI circuits and to map thickness profiles of the passivations layer in three dimensions. This lack of accuracy is due to a lack of resolution in the x-y plane which is a result of the averaging techniques employed by this method and it is due to a lack of specific correction for absorption effects in thin films. Accordingly, it is an objective of those who design VHSI circuits to obtain detailed thickness profiles of integrated circuits. The present invention addresses this objective.