The fabrication of integrated circuits on semiconductor wafers typically involves the creation of multiple, successive layers of materials, such as insulators, conductors, semiconductors, and so forth, on the semiconductor wafers. Each of the layers is normally formed by applying a photoresist layer over previously formed layers and then the photoresist layer is patterned. Portions of the photoresist layer not exposed during the patterning can be washed off and the layer can be formed using one of many desired techniques. When completed properly, the multiple layers combine to form functional integrated circuits. The alignment of the individual layers is crucial to creating properly formed structures in the semiconductor wafer. Misalignment of the layers can reduce the performance of the integrated circuitry if the misalignment is small (due to improper device geometries) and inoperable integrated circuitry if the misalignment is large (due to formation of improper electrical connections).
Misalignment of the layers can arise when a photomask is used to pattern a layer and the photomask is not lined up properly with previously created layers on the semiconductor wafer. Misalignment can be due to mechanical shift errors, optical lens magnification errors, optical lens aberration errors, and so forth. Mechanical shift errors can be the result of shifts in the semiconductor wafer and/or the photomask during processing and optical lens magnification errors can be a result of magnification mismatches between different layers of the semiconductor wafer. Optical lens aberration errors can be the result of non-ideal characteristics of an optical lens being used, wherein light passing through the lens behaves differently depending upon the portion of the lens the light is passing through.
Overlay targets have been used to allow for the alignment of the individual layers of a semiconductor wafer. After a photoresist layer has been patterned (and before the actual layer has been created) on top of the semiconductor wafer, which can have one or more targets, an optical system, such as a part of an overlay metrology tool, can capture images of the targets along with corresponding bullets (a part of the photoresist layer corresponding to the overlay target) in the photoresist layer and optical analysis algorithms can determine if the photoresist layer is aligned within specifications with respect to the semiconductor wafer. If the photoresist layer being created is determined to be misaligned, the photoresist layer can be removed, usually using a chemical wash, and a new photoresist layer can be applied and patterned and the optical processing can be repeated until the photoresist layer becomes aligned.
One disadvantage of the prior art is that the overlay targets can be used to detect mechanical shift errors and lens magnification errors. However, lens aberrations can also result in significant misalignment errors and the prior art overlay targets do not adequately capture lens aberration errors.
A second disadvantage of the prior art is that the overlay targets do not exploit the advantages of using polarized light.
Yet another disadvantage of the prior art is that the overlay targets typically comprise the photoresist layer and a layer immediately beneath it. The use of adjacent layers can permit a sequential build-up of misalignment that, while between the adjacent layers is within specifications, can lead to an overall misalignment that exceeds specifications.