In computer systems in general and in small systems in particular, it is desirable to reduce the total amount of hardware required for the system consistent with some specified level of machine performance. Data lines connecting various external devices such as keyboard terminals, CRT displays, credit card readers, etc., to a central processor would normally require separate I/O pin connections for each data line. In modern computers, large scale integrated circuitry (LSI) is widely used and, as is well known, these circuit modules are limited in the number of external circuit connections or pins which can be placed on an LSI module. Hence, by utilizing the same data lines for both input and output, the number of pins required is cut in half. In large, high speed computing systems, it generally has not been feasible to utilize the same data lines for both reading data into and out of the system, as many operations are held up pending the termination of an existing operation. While such waiting is necessary with a central memory or other shared functional unit, it is not so critical within the CPU as modern computers have extremely high speed memory circuits, etc., capable of performing required operations in extremely short periods of time. However, with smaller lower speed computers where both cost and manufacturing feasibility are primary factors, and time is somewhat secondary, it becomes possible to consider bidirectional data lines or half-duplex type of operations.
With the advent of modern integrated circuits and micro electronic technology, it has been possible to construct relatively small inexpensive computers utilizing separate source and destination buses within the computers which allows for considerably higher speed operations without greatly increasing the cost of construction. However, in the past, such two bus computers required large numbers of terminal pins for connecting the computer to both the input and output data lines. As stated previously, this causes severe pin connection problems when LSI is used in the host computer. It is the purpose of the present invention to provide a solution to the terminal or pin connection problem.
It has been found that satisfactory overall system performance is possible with a bidirectional data bus connected to a small two separate internal bus computer system by providing internal gating and control means for selectively connecting the I/O bus to the source and destination bus of said computer utilizing internal control circuitry together with a special adaptor connecting I/O devices to the I/O bus and for effecting requisite I/O control.
It has been further found that the requisite control functions can be efficiently and inexpensively performed by the use of micro programs stored in a read only memory having special decoding and control circuitry for effecting the desired gating operations.