Many device testing applications, such as test applications for memory devices, require a test device capable of simultaneously testing many devices having multiple test channels. Such a test device typically requires periodic calibration to, among other items, calibrate various clock and data paths through the test device so that the test device delivers meaningful test results. Modem test devices are capable of testing many devices, and therefore have many, in some cases thousands, of test channels.
A typical electronic circuit test device tests a device under test (DUT) by applying test signals of various logic states to input terminals on the DUT. The states of the signals that are produced at the output terminals of the DUT in response to the applied test signals are monitored to determine whether the DUT is behaving predictably.
An electronic circuit tester must maintain extremely accurate tolerances so that the performance of the DUT may be characterized accurately. Previous testing devices were manually calibrated using external measurement instrumentation. Other prior testing devices used a single calibration clock reference to calibrate all channels of the test device. Unfortunately, this requires that each channel of the test device be serially calibrated, thus requiring an undue amount of time to calibrate a test device having many hundreds or thousands of channels.
Accordingly, a need exists for a way of reducing the amount of time required to calibrate a test device.