This disclosure relates to optical alignment systems and more particularly, to a system and method for improving an alignment routine for lithography or pattern recognition.
Integrated circuit chips are fabricated one level at a time. The levels include diffusions, gates, metal lines, insulation, isolation, and contacts. The structures on these levels must be precisely positioned so that the finished chip has structures properly positioned. The step of positioning a level with respect to a previously formed level is called alignment.
Current industry methodologies require alignments of some feature to allow for orientation of a part. More specifically, alignment of patterned materials involves manual selection of alignment targets. The alignment targets typically include two or three alignment marks which a recognition system uses to learn a position of the part or material subject to examination. The user then provides a region of interest (ROI) by manually moving to this location while the software records this coordinate. Alternatively, a coordinate relative to some known reference point (e.g., center of the part) is indicated by the software.
Furthermore, if multiple patterns exist on the part as found in semiconductor wafers, then a step periodicity is supplied to find the next ROI. Once the setup is completed (i.e., after the alignment marks are recorded) the optical system aligns and moves to a ROI on the part for measurement or inspection.
One drawback to the above approach is that time is needed to teach the alignment mark locations relative to a ROI and is wasted time. Furthermore, pattern recognition systems which fail to align are unable to re-teach themselves since no point of origin has been established.