In the art of deposition of films of material onto a surface of a substrate, there are many known techniques, including vacuum evaporation deposition, ion plating, ion- and plasma-assisted sputtering or chemical vapor deposition ("CVD"), and the more modern ICB approach. ICB deposition is an ion-assisted technique in which the material to be deposited on a substrate is heated in a crucible and its vapor ejected through a small nozzle into a vacuum region. The vapor forms loosely-held atomic clusters, each cluster comprising 100 to 2000 atoms of the material. Some of the ejected vaporized atomic material is ionized by electron bombardment and the atoms are accelerated toward the substrate disposed in the vacuum region. The ionized material, together with the neutral (i.e., non-ionized) component of the vapor, arrive at the substrate surface for deposition thereon. ICB deposition offers the ability to precisely control the deposited film structure by applying kinetic energy to the vapor clusters during film deposition. Kinetic energy control is achieved by varying the acceleration voltage and the electron current for ionization.
In most of the known ion- and plasma-assisted deposition techniques, the individual atoms of the material to be deposited on the substrate generally impact the substrate surface with excessive kinetic energy, producing a relatively high number of defects in the substrate and/or the deposited film. With ICB deposition, a more useful lateral energy is obtained as the clusters impact the substrate and the atoms break off, without damaging the film and substrate. Due to the effects of ionized cluster bombardment, ICB deposition produces films with high density, strong adhesion, a low impurity level, and a smooth surface. Also, film properties usually associated with relatively high substrate temperatures in conventional vacuum depositions can be obtained at lower substrate temperatures in the ICB technique. This results in a distinct advantage in semiconductor device fabrication. See, for example, U.S. Pat. Nos. 4,152,478, 4,217,855, 5,350,607 and 5,380,683, all of which are hereby incorporated by reference.
The trend in the semiconductor manufacturing industry has always been to increase the number of active devices (e.g., transistors, resistors, capacitors) formed in an area of a semiconductor substrate (e.g., silicon, germanium, gallium arsenide). This increase in IC density has been achieved primarily by decreasing the size of the active devices and associated electrically-isolating areas (e.g., field oxide) formed within the IC substrate. Sizes of such devices and areas are now down into the submicron range. This size reduction has been achieved largely through improved fabrication methodologies and structures.
For example, it is common to employ one or more thin horizontal layers of a high-conductivity metal (e.g., aluminum), separated by insulating layers, together with associated vertical, high-conductivity interconnecting plugs or vias routed through the insulating layers. This is to connect between the active devices in the semiconductor substrate. In this approach, holes are formed in the insulating layers at desired connection points. The holes are filled with a high-conductivity, low-resistivity material to form the vias. The overlying horizontal metallization layer is then deposited. This process is repeated for subsequent vertical plugs and horizontal overlying layers. In this way, an ohmic contact is formed between active device areas (e.g., the source and drain terminals of an MOS transistor, or the collector, base and emitter terminals of a bipolar transistor) in the silicon substrate. Interconnections can be made in the different metal layers as cross-overs, thereby further increasing IC density. This interconnect process is generally referred to as "metallization".
However, conventional metallization techniques encounter problems as device geometries become increasingly smaller. For example, as device sizes shrink, contact or via holes formed closer together, are of smaller diameter and have steeper vertical sidewalls. As a result, it has become difficult to accurately deposit conventional materials, such as aluminum, using conventional techniques (e.g., sputtering), into the holes to achieve uniform contact with device contact areas and metallization layers. Non-uniform contact within the interconnects results in problems such as non-planar topographies and electrical breaks formed at the edges of the holes. The result is manifested in relatively poor step coverage of the metallization layers and vias. Other problems include those related to the reliability of the interconnect lines, such as electromigration or wear-out failures.
Also, as device sizes shrink, connection lines become smaller, thereby subjecting the interconnects to higher current densities. At these higher densities, aluminum metallization layers and plugs are increasingly susceptible to stress migration and electromigration damage. Further, conventional metallization materials such as aluminum exhibit higher resistance, which increases the RC time constants of the device, thereby limiting overall device speed.
In an attempt to overcome these problems, it is known in the prior art to utilize tungsten as the material comprising the metallization layers and/or the plugs, or as a separate, additional barrier layer utilized in conjunction with an aluminum layer or plug. Tungsten is utilized in part because, relative to aluminum, tungsten has a higher resistance to electromigration. The tungsten barrier layer acts as a backup layer, maintaining the electrical connection integrity of the metallization layers and plugs if the primary aluminum layers and plugs fail due to stress migration and electromigration. Still further, tungsten can be deposited somewhat more uniformly than aluminum, thereby reducing the aforementioned concerns with step coverage.
However, an inherent problem with the use of tungsten alone as the material comprising the metallization layers and plugs is that tungsten has approximately three times the resistivity of aluminum. Therefore, it is desired to utilize tungsten as the primary constituent of a tungsten alloy formed as a metallization layer or plug, and to deposit the tungsten alloy layer onto a semiconductor substrate using the ICB approach.