This invention concerns improvements in printed circuit boards, and relates more especially to printed circuit boards of the kind bearing multiple conductor arrays such as may form data buses of a data processor, e.g. a microprocessor.
With the increasing miniaturisation of data processors there is a corresponding demand for printed circuit boards in which the area occupied by a given number of conductor tracks is reduced to a minimum. In the case of conductor arrays such as form data buses, and thus comprise a simple array of parallel conductor tracks, the number of tracks capable of being accommodated in a given area is theoretically limited only by the minimum width of conductive track giving acceptable resistance of the conductor and the minimum distance between adjacent tracks necessary to achieve acceptable isolation of the respective conductors. In practice, however, the termination of the conductor tracks at individual electronic components or electrical terminal connectors imposes limits upon the physical spacing of the conductors. Also, with high frequency and square wave signals such as occur in microprocessor systems, cross-talk between conductors increases significantly as the distance between conductors is reduced. Mitigation of these problems is therefore highly desirable in order to achieve improved standards of miniaturisation.