1. Field of the Invention
This invention relates generally to the field of memory interface design and, more particularly, to cache design in a graphics system.
2. Description of the Related Art
A computer system typically relies upon its graphics system for producing visual output on the computer screen or display device. Early graphics systems were only responsible for taking what the processor produced as output and displaying that output on the screen. In essence, they acted as simple translators or interfaces. Modern graphics systems, however, incorporate graphics processors with a great deal of processing power. They now act more like coprocessors rather than simple translators. This change is due to the recent increase in both the complexity and amount of data being sent to the display device. For example, modern computer displays have many more pixels, greater color depth, and are able to display images that are more complex with higher refresh rates than earlier models. Similarly, the images displayed are now more complex and may involve advanced techniques such as anti-aliasing and texture mapping.
Since graphics systems typically perform only a limited set of functions, they may be customized and therefore far more efficient at graphics operations than the computer's general-purpose central processor. While early graphics systems were limited to performing two-dimensional (2D) graphics, their functionality has increased to support three-dimensional (3D) wire-frame graphics, 3D solids, and now includes support for three-dimensional (3D) graphics with textures and special effects such as advanced shading, fogging, alpha-blending, and specular highlighting.
With each new generation of graphics system, there is more image data to process and less time in which to process it. This consistent increase in data and data rates places additional burden on the memory systems that form an integral part of the graphics system. One example of a memory sub-system defining the upper limit of overall system performance may be the texture buffer of a graphics system. Certain graphics applications such as 3D modeling, virtual reality viewers, and video games may call for the application of an image to a geometric primitive in lieu of a procedurally generated pattern, gradient or solid color. In these applications, geometric primitives carry additional mapping data (e.g., a UV, or UVQ map), which describes how the non-procedural data is to be applied to the primitive. To implement this type of function, a graphics system may employ a texture buffer to store two dimensional image data representative of texture patterns, “environment” maps, “bump” maps, and other types of non-procedural data.
During the rendering process, the mapping data associated with a primitive may be used to interpolate texture map addresses for each pixel in the primitive. The texture map addresses may then be used to retrieve the portion of non-procedural image data in the texture buffer to be applied to the primitive. In some cases (e.g., photo-realistic rendering) a fetch from the texture buffer may result in a neighborhood or tile of texture pixels or texels to be retrieved from the texture buffer and spatially filtered to produce a single texel. In these cases, four or more texels may be retrieved for each displayed pixel, placing a high level of demand on the texture buffer. Thus, poor performance of the texture buffer is capable of affecting a cascading degradation through the graphics system, stalling the render pipeline, and increasing the render or refresh times of displayed images.
In other words, accesses of graphics data, such as texture map data, must be performed very quickly. Therefore, one goal of a graphics system is to improve the speed and efficiency of memory accesses of texture maps from a texture memory. One common method is to use a texture memory cache to improve the speed of accesses of texture maps from the texture memory. The design of texture memory systems, including texture cache memory systems, plays a significant role in the implementation of new generation graphics systems.
Texture mapping hardware often needs to process multiple pixels in the same cycle in order to maximize performance. While these pixels are independent, they typically exhibit some degree of spatial coherence. A high performance texture cache would take advantage of this coherence without imposing ordering or synchronization restrictions between pixels. Texture mapping is generally a read-only operation. Consequently, latency is typically not a factor when considering proper operations, but bandwidth does affect performance. In contrast, the performance of microprocessor instruction and data caches is typically affected by latency, not bandwidth.
In a texture mapping graphics system that processes multiple pixels, typically in multiple parallel pipelines, it is common for neighboring pixels to request overlapping texture data. Traditionally, cache memory in such a system requires one port per texel per pipeline, which is generally expensive to implement, or may suffer performance loss from having too few read-ports. Alternately, multiple cache memories may be built into the texture mapping graphics system. This solution is typically expensive to implement as well.
Therefore, new texture cache memory systems and methods are desired to optimize texture caching by reducing the number of cache read-ports necessary to support the simultaneous reading of texels for multiple pixels, taking advantage of the spatial locality of the texel accesses. More generally, improved cache memory systems are desired in various different applications, including graphics applications.