1. Field of the Invention
This invention relates to an addressing circuitry and more particularly to an improved addressing circuitry for driving dot matrix vertical scan display apparatus, such as a plasma display panel.
Of the number of display apparatus, dot matrix vertical scan plasma display panels have been of a relatively recent introduction. One such manufacture of plasma display panel has been Burroughs Corporation. Burroughs has introduced a number of different models. These displays usually have a number of rows and a number of characters per row to display ASCII characters. In earlier models, number of the rows and characters per row have been based on binary progression numbers; for example, the number of rows of the characters displayed on the panel is one row or two rows or four rows or eight rows which is in the progression of 2.sup.0, 2.sup.1, 2.sup.2, 2.sup.3 and likewise the number of characters per row is 16 or 32 characters or 2.sup.4, 2.sup.5. Each of the characters is represented by illuminating selected ones of seven by seven dot cross points. More recently a new line of models have been introduced wherein the number of rows and the number of characters per row are not binary progression numbers. The new models have been introduced to meet the market needs.
Where the display panels wherein the number of rows and the number of characters per row correspond to a binary progression number, the prior art addressing circuitry provided by manufacturers of the displays have been found satisfactory.
However, the present inventors found that this is not the case with the displays having character rows and having characters per row which are not of binary progression numbers. More specifically, the present inventors found that the prior art addressing circuitry if used to operate such a display, would read out the characters in the random access memory but not in sequence. Instead, they skipped certain character locations in the random access memory in the read out process. This wasted random access memory locations.
The prior art addressing circuitry is also found not to be completely satisfactory in providing cursor, blanking and blinking operation of the display.