For example, a synchronous type adaptive filter which cancels from a main input a periodic noise originating from a revolving drum motor of a camera-integrated type video tape recorder (hereinafter abbreviated to VTR) is proposed in Patent Gazette of Japanese Published Patent Application No. H11-176113 and so on. In the adaptive filter employed in a technology disclosed in this gazette, the noise is reduced by renewing and converging filter coefficients adaptively to the target noise occurring at a constant period (for example, 150 Hz) along with the above-described motor revolutions.
FIG. 6 shows a block diagram of a conventional adaptive noise reduction circuit, an outline of which will be described. In FIG. 6, an input terminal 1 receives a main audio input S whose noise is to be reduced. In actual equipment, for example, noise N schematically shown is supplied to an input terminal 2 and is simply added to the main audio input S at an adder 8, which causes the main audio input S to be mixed with the noise N. The adaptive noise reduction method reduces the noise N from the main audio input S mixed with the noise N, and therefore, the main audio input S mixed with the noise N is supplied to a (+) side terminal of an adder 9.
On the other hand, a reference input X highly correlated with the noise N is supplied to an input terminal 3. The reference input X is supplied to an adaptive filter 6, where an adaptive filter output Y that is approximate to the noise N is formed by adaptation processing. Then, an adaptive filter output Y thus formed is supplied to a (−) side terminal of the adder 9 and is subtracted there from the main audio input S mixed with the noise N. Accordingly, an audio output S^ is derived from the adder 9, from which the noise N is removed by the adaptive filter output Y as is shown by the following expression (0).S^=S+N−Y   expression (0)
This audio output S^ is an audio signal of originally aimed, from which the noise N is removed and is output to an output terminal 10. Simultaneously, the audio output S^ (a residual signal E) is fed back through a step gain 7 to be used in adaptation processing. Specifically, the residual signal E is supplied to, for example, a least mean square (hereinafter abbreviated to LMS) operation processing circuit 5 together with the reference input X, where an operation of coefficients of the adaptive filter 6 is performed so that, for example, noise power of the residual signal E may become minimum.
Further, the above-described adaptive filter 6 will be described below in detail with reference to a block diagram of FIG. 7. Note that, while various methods have been proposed for algorithm of the adaptive filter, the above-described LMS method is often employed because its convergence speed is comparatively fast and a scale of operational circuit is small in general. Moreover, those circuits can be processed with hardware whose circuit is all made up of digital signal processor (hereinafter abbreviated to DPS), digital large scale integrated circuit (hereinafter abbreviated to digital LSI) and the like, or software using microcomputer.
Hereupon, in FIG. 7, the reference input X is supplied to the adaptive filter 6 surrounded by a broken line as well as the LMS operation processor circuit 5. The adaptive filter 6 is conventionally includes a FIR digital filter which has about several hundred taps, and the filter coefficient W in each of the taps is adaptively renewed in accordance with, for example, the LMS algorithm. In FIG. 7, the FIR filter having (m+1) taps is shown, which is provided with unit delay means 111 to 11m each having a delay Z−1 of unit sampling time.
Therefore, delayed signals X0 to Xm are obtained from these unit delay means 111 to 11m, respectively. These signals X0 to Xm are supplied to multipliers 120 to 12m for multiplying them by coefficients. Moreover, to these multipliers 120 to 12m are supplied the adaptive filter coefficients W0 to Wm formed in, for example, the LMS operation processing circuit 5. All outputs of these multipliers 120 to 12m are added in an adder 13 to be output as the adaptive filter output Y.
The adaptive filter output Y is represented by the following expression (1).
                    Y        =                              ∑                          j              =              0                        m                    ⁢                      (                          Wj              ·              XJ                        )                                              expression        ⁢                                  ⁢                  (          1          )                    
Further, in the LMS operation processing each of adaptive filter coefficients W0 to Wm is renewed in accordance with the following expression (2) from the above-described reference input X and residual signal E.Wk+1=Wk+2μ•Ek•Xk   expression (2)
In this expression (2), the small letter k represents passing time, as an example, assuming that a value k is renewed by every unit sampling, the value k indicates the kth sampling and a value (k+1) indicates the (k+1)th sampling.
The value μ is a coefficient given by the step gain 7. The value μ is called a step gain or step size which is a parameter that determines a convergence speed in the LMS algorithm. It is noted that if the value μ is large, the convergence becomes fast, however accuracy after convergence falls; inversely, if the value μ is small, the convergence becomes slow, however accuracy after convergence rises. For this reason, the value μ is set at an optimum according to an adaptive system condition in use and the like.
In this way, according to the above-described apparatus, in the LMS operation processing the adaptive filter coefficient W in the adaptive filter is renewed according to the expression (2) such that the signal highly correlated with the reference input X and included in the residual signal E is kept to a minimum, so that a component of noise N contained in the main audio input S can be kept to a minimum by inputting to the reference input X the above signal correlated with noise N. In other words, between the LMS operation processor circuit 5 and adaptive filter 6, such a feedback loop that makes minimum of a component of the residual signal E is formed.
A conventional fixed-period noise reduction block will further be described with reference to FIG. 8. In the following description, elements of the same function as in FIG. 6 are denoted by the same reference numerals.
First, similarly to FIG. 6, the main audio input S whose noise is to be reduced is supplied to an input terminal 1. In actual equipment, for example, noise N is schematically supplied to the input terminal 2 and is added simply to the main audio input S in the adder 8 to make the main audio input S mixed with noise N. A pseudo-noise signal Yk is supplied to a (−) side terminal of the adder 9 from an adaptive signal processor 20 surrounded by a broken line, and by subtracting the pseudo-noise signal Yk, only the main audio input S is obtained at the output terminal 10.
At the same time, the above-described error signal through the step gain 7 is supplied to the adaptive signal processor 20. Further, the fixed-period pulse signal as the reference input signal from an input terminal 3 and a sampling clock from an input terminal 21 are supplied to the adaptive signal processor 20. Hereupon, the adaptive signal processor 20 includes the same adaptive filter as in FIG. 7, which renews the coefficients in accordance with the LMS algorithm, and processing thereof is performed in synchronism with the sampling clock from the input terminal 21.
In addition, the sampling clock corresponds with a sampling frequency of the main audio input S and noise N. In FIG. 8, the sampling clock from the input terminal 21 and the fixed-period pulse signal from the input terminal 3 are inputted to a counter 22 within the adaptive signal processor 20, and a period of the input is counted by the sampling clock and the counted value thereof is supplied to a timing generator 24 to generate a predetermined timing pulse.
Then, from the timing pulse, an Xk address is generated in turn from 0 to m in a read-address generator 23 and Xk−1 address is generated in turn from 0 to m in a write-address generator 25. These Xk addresses and Xk−1 addresses are respectively input as the read address and write address to an accumulator 26 composed of static RAM (hereinafter abbreviated to SRAM) or the like.
Further, the accumulator 26 has registers of, for example, m+1 words (m+1 taps) at the maximum, each of which has a predetermined bit length. Then, the accumulator 26 of m+1 taps is designed that an adaptive coefficient W is read from or written into the respective specified addresses with the predetermined timing within one period, according to the read address Xk or the write address Xk−1.
Furthermore, to one terminal of an adder 28 is supplied 2 μEk which is obtained by multiplying the above-described error signal Ek by the step-gain p, and to the other terminal of the adder 28 is supplied data Wk read from the address Xk of accumulator 26. An output of the adder 28 obtained by adding both the inputs is then delayed by a unit sampling time 27, and the resulted signal is written into the Xk−1 address of the accumulator 26. Likewise, the pseudo-noise signal Yk of one period before is read from the Xk address.
Accordingly, in FIG. 8, the adaptive filter coefficient W is renewed using the above-described expression (1) such that the noise component which is contained in the error signal E and is highly correlated with the drum reference signal X may always become minimum, and a main signal output whose noise is always reduced is obtained at the output terminal 10.
Next, an example of addressing by the fixed-period adaptive filter shown in FIG. 8 will be described with reference to FIG. 9. In this case, 0 to m words of the accumulator 26 in FIG. 8 is first formed in the shape of a ring. In other words, an address next to Adr:m is made to be Adr:0, or an address preceding to Adr:0 is made to be Adr:m. Assuming that a time of one period is T[s] and a sampling frequency is S[Hz] with respect to the number of sampling clock within one fixed period, the value m has the following relation.m≈S•T   expression (3)
Then, the write-address generator 25 controls data within the ring-shaped memory to move in the direction shown with an arrow by one address at every sampling clock, and to fix relatively a read-address position and a write-address position at positions shown in the figure. Accordingly, a write signal as shown in FIG. 10A, for example, and a read signal delayed by a predetermined amount as shown in FIG. 10B are obtained. A pitch of both the signals is definite and becomes a fixed period m.
Specifically, according to the above-described apparatus, the noise can be reduced by renewing and converging the filter coefficients adaptively to target noise occurring at a constant period (for example, 150 Hz) as a rotary drum motor of, for example, a camera-integrated VTR revolves.
However, in case of the variable period noise in which a period of, for example, target noise varies, it is necessary to renew the number of taps and coefficients of the above-described adaptive filter in accordance with the periodic variation. Specifically, with respect to the target noise occurring at a definite period, the noise is reduced with such adaptive filter that has, for example, as many taps as a quotient got when that period divided by the sampling period, whereas if the period varies, the number of taps must be changed. Moreover, when the period varies, it is assumed that a waveform of the target noise will also change.
To cope with this problem, it is conceived that the adaptive filter coefficients must be renewed corresponding to the periodic variation. In general, however, because the step-size (or step-gain) that is a parameter determining a time required for renewal of the filter coefficient is determined taking into account the influence from external disturbance and the like, it is impossible to increase the step-size (or step-gain) corresponding to the periodic variation. For this reason, there is a possibility that, when the period varies fast for example, there may happen a case where the adaptive filter cannot follow, thus making the noise reduction impossible disadvantageously.
Additionally, an example of the variable period noise is an electromagnetic noise, noise, and a vibration noise originating from the disc motor in DVD-RAM. In this case, the disc motor adopts a zoned constant linear velocity (hereinafter abbreviated to ZCLV) system for a revolution control system. This system divides a recording area into zones according to a radial position of the disc and sets the number of revolution of disc such that a recording density in each zone may become almost constant, thus causing the number of revolution to vary in each zone.
In this example, the number of revolution varies in the range of, for example, 3246 (at inner circumference) rpm to 1375 (at outer circumference) rpm. Thus, during the movement between zones at seek time for example, the number of revolution must be changed rapidly, which causes the above-described variable period noise to occur depending on a change in the number of revolution. In addition, even though the revolution control system is the conventional CLV system, the number of revolution is rapidly varied at the seek time or the like, so the variable period noise will occur depending on a change in the number of revolution.
This application has been made in view of those points and aims to solve a problem in which, with the conventional adaptive noise reduction method and apparatus, it is difficult to make the adaptive filter coefficients rapidly follow the variable period noise whose period changes rapidly, thus making it impossible to reduce efficiently the variable period noise from the main input.