1. Field of the Invention
The present invention relates to IC testing devices for performing characteristic tests on ICs (Integrated Circuits) such as general-purpose AD converters, DA converters, and AD/DA converters with internal UCPUs microcomputers.
2. Background Art
FIG. 2 is a block diagram showing an example of the structure of a conventional IC testing device.
In the drawing, the analysis sample 1 is an IC which is the object of analysis, which in this example is a general-purpose AD converter.
Additionally, this testing device can be largely divided into an IC testing device main body 102 and two test stations (test station 103 and test station 104).
In this case, the IC testing device main body 102 is composed of a DC section 5, an LS section 6 and a solid-state relay 111. The DC section 5 measures the direct current characteristics of the analysis sample 1 based on analysis data received from test station 103 and test station 104. The LS section 6 selects the voltage level to be applied to the I/O terminals of analysis sample 1 for each terminal of the analysis sample 1.
Additionally, test station 103 and test station 104 are respectively composed of an analog circuit 7, a pin electronics section 8 and a power source 9.
While the internal components of test station 103 and test station 104 are identical in the drawing, they are not necessarily identical.
The analog circuit 7 has a digital/analog converter (DAC), which DA converts analysis data (digital values) received from the IC testing device 102, and inputs the DA converted analog voltages into the analog input terminals (A.sub.in terminals) of the analysis sample 1 (AD converter).
The pin electronics section 8 compares digital values (digital values AD converted by analysis sample 1) outputted from the I/O terminals of the analysis sample 1 (AD converter) with reference values (digital values) received from the IC testing device main body 102.
Additionally, a tester bus which extends from the DC section 5 of the IC testing device main body 102 is serially connected in the order of analog circuit 7 of test station 103, pin electronics section 8 of test station 103, analog circuit 7 of test station 104 and pin electronics section 8 of test station 104.
Similarly, a tester bus which extends from LS section 6 of IC testing device main body 102 is serially connected in the order of the analog circuit 7 of test station 103, the pin electronics section 8 of test station 103, the analog circuit 7 of test station 104 and the pin electronics section 8 of test station 104.
Additionally, a solid-state relay 111 of the IC testing device main body 102 performs ON/OFF control of a 200 V AC supply to a power source 109 of each test station.
Since the above-described conventional IC testing device shares the solid-state relay for performing ON/OFF control of the power source between the test stations, it is not capable of activating only one of the test stations.
For this reason, even in cases where a single test station is sufficient to perform the analyses due to reasons such as the number of ICs to be tested being few, both test stations must always be activated, thus wastefully expending electrical power.
Additionally, since the above-described conventional IC testing device serially connects the units of each test station by means of a tester bus, the flow of signals to the other test station is stopped in cases such as when one test station has failed, thus lowering the rate of operation of the device overall.