1. Field of the Invention
The invention relates to a feed-forward structure, as compared to a feed-back structure, for canceling the dc-offset of a down-converted RF signal in a Direct Conversion Receiver (DCR).
2. Description of the Related Art
For the purpose of indicating the background of the invention and/or the state of the art, the following four references are incorporated by reference in their entirety: B. Razavi, xe2x80x9cDesign Considerations for Direct-Conversion Receivers,xe2x80x9d IEEE Transactions on Circuits and Systems, vol 44, No. 6, June 1997 (herein xe2x80x9cReference 1xe2x80x9d); W. Namgoong, xe2x80x9cDirect-Conversion RF Receiver Designxe2x80x9d, IEEE Transactions on Communications, vol. 0.49, No. 3, March 2001 (herein xe2x80x9cReference 2xe2x80x9d); A. Abidi, xe2x80x9cDirect-Conversion Radio Transceivers for Digital Communicationsxe2x80x9d, IEEE Journal of Solid-State Circuits, vol. 30, No. 12, December 1995 (herein xe2x80x9cReference 3xe2x80x9d); and U.S. Pat. No. 6,317,064 to Ferrer, et al., xe2x80x9cDC offset correction adaptable to multiple requirements,xe2x80x9d published Nov. 13, 2001 (herein xe2x80x9cReference 4xe2x80x9d).
Wireless systems have become an essential part of modern life. Systems such as cell phones, wireless LANs, etc., are very popular and the penetration rate of these technologies is increasing very fast throughout the world. In view of high demand and marketplace competition, emphasis is placed upon new systems having small size, low power consumption, low cost, and of course, high bandwidth and quality service.
One of the impediments to making wireless equipment less expensive, smaller, and lower power, is the difficulty of integrating the analog front-end. The heterodyne receiver is the most popular architecture for wireless systems"" front-end. It has good selectivity and performance but suffers from bulky off-chip components that can not be integrated with current technologies.
An alternative solution is the direct conversion receiver (DCR), which has a very simple architecture and a potential for a fully integrated front-end, with low cost, small size, and low power consumption. Such features are particularly attractive for next generation wireless handsets and for software defined radio (SDR) systems.
However, DCR suffers from some serious problems like dc-offset, 1/f noise, I/Q mismatch, and even-order distortion. I/Q mismatch and even-order distortion can be made negligible with good circuit design techniques, but dc-offset and 1/f noise are generally more serious and challenging problems, dc offset being considered the most challenging problem in realization of DCR in commercial products. Strong dc-offset drives the baseband amplifiers to nonlinear mode, and for ideal amplifiers it saturates analog-to-digital converters (ADCs) (e.g., Reference 1).
A very low frequency and reasonably high offset voltage may appear at the output of the mixer in a DCR. This offset voltage dominates the signal strength by a factor of 50-100 times in amplitude and highly degrades the bit-error-rate probability if not removed. Unless unwanted offset is removed in the analog domain prior to sampling and before the baseband amplifiers, the offset saturates the baseband amplifiers and causes devastating non-linear distortion. Also in the case of ideal amplifiers, a very large dynamic range ADC is needed to resolve the signal from the dc-offset (e.g., References 1 and 2).
FIG. 1A demonstrates a conventional DCR in which dc-offset cancellation circuits 20 remove, in the analog domain, dc-offset from the down-converted signal prior to variable gain amplifiers (VGA) 7.
There are different sources that cause dc-offset in a DCR. The local oscillator (LO) 4 signal leaks to the radio frequency (RF) port and the mixer 3 down converts the leaked signal to baseband, i.e., a zero intermediate frequency (IF). The LO signal also leaks from antenna 1 and reflects off external objects and self-down converts to direct current. These self-mixings introduce tremendous dc-offset because the LO signal is generally much stronger than RF signal. In addition, a strong interferer may leak to the LO port of the mixer and be translated to zero IF. The amount of dc-offset is difficult to predict because its magnitude changes with receiver location, orientation, and time. Therefore in addition to dc-offset estimation, a tracking method should be incorporated in the receiver to follow the offset variations (e.g., References 2 and 3).
A simple and straightforward method to cancel dc-offset is ac-coupling, as demonstrated in FIG. 1B. This method is suitable and cost effective where the signal spectrum does not have so much energy at dc and the ac-coupling does not degrade system performance. A pager is a good example for this case. Additionally, for Code Division Muliple Access (CDMA) systems, especially Wideband CDMA, some degradation in the spectrum is affordable and ac-coupling may be a viable solution. However, for CDMA, the corner frequency must be in the range of few kHz, requiring large off-chip capacitors, slowing response time, which is not desirable. None of these drawbacks are favorable in making a fully integrated front-end for sophisticated wireless systems.
Another approach to canceling dc-offset utilizes digital, rather than analog, techniques. Most digital methods for dc-offset cancellation are feedback-based average-and-subtract techniques. They estimate the offset noise by averaging the digitized signal after the entire analog baseband section. Then the estimated dc-offset value fed back and subtracted from the down-converted signal at the mixer output via adder 11.
An example of this technique is illustrated in FIG. 2. The signal is sampled after the ADC 9, but before the digital baseband receiver 10. The sampled signal is digitally processed by a dc-offset cancellation circuit 30 containing an averaging circuit 31, memory 32, and a digital-to-analog converter (DAC) 33. The dc-offset cancellation circuit 30 estimates the offset noise, which is then subtracted from the down-converted signal at adder 11.
Different methods have been proposed for estimating dc-offset, but nearly all of them share some drawbacks, such as (1) slow response due to their feedback structure, (2) saturation of the ADC and baseband amplifiers due to passing offset noise through the entire analog baseband section during detection time, (3) need for high resolution ADCs, (4) high complexity and computationally inefficiency, and (5) inefficient dc-offset tracking methods.
To overcome the drawbacks of the prior art, a new feed-forward dc-offset structure and method is proposed. The new canceller comprises a feed-forward structure where dc-offset, including offset noise, is estimated from down-converted signal, and cancelled before applying the signal to the analog baseband section. DC-offset is cancelled without using feedback.
A direct conversion receiver, according to an exemplary embodiment of the present invention, comprises a dc-offset tracking unit, a subtraction circuit, and an analog baseband circuit. The dc-offset tracking unit samples a down-converted signal, and outputs a dc-offset signal based upon the dc-offset of the sampled signal. The dc-offset tracking unit comprises a linear digital filter, estimating and tracking dc-offset in the sampled down-converted signal. The subtraction circuit receives the down-converted signal after the down-converted signal is sampled by the dc-offset tracking unit, and subtracts the dc-offset signal from the received down-converted signal. The analog baseband circuit comprises a variable gain amplifier, and receives the down-converted signal after the dc-offset has been subtracted.
Preferably, the linear digital filter is a first order recursive filter, having a transfer function:                               y          ⁡                      [            n            ]                          =                              x            ⁡                          [              n              ]                                +                      ky            ⁡                          [                              n                -                1                            ]                                                                                    y            ⁡                          [              n              ]                                -                      ky            ⁡                          [                              n                -                1                            ]                                      =                  x          ⁡                      [            n            ]                                                            H          ⁡                      (            z            )                          =                                            Y              ⁡                              (                z                )                                                    X              ⁡                              (                z                )                                              =                      1                          1              -                              kz                                  -                  1                                                                        
k being a loop gain of the first order recursive filter.
The direct conversion receiver further includes a mixer, an analog-to-digital converter, a low pass filter, and a digital baseband receiver. The mixer receives an RF signal and down-converts it to zero IF, outputting a down-converted signal. The analog-to-digital converter receives the down-converted signal after the dc-offset is subtracted by the subtraction circuit and after the gain of the signal is adjusted by the analog baseband circuit, converting the down-converted signal from analog into digital, for processing by the digital baseband receiver. The low pass filter filters the down-converted signal after the down-converted signal is output by the mixer, but before the signal is converted to digital by said analog-to-digital converter.
The dc-offset tracking unit further comprises an ADC and a DAC. The ADC samples the down-converted signal, and the DAC outputs the dc-offset signal, the linear digital filter being connected in the digital domain between the ADC and DAC. Instead of a DAC, a digitally programmable dc-voltage source can be used.
The dc-offset tracking unit further comprises a sampling rate converter, connected between said linear digital filter and the DAC.
The DCR further comprises an anti-aliasing filter, filtering the sampled signal prior to the signal being input into the ADC of the dc-offset tracking unit.
The invention further comprises a method of canceling dc-offset from a signal. An exemplary embodiment comprises monitoring a signal, detecting the dc-offset in the monitored signal by applying a linear filtering function, and subtracting the detected dc-offset from the signal at a point after where the signal was monitored.
The method preferably comprises using a first order recursive function as the linear filtering function, the first order recursive function having a transfer function of:                               y          ⁡                      [            n            ]                          =                              x            ⁡                          [              n              ]                                +                      ky            ⁡                          [                              n                -                1                            ]                                                                                    y            ⁡                          [              n              ]                                -                      ky            ⁡                          [                              n                -                1                            ]                                      =                  x          ⁡                      [            n            ]                                                            H          ⁡                      (            z            )                          =                                            Y              ⁡                              (                z                )                                                    X              ⁡                              (                z                )                                              =                      1                          1              -                              kz                                  -                  1                                                                        
k being a loop gain of the first order recursive function.
The invention further comprises a method operating a direct conversion receiver. An exemplary embodiment comprises receiving an RF signal, down-converting the RF signal to zero IF by mixing the RF signal with a signal from a local oscillator, canceling a dc-offset in the down-converted signal, adjusting gain of the down-converted signal after the dc-offset is cancelled, converting the gain-adjusted signal from analog to digital, low pass filtering the down-converted signal, and processing the digitally-converted signal. Canceling the dc-offset in the down-converted signal comprises monitoring the down-converted signal, detecting the dc-offset in the monitored signal by applying a linear filtering function, and subtracting the detected dc-offset from the down-converted signal at a point in the direct conversion receiver after where the down-converted signal was monitored. Low pass filtering is performed after the RF signal is down-converted, but before the gain-adjusted signal is converted from analog to digital.
Preferably, the linear filtering function is a first order recursive function, having a transfer function of:                               y          ⁡                      [            n            ]                          =                              x            ⁡                          [              n              ]                                +                      ky            ⁡                          [                              n                -                1                            ]                                                                                    y            ⁡                          [              n              ]                                -                      ky            ⁡                          [                              n                -                1                            ]                                      =                  x          ⁡                      [            n            ]                                                            H          ⁡                      (            z            )                          =                                            Y              ⁡                              (                z                )                                                    X              ⁡                              (                z                )                                              =                      1                          1              -                              kz                                  -                  1                                                                        
k being a loop gain of the first order recursive function.
Detecting the dc-offset further comprises converting the monitored signal from analog to digital before applying the linear filtering function, and converting the dc-offset detected by the linear filtering function from digital to analog.
The method further comprises anti-alias filtering the monitored signal prior to detecting the dc-offset.
Converting the dc-offset from digital to analog further comprises adjusting a digital sampling rate.
These structures and methods have very low complexity and are computationally efficient and accurate, and are very suitable for making low cost, small size, and low power consumption integrated RF receivers based on DCR.
The feed-forward design has many advantages over conventional designs, such as fast response time, more relaxed requirements on the analog baseband section, no need for high-resolution A/D converters to digitize a desired signal, negligible low frequency spectrum distortion that occurs in some of the wireless standards, very good tracking capability, easy configuration for different operating situations, suitability for multimode/multi-standard systems, no need for memory cells to store sample signals, and computational efficiency and less complexity because of the ability to operate at lower sampling rates and lower resolution.