In conventional technologies, the structure of a TFT-LCD (Thin Film Transistor Liquid Crystal Display) mainly comprises two glass substrates and a liquid crystal layer disposed therebetween, wherein a surface of the upper glass substrate has a color filter mounted thereon, the color filter includes color filter units and black matrix; and a surface of the lower glass substrate has thin-film transistors and pixel electrodes mounted thereon, therefore it is generally called TFT Array Substrate.
In a thin-film-transistor array substrate, the structure of a sub-pixel comprises a pixel electrode, a thin-film transistor and a storage capacitor, wherein a gate electrode of the thin-film transistor is connected a scan-signal line, a source electrode thereof is connected to a data-signal line, a drain electrode thereof is connected to the pixel electrode; and the storage capacitor is connected to the pixel electrode. By means of the scan-signal line, the gate electrode of the thin-film transistor is forced with a voltage, which is capable of conducting the thin-film transistor. The source electrode of the thin-film transistor then, by means of the data-signal line, receives a data signal and transmits the data signal to the drain electrode, and further writes it in the pixel electrodes and stores it in the storage capacitor.
Besides the storage capacitor, many parasitic capacitances further exist in the actual structure of the thin-film transistor further, those parasitic capacitances are unnecessary to the thin-film transistor and may cause electronic losing and affect the operation characteristic of the thin-film transistor.
With reference to FIG. 1, FIG. 1 is a scheme diagram of a partial structure of a conventional thin-film-transistor array substrate. As shown in FIG. 1, a thin-film transistor 9 is disposed close to a point of the junction of a scan-signal line 8 and a data-signal line 7, wherein, the thin-film transistor 9 includes a gate electrode 90, a semiconductor layer 91, a drain electrode 92 and a source electrode 93, wherein, the gate electrode 90 is a portion of the scan-signal line 8; the semiconductor layer 91 is mounted upon the gate electrode 90 with an isolation layer placed therebetween (not shown in the figure); the drain electrode 92 is disposed on the semiconductor layer 91; the source electrode 93 extends from a side of the data-signal line 7 along the edge of the semiconductor layer 91 and then surrounds the drain electrode 92. Parasitic capacitances exist between the drain electrode 92 and the gate electrode 90.
With further reference to FIG. 2, in order to decrease the parasitic capacitances that exist between the drain electrode 92 and the gate electrode 90, the gate electrode 90 further has an opening 900 corresponding to the drain electrode 92, so as to reduce an overlapping area of the gate electrode 90 to the drain electrode 92, and thereby decreases the parasitic capacitances formed therebetween.
However, the opening 900 of the gate electrode 90 will reduce the area of the scan-signal line 8, and thereby increase the numeral value of the resistance of the scan-signal line 8. The transmission speed of the scan-signal line 8 will be affected due to the increased resistance.
Therefore, it is necessary to provide a thin-film-transistor array substrate and a manufacturing method thereof to overcome the problems existing in the conventional technology.