Communication systems that support wireless and/or wired communications between wireless and/or wire-line communication devices are being rapidly proliferated. Such communication systems range from national and/or international cellular telephone systems, to the Internet, to point-to-point in-home wireless networks. Each type of communication system is typically constructed to operate in accordance with one or more communication standards. For instance, wireless communication systems may operate in accordance with one or more standards including, but not limited to, IEEE 802.11, Bluetooth, advanced mobile phone services (AMPS), digital AMPS, global system for mobile communications (GSM), code division multiple access (CDMA), local multi-point distribution systems (LMDS), and multi-channel-multi-point distribution systems (MMDS), among any number of other standards or combination of standards.
Depending on the type of wireless communication system, a wireless communication device, such as a cellular telephone, two-way radio, personal digital assistant (PDA), personal computer (PC), laptop computer, home entertainment equipment, as some examples, may communicate directly and/or indirectly with other wireless or wired communication devices. For direct communication (e.g., point-to-point communications), the participating wireless communication devices may tune their receivers and transmitters to the same channel or multiple channels (e.g., one or more of the plurality of radio frequency (RF) carriers of the wireless communication system) and communicate over that channel or channels. For indirect wireless communications, each wireless communication device may communicate directly with an associated base station (e.g., for cellular services) and/or an associated access point (e.g., for an in-home or in-building wireless networks) via an assigned channel, or channels. To complete a communication connection between the wireless communication devices, the associated base stations and/or associated access points may communicate with each other directly, via a system controller, via the public switch telephone network, via the internet, and/or via some other wide area network.
For wireless communication devices to participate in wireless communications, the devices may each include a built-in radio transceiver (e.g., receiver and transmitter) or may be coupled to an associated radio transceiver (e.g., a station for in-home and/or in-building wireless communication networks, RF modem, etc.). As is known, the receiver portion of such a transceiver may receive RF signals, demodulate an RF carrier frequency from the RF signals via one or more intermediate frequency stages to produce baseband signals, and demodulate a baseband signal in accordance with a particular wireless communication standard to recapture transmitted data from an intermediate frequency signal. The transmitter portion of such a transceiver may convert data (e.g., digital data) into RF signals by modulating the data in accordance with a particular wireless communication standard to produce baseband signals and mix the baseband signals with an RF carrier using one or more intermediate frequency stages to produce RF signals. In other embodiments, transmitted and received signals may be directly converted between the RF domain and baseband.
Phase locked loops (PLL) are often used in integrated wireless transceivers for RF frequency generation and RF signal modulation due to their high level of integration and ability to operate over a wide range of frequencies. As those working in this area are aware, two basic PLL topologies exist, which are generally referred to as “type 1” and “type 2,” respectively. A general structure is common to both types of PLLs, namely each topology includes a phase detector, a low-pass filter (LPF), a voltage controlled oscillator (VCO), and a feedback path. The phase detector serves as an “error amplifier” in the feedback loop. Based oh an “error” signal produced by the phase detector, the PLL may reduce any phase difference between the input reference signal and the feedback signal (e.g., “the error”). A PLL is considered “locked” if this phase difference is constant over time.
In “type 1” PLLs, the phase detector generates square voltage pulses whose duration is proportional to the phase error. These voltage pulses are filtered by the LPF to generate a smooth VCO control voltage whose amplitude is proportional to the phase error. The VCO responds to the change in control voltage by increasing or decreasing its oscillation frequency. The feedback action of the PLL then causes the VCO to lock to the desired operating frequency.
“Type 2” PLLs, also known as “charge pump based PLLs,” include a phase and frequency detector, a charge pump, a loop filter, a voltage controlled oscillator (VCO), and a feedback path. The phase and frequency detector compares the phase and frequency of a reference signal with the phase and frequency of a feedback signal (e.g., the output oscillation produced by the VCO, which is fed back to the phase and frequency detector via the feedback loop). If the phase and/or frequency of the reference signal leads the phase and/or frequency of the feedback signal (which occurs when the output oscillation frequency is less than the desired oscillation frequency), the phase and frequency detector generates an up signal. In response to the up signal, the charge pump increases the positive current it outputs, which, when filtered by the loop filter, increases a control voltage applied to an input of the VCO. With an increase in the control voltage, the VCO increases its frequency of oscillation. If the phase and/or frequency of the reference signal lags the phase and/or frequency of the feedback signal (which occurs when the output oscillation frequency is greater than the desired oscillation frequency), the phase and frequency detector generates a down signal. In response to the down signal, the charge pump increases the negative current it outputs, which, when filtered by the loop filter, decreases the control voltage input to the VCO. With a decrease of the control voltage, the VCO decreases its frequency of oscillation.
In an “ideal” PLL (e.g., in a mathematical model of a PLL), the VCO operates linearly, which can be expressed as: Θout(t)=KVCO∫Vcntrl(t)dt, where KVCO is the gain (specified in MHz/volt, for example) of the VCO, Θout is the output oscillation of the VCO, and Vcntrl is the input control voltage of the VCO provided by the loop filter. Based on this mathematical model of PLL operation, when a PLL settles to a desired output frequency (i.e., the output signal frequency of the VCO), the input control voltage of the VCO assumes a constant value. When the PLL is used as a modulator, the control voltage may vary around this constant value in accordance with a desired modulation pattern, thus providing frequency modulation.
It follows from the above equation that the frequency of a modulated signal produced using a PLL operating in accordance with the mathematical model is proportional to the change in control voltage with a proportionality constant equal to KVCO. In practice, however, the gain of a VCO (i.e., KVCO) is not constant, but varies with integrated circuit fabrication process, PLL frequency band, control voltage amplitude, and temperature, among any number of other parameters. For instance, for a PLL that has a wide frequency range of operation, the gain of the VCO may vary from its nominal design value by as much as +/−50%. Since KVCO is a key parameter governing the dynamic behavior of the PLL, when used as a data signal modulator (e.g., in a translational loop), such large variations in VCO gain may produce prohibitively large modulation errors.
One possible solution to reduce the adverse affects of such variations in VCO gain is to design a baseband processor that is used in conjunction with the PLL to account for VCO gain variations. This approach, however, relies on an assumed VCO gain variation. Therefore, such an approach may not be particularly precise, making this solution of limited benefit.