For the purposes of operation and in order to store information, computer systems and mainframes have a memory arrangement comprising a multiplicity of memory modules which are arranged, for example, in memory cabinets and have semiconductor components grouped on the memory modules.
Semiconductor components, for example, DRAMs (Dynamic Random Access Memories), are generally subject to extensive function tests early in the production process before final assembly to form a memory module. These function tests are used to identify faulty memory cells or faulty column lines or row lines or generally faulty circuit parts in the semiconductor components. To this end, data values are written to memory cells in a memory cell array in the semiconductor component and are then read out again in order to be compared with the prescribed data values. This makes it possible to test the semiconductor components under various operating conditions in order to guarantee fault-free operation of the memory chip.
The memory modules accommodate a test device, a “BIST” (Built-In Self-Test) unit, in each of the semiconductor components as part of the latter. The BIST unit integrated in the respective semiconductor component carries out the requisite electrical function tests before the semiconductor components are installed. The BIST unit has a BIST controller which, as a switching region in the semiconductor component, is in the form of an ASIC (Application-Specific Integrated Circuit). Commands in a test sequence which are issued by the BIST controller are forwarded to the semiconductor component, with the BIST controller monitoring and evaluating the execution of the commands. The data transmitted by the semiconductor component regarding its operating states are output, for example, to external test systems which make an appropriate evaluation on the basis of which it is possible to make a statement regarding whether and, if appropriate, which memory areas are not functioning as intended. When the tests are carried out successfully, the module is classified as functional and is used in the customer's target application.
However, a meaningful test result can only be achieved when the semiconductor component is tested at the operating frequency that it has during normal operation. A fault in a semiconductor component is always associated with the target application, for example, a voltage supply or an input parameter for configuring the semiconductor component is not within the prescribed specification.
However, today's test methods do not yet make it possible to simulate these or all characteristic operating modes of the application in order to test the semiconductor components in proximity to the application. It is thus not possible to make a statement regarding whether the semiconductor components tested during production will run through all of the operating modes, occurring during later application without any faults.
In the event of a fault occurring during normal operation at the customer's premises, the memory module has to be returned to the manufacturer for the purposes of analysis. Identification data which may have been programmed in, for example the chip ID, test data or adjustment parameters, can thus be used only for subsequent historical tracking, but not for user-specific adjustment during normal operation.
At such a point in time it would be desirable, for the purposes of evaluation and/or analysis, to use a test system which would make it possible to test and adjust the semiconductor components during normal operation. Today's available external test systems are connected to the semiconductor components on a memory module via the semiconductor component's standard interface, which is used for external data interchange, address interchange and/or command interchange during normal operation. In the test mode, the test system is able to generate the test commands required to test the memory module, such as control and address commands, commands for reading and storing data words and also a clock signal, and is able to initiate the electrical function test via the BIST unit, for example. In the case of semiconductor components which can be operated in parallel, however, this function test may usually be carried out only for all chips, that is, all of the semiconductor components arranged on the memory module are tested in parallel at the same time via the standard interface.
The desire for remote access monitoring and a fault analysis capability for computer systems, i.e., driving the computer systems via an external test system, has existed since computer systems were networked. One difficulty in checking individual hardware components in a computer system is based on the fact that respective redundancy must be available for faulty components.
For example, an apparatus for the remote monitoring of computer components in a computer system is known, but this apparatus explicitly requires a working memory in the computer system. In order to analyze a processor in a computer system, a remotely accessible integrated debug environment has been proposed, wherein a computer which is connected to the computer system via the Internet can analyze the processor in the event of a fault. Further, a method for remotely accessing a faulty booting computer is known, in which the computer, in the event of a failed starting attempt, has recourse to a simple E-BIOS code which connects the computer to a service computer via a LAN or an Internet connection and thus makes the computer accessible for remote access operations for the purpose of repair and/or diagnosis. A known method for testing an SDRAM in a computer system, including test modules integrated in the computer system, tests the memories before starting by appropriate test modes in order to boost or attenuate a possible fault mode.
In addition, there is known a semiconductor module having semiconductor components which are arranged on the semiconductor module and are connected to one another via a serial line and having an interface which accesses the semiconductor components via the serial line.
However, remote access maintenance of memory modules during normal operation has not been disclosed. To this end, it would be necessary to operate the computer system normally and to carry out specific addressing operations during an application.
A memory arrangement which makes it possible to drive the semiconductor components (arranged on the memory arrangement) during normal operation using remote access and to test and adjust them in proximity to the application without impairing the operation of the semiconductor components is desirable.