Most electronic equipment, and in particular computers, utilize a series of chips which are connected to a motherboard in order to form the signal processing part of the equipment. Various chips may assume a single function or multiple functions which are used by the equipment. The group of chips used together is sometimes referred to as a chipset.
FIG. 1 is a block diagram showing the arrangement of a chipset on a motherboard for a computer. The chip set 100 includes a first chip 102 which carries the central processing unit for the device. Memory controller hub 104 acts as a central controller to move data into and out of memory and to other related chips. Chip 106 is a graphics chip which generates various graphic arrangements for display. Chip 108 is the memory itself, either RAM or ROM memory. Chip 110 is an input/output controller hub which transfers data to various input/output devices. Chip 112 includes connections to a hard disk drive. Chip 114 is a chip which connects to other peripheral components.
Typically, each chip in a chip set is formed of two parts. The first part is the core which is the circuitry which handles the main function of the device itself. Also on the chip are input/output circuits for connecting the core to other chips. For example, the memory controller 104 would have a central core and an input/output device connected to each of the four other chips 102, 106, 108 and 110 to which it is connected.
For every pair of chips that are connected, an interface is provided to connect the input/output devices of the chips to each other. Thus, the CPU 102 and memory controller hub 104 are connected by a front side bus (FSB) 116. Likewise, memory controller hub 104 is connected to graphics chip 106 through the advanced graphics port (AGP) 118. Memory 108 is connected to the memory controller hub 104 by a system memory bus 120. Memory controller hub 104 is connected to the input/output controller hub 110 through hub link 122. The input/output controller hub 110 is connected to the hard disk drive 112 through IDE 124. The I/O controller hub 110 is connected to the peripheral components chip 114 through the peripheral components interface 126.
FIG. 1 also shows a clock circuit 113 which is another chip connected on the motherboard. This clock provides clock signals of various frequencies to the various other chips. These particular connections are not specifically shown but all chips on the motherboard are connected thereto to receive clock signals which are necessary for the synchronization of the entire device.
Some of the interfaces on the motherboard are considered to be source synchronous interfaces. In the present example, the front side bus 116, the advanced graphics port 118 and the hub link 122 are all source synchronous circuits. On the other hand, a system memory bus 120 and IDE 124 are not source synchronous interfaces. In such an interface, data signals and strobe signals are used to transfer data in a synchronous fashion. These signals occur in a certain preset timing relationship so that data being transferred can be expected at a particular time location.