1. Field of the Invention
The present invention is related to electronic memories such as may be used for data processors and signal processors.
2. Description of the Prior Art
The prior art uses many different types of memories such as magnetic memories, integrated circuit memories, magnetostrictive delay line memories, and optical memories. Magnetic memories include magnetic core memories and plated wire memories. Integrated circuit memories include shift registers, charge transfer devices (CTDs), and random access memories (RAMs). Bubble memories are magnetic in nature and are implemented with integrated circuit processes. These memories are used with digital systems, where digital information is stored as a single digital bit per memory cell. Hence, a digital word having a plurality of digital bits is stored in a plurality of memory cells storing a single digital bit per memory cell. In analog systems such as analog computers or analog signal processors, analog signals are stored in analog signal form with memories such as potentionmeters and CCD memories. Digital systems do not store digital information in analog signal form, such as interfacing an analog memory to a digital processor with a digital to analog converter at the input to the analog memory and an analog to digital converter at the output from the analog memory interfacing to the processor. Main memories for stored program computers are implemented with digital memories, not analog memories.
The prior art is further represented by the art of record in the instant application and in the ancestor applications. Transform processor art and frequency domain processor art is cited in the ancestor applications and is taught in the Rabiner and Gold reference cited hereinafter; in the Goodman, Rabiner and Radner and Bulter and Harvey references cited in ancestor U.S. Pat. Nos. 4,209,853 and 4,209,852; in the Oppenheimer and Schafer reference cited in ancestor U.S. Pat. Nos. 4,209,843 and 4,486,850; and in the Brigham reference cited in ancestor U.S. Pat. No. 4,486,850. Transform processor art and frequency domain processor art is further discussed in the Description Of The Prior Art in ancestor U.S. Pat. No. 4,486,850.
The prior art is further defined in the art-of-record of the related applications in the chain of continuing applications including U.S. Pat. No. 3,356,989 to Autry; U.S. Pat. No. 3,613,771 to Quay; U.S. Pat. No. 3,618,052 to Kwei; U.S. Pat. No. 3,643,106 to Berwin; U.S. Pat. No. 3,652,499 to Smith; U.S. Pat. No. 3,662,351 to Ho; U.S. Pat. No. 3,775,738 to Quay; U.S. Pat. No. 3,753,242 to Townsend; U.S. Pat. No. 3,755,793 to Ho; U.S. Pat. No. 3,757,313 to Hines; U.S. Pat. No. 3,761,901 to Aneshansely; U.S. Pat. No. 3,771,148 to Aneshansley; U.S. Pat. No. 3,774,177 to Schaffer; U.S. Pat. No. 3,787,852 to Puckette; U.S. Pat. No. 3,801,967 to Berger; U.S. Pat. No. 3,826,926 to White; U.S. Pat. No. 3,852,745 to Le Bail; U.S. Pat. No. 3,873,958 to Whitehouse; U.S. Pat. No. 3,876,989 to Bankowski; U.S. Pat. No. 3,889,225 to Gosney; U.S. Pat. No. 3,891,977 to Amelio; U.S. Pat. No. 3,895,342 to Mallet; U.S. Pat. No. 3,909,806 to Uchida; U.S. Pat. No. 3,912,748 to Barton; and U.S. Pat. No. 3,942,034 to Buss and including the article by Dennard, IBM Technical Disclosure Bulletin, Vol 14, No. 12, May 1972, pages 3791-3792; the article by Altman, Electronics Magazine, Feb. 28, 1972, pages 62-71; and the article by Baertsch, Electronics Magazine, Dec. 6, 1971, pages 86-91 which references are all incorporated herein by reference.