Metal-insulator-metal (MIM) capacitors are often used in very-large-scale integration (VLSI) designs implemented on semiconductor chips, either as part of the primary circuit design or to provide decoupling capacitance for supply noise suppression. MIM capacitors are intended to improve capacitance density of the VLSI design while minimizing area overhead. FIG. 1 is a cross-section of an example semiconductor chip 100 that includes a MIM capacitor. The MIM capacitor comprises a capacitor top metal (CTM) node 104 and a capacitor bottom metal (CBM) node 106 formed on the top and bottom side, respectively, of a dielectric layer 108. The MIM capacitor layers reside between two metal layers MX and MX+1, on which die interconnection paths 110 are patterned. The MIM capacitor is insulated by an insulating layer 102. Conductive vias 112 are formed in the die to electrically connect circuit paths in the metal layers to the CTM node 104 or the CBM node 106 as needed.
The above-described description is merely intended to provide a contextual overview of current techniques and is not intended to be exhaustive.