This invention relates to a microprocessor, and more particularly to a microprocessor and associated control method capable of dealing with both large-scale intricate program processing and fast program processing which is intended for real-time operation.
A microprogram-based processor is disclosed in Japanese Patent Unexamined Publication No. JP-A-56-108149, for example. This processor is based on a control scheme in which microinstruction routines common to many different macroinstructions are stored in a nano-instruction memory and used commonly for the execution of macroinstructions.
A microcomputer capable of running multiple independent programs is disclosed in the co-pending U.S. patent application Ser. No. 07/414,315 filed on Sep. 29, 1989 for example. This microcomputer includes a main processor and a subordinate processor. The main processor is a usual processor such as the one disclosed in the above patent publication JP-A-56-108149, for example, and the sub processor is a processor intended for real-time processing with the ability of running multiple independent programs quickly.
The processor of the above patent publication 56-108149 is designed to run multiple independent programs in such a manner that each program is created in the form of sub programs which are linked by a main program. However, because of sequential operations of sub programs, it is difficult for this processor to deal with fast real-time processing in which the processor needs to respond to input signals promptly.
The microcomputer disclosed in the co-pending application Ser. No. 07/414,315 is operative for both the usual program processing and fast real-time processing. However, this microcomputer inevitably has a large-scale circuit arrangement due to the two processors included in it.