Analog-to-digital converters (ADCs) convert time-discrete analog input values to a digital form. A type of ADC, the successive approximation register (SAR) ADC, digitizes the analog input values using a successive approximation search algorithm. While the internal circuitry of the SAR ADC may run at a higher frequency (such as several megahertz (MHz), for example), the sample rate of the SAR ADC is generally a fraction of that frequency (such as several kilohertz (kHz), for example) due to the successive approximation search algorithm used. For example, normally each bit of the SAR ADC is fully realized prior to proceeding on to the next bit.
Since modern ADC devices are highly precise, testing them calls for even more precise stimuli for the results to be of relevance. Providing these high precision stimuli can be expensive. Additionally, in order to reach the required high precision, the stimuli generators often need long settling times, resulting in longer test times.
Often, front-end and back-end testing using automatic test equipment (ATE) is performed as part of ADC production. For production tests using ATE, the ADCs can be tested with architecture-independent methods, such as the linear ramp test or the histogram test. With the linear ramp test method, a slowly changing high-resolution high-linearity voltage ramp is applied to the input of the ADC, and the conversion results are used to determine the ADC transfer curve. The histogram test method uses a predetermined input signal as input to the ADC, and statistically deduces the transfer curve from the observed code histogram.
Both methods often use a minimum number of hits per code to provide usable results. Consequently, the runtime for an n-bit binary ADC grows linearly with the number of possible output codes, which is 2^n. For high resolution ADCs, this leads to long test times and, as a consequence, high test costs.
A compromise for easier stimulus generation may be achieved by using a first-order resistor-capacitor low pass filter. The inherent mismatch of the RC time constant is measured first, and then the transfer curve can be obtained. As the charge or discharge speed of the capacitance must be adapted to the fastest changing part of the voltage curve, the measurement takes longer than the linear ramp test. Additionally, the high time constant can require an unfeasibly large (external) capacitance.
Expensive stimuli generators and long settling times can lead to increased test costs. Further, when tests are lengthy and expensive, the user may have no simple means to check that the circuits are fully functional during field operation, including throughout the product lifetime. For example, some methods are used for production testing, and are prohibitive for use in the field. This can lead to a violation of specified functional safety requirements of some automotive applications, for example.
Other proposed methods often result in substantial chip area overhead and can also increase the BOM for the customer.