1. Field of the Invention
The present invention relates to power-on detection circuits, and more particularly to power-on detection circuits for detecting a minimum operational frequency required to power-on a device.
2. Description of the Prior Art
Most circuits require certain minimum power levels for operation. It is therefore necessary to have some form of power detection circuit that can detect when this power level is reached, thereby determining that power-on is possible. If the power level detected is too low then the circuit will be unable to operate. If the power level detected is too high then some potential operational time, energy, and potential for lower voltage operation will have been wasted.
Please refer to FIG. 1. FIG. 1 is a diagram of a conventional power detection circuit 100. The circuit 100 comprises a first resistor R1 (12) coupled to a voltage supply, a second resistor R2 (14) coupled between R1 and ground, and a transistor 16 where the gate of the transistor 16 is coupled between R1 and R2. The source of the transistor 16 is coupled to a third resistor R3 (18) and an output device 20 and the drain of the transistor 16 is coupled to ground. The circuit 100 works by utilizing a ratio of the first resistance to the second resistance (R1/R2). When the ratio is above a certain voltage Vt it will power-on the transistor 16, causing the transistor 16 to pull down against the resistor R3, thereby generating a signal in the output device 20 that signifies that power is sufficient for power-on.
As the circuit 100 utilizes a ratio of two resistors, the level at which it is determined that power-on is possible is not as precise as desired. It is the aim of the present invention to provide a circuit and a method of power detection that can determine a minimum power required for power-on with a high level of accuracy.