This invention pertains to the field of digital computing and, more particularly, to a large scale digital computing system capable of performing high-speed addition without unduly increasing power consumption.
Addition is a fundamental operation in the arithmetic unit of a digital computing system because it is employed to perform, not only the addition function, but also the multiplication function and the accumulation function. In a conventional adder, the processing time is directly related to the number of bits in the numbers being processed because of the necessity for carries to propagate from stage to stage before the arithmetic result is generated. A number of schemes have been developed over the years, such as the so-called look ahead adder, to generate arithmetic results without the delays occasioned by carry propagation. These schemes require a great deal of extra electronic circuitry and, therefore, dissipate more power than a conventional adder.