The invention relates to a method for producing a semiconductor structure having a plurality of vertical and at least one lateral semiconductor component integrated in a disk-shaped semiconductor body having a first surface and a second surface opposite the first surface, with the lateral semiconductor components being disposed beneath the first surface, and the plurality vertical semiconductor components extending between the first and the second surfaces. The at least one lateral semiconductor component being disposed inside a partial structure which is insulated from adjacent regions. The thickness of the semiconductor body is reduced in the region of the partial structure. As used herein, the term semiconductor component is intended to mean semiconductor device or devices integrated into a semiconductor body.
A method of producing, such a semiconductor structure is disclosed in EP-A-0,193,172. In this instance, a vertical MOS transistor is described which is disposed in a semiconductor body along with a lateral switching circuit. The MOS transistor and the lateral switching circuit are isolated from one another by a p-n junction. It does not follow from EP-A-0,193,172 to integrate a plurality of vertical components in the semiconductor body. A disadvantage in the disclosed type of insulation EP-A-0,193,172 is that the space-charge region present at the p-n junction requires a great deal of space that cannot be used for the insertion of components. Moreover, the doping of the regions lying adjacent to the isolation cannot be freely selected; namely--for obtaining a space-charge region--a p-doped and an n-doped zone must always be present alternatingly so that a p-n junction results. Furthermore, it is disadvantageous that, at a p-n junction, the correct polarity (in the blocking direction) must be heeded, because otherwise the isolating effect of the junction is lost. The permitted potential in the one region is therefore a function of that in the other region--located behind the p-n junction.