1. Field of the Invention
The present invention relates to a method of forming an oxide film and further a method of manufacturing an electronic device utilizing an oxide film.
2. Description of the Prior Art
In recent years, researchers are attracted by thin film transistors utilizing non-single crystalline semiconductor thin films.
Conventionally, such a non-single crystalline semiconductor thin film is formed on an insulating substrate by chemical vapor deposition, so that a temperature during the film formation is as low as 450° C. or less. Therefore, soda-lime glass, boro-silicate glass, and the like can be used as the substrate.
The thin film transistor recently attracting researchers is a field effect transistor (simply referred to as FET) having the same function as that of MOS FET. The size of the thin film transistor is limited only by the size of the apparatus to be used for formation of a semiconductor thin film constituting the transistor, so that it is easy to form transistors on large-sized substrates. Such large-sized thin film transistors are promising. For example, the large-sized thin film transistors can be used as switching elements of liquid crystal displays having a lot of pixels in the form of matrix or switching elements of one dimensional or two dimensional image sensors or the like.
It is possible to implement a conventional fine processing to the semiconductor thin films. Hence, the thin film transistor can be formed by means of a conventional fine processing, for example photolithography technique. And it is also possible to make the thin film transistor integrated as a function element of a part of monolithic IC.
Referring to FIG. 2, a typical structure of a conventional thin film transistor is schematically illustrated.
Source and drain electrodes 24 and 25 are provided on an insulating substrate 20 made of glass and source and drain regions 22 and 23 are provided on the source and drain electrodes 24 and 25 respectively and a non-single crystalline semiconductor thin film 21 is provided on the substrate 20 and a gate insulating film 26 is provided on the semiconductor thin film 21 and a gate electrode 27 is provided on the gate insulating film 26.
In the thin film transistor, electric current flowing between the source region 22 and the drain region 23 is controlled by a voltage applied to the gate electrode 27.
A gate oxide film constituting such a thin film transistor was conventionally formed by exposing a semiconductor material to thermal oxidation or by thermal CVD under a reduced or atmospheric pressure, or the like.
Electric characteristics of the thin film transistor largely depend on the quality of a channel region of the semiconductor film and the quality of the gate insulating film. For this reason, a gate insulating film of particularly good quality has eagerly been required.
In the case of the formation of the gate oxide film by exposing a semiconductor material to thermal oxidation or by thermal CVD under a reduced or atmospheric pressure, the temperature during the formation of the gate insulating film should be as high as approximately 600° C. in order to obtain a thin film transistor of good electric characteristics. So that, a heat-resistant substrate material such as quartz glass had to be utilized though it is expensive.
With respect to a method for forming a gate insulating film at a low temperature, a plasma CVD and a sputtering method utilizing an argon gas for sputtering are well-known. This sputtering method is implemented in an atmosphere comprising a large amount of argon, specifically an atmosphere comprising 100 to 80 volume % Ar atoms and 0 to 10 volume % oxygen. This is because probability of an atom or a cluster of atoms being dislodged from a target by collision of one inert gas atom, for example one Ar atom, is high (in other words, sputtering yield of Ar gas is high). However, in both the plasma CVD and the sputtering method using a large amount of argon, the gate insulating film involves numbers of elements (e.g. inert gas elements such as Ar) which was involved in a target or existed in a chamber during the CVD or the sputtering, resulting in generation of fixed electric charges in the gate insulating film. Further, ions of the elements bombard a surface of an activated layer in a thin film transistor and thereby give a damage thereto. Hereupon, a mixed layer of the activated layer and the gate insulating film is formed in the vicinity of an interface between the activated layer and the gate insulating film. As a result, interfacial level is formed at the interface and a thin film transistor of fine characteristics cannot be obtained by any of those methods.
It has been attempted to form a gate insulating film by a photo CVD method, and an interfacial level density of the gate insulating film was about 2×1010 eV−1 cm−2, almost the same as that of a thermal oxidation film. However, the photo CVD method required a long period of time, in other words, the film formation speed was extremely slow, so that the photo CVD method was not suitable for an industrial application.
Referring now to FIG. 7, a network of silicon oxide formed by sputtering in an atmosphere comprising a large amount of argon is illustrated. Symbols 0 in the drawing indicate oxygen or silicon and symbols X indicate dangling bonds of silicon. A silicon oxide film including a gate insulating film is not dense when quantity of fixed electric charges is large in the silicon oxide film. The larger the number of dangling bonds of silicon in the silicon oxide film is, the larger the quantity of fixed electric charges is. And the larger the number of Ar+ in the silicon oxide film is, the larger the quantity of fixed electric charges is. Ar+ and Ar tend to stay inside the silicon oxide network as illustrated in FIG. 7 (Ar+ and Ar do not tend to be substituted for Si or 0 in the network). In fact, numbers of dangling bonds of silicon tend to be generated in the silicon oxide film when the silicon oxide film is formed by sputtering in an atmosphere comprising a large amount of argon. This is partly because internal stress is generated in the silicon oxide film by Ar or Ar+ present inside the silicon oxide network and partly because defects are formed in the silicon oxide film by bombardment of argon with the silicon oxide film during sputtering.