1. Field of the Invention
The present invention relates to a semiconductor device having a silicon-on-insulator (SOI) structure and a method for fabricating the same, and more particularly, to a method for fabricating a semiconductor device wherein a side wall oxide film or polysilicon layer is formed on the edge of an insulating film adapted to insulate the side wall of an active semiconductor substrate of the semiconductor device from a gate oxide film of the semiconductor device.
2. Description of the Prior Art
In the fabrication of semiconductor devices, formation of a SOI structure is involved to achieve an isolation between adjacent elements, thereby obtaining a superior electrical characteristic. Such a SO structure is made by forming a silicon oxide film as an insulator on an under silicon substrate and forming another silicon substrate (to be used as an active substrate), for example, a single-crystalline silicon layer on the silicon oxide film.
Referring to FIGS. 1A and 1B, a conventional SOI structure is illustrated.
FIG. 1A is a view showing the layout of a metal oxide silicon field effect transistor (MOSFET) having the SOI structure. In FIG. 1A, respective positions of masks for an active region 1 and a gate electrode 2 on a silicon substrate (not shown) are shown.
FIG. 1B is a cross-sectional view taken along the line I--I of FIG. 1A. A silicon oxide film 4 is deposited over a silicon substrate 3. A second silicon substrate 5 having a trapezoidal cross-sectional structure is formed on the silicon oxide film 4. On a desired portion of the resulting structure, a gate oxide film 6 and a gate electrode 7 are sequentially formed.
As shown in FIG. 1B, the second silicon substrate 5 has an inclined structure in that its thickness at the edge of the active region is smaller than its thickness d.sub.si at the middle portion of the active region. Due to such a structure, the depth of the depletion region is limited to the thickness of the second silicon substrate 5. As a result, the charge Q.sub.B of depleted bulk is limited by the thickness of the second silicon substrate 5, thereby decreasing the threshold voltage of the semiconductor device, as expressed the following equations: EQU V.sub.T =V.sub.FB +Q.sub.B /C.sub.OX (1) EQU C.sub.OX =.epsilon..sub.OX /t.sub.OX (2)
where, V.sub.T represents the threshold, V.sub.FB the flat band voltage, Q.sub.B the bulk charge, C.sub.OX the capacitance of the oxide film, .epsilon..sub.OX the dielectric constant of the oxide film, and t.sub.OX the thickness of the gate oxide film.
Equation (1) shows that it is impossible to increase the threshold voltage at the lower edge portion 8 of the second silicon substrate 5 even when the impurity doping rate at that portion increases. This implies a difference in threshold voltage between the middle portion and edge portion of the second silicon substrate 5. The drain current characteristic thus involves a point of inflexion when it varies in accordance with a variation in gate voltage, as shown in FIG. 2. As a result, it is difficult to control the threshold voltage of the semiconductor device having the SOI structure. Furthermore, the characteristic of the SOI element depends on the edge shape of the second silicon substrate 5. This results in a great variation in the characteristics of the semiconductor device.