In the field of image processing, neighborhood masks are commonly employed when it is necessary to consider the environment of a pixel to be processed. A neighborhood mask is defined as a selection area in the image. With the changes in image processing, the neighborhood masks are becoming increasingly extensive. At the same time, the research and development and manufacturing costs of architectures supporting image processing place major constraints on their development in terms of silicon surface area and electricity consumption, notably when these architectures are designed for embedded applications intended for the general public. The issue in this field is therefore to have open-ended and flexible computation architectures which, given the same circuit, are capable of supporting the existing processing operations as well as those to come whose computational complexity will be greater. One of the known solutions for meeting these needs consists in using modular architectures, based on stream processing units each comprising a set of neighborhood processors operating in parallel on neighboring data. A first exemplary architecture is described in the patent application EP 08 05369. Each processing unit comprises a set of processors and a storage unit containing all the neighborhoods accessible to the processors. However, a processor can access only the neighborhood which is assigned to it. Furthermore, the dimension of the storage unit is fixed. Consequently, the size of the neighborhoods accessible to the processors is limited to that provided at the time of the design of the circuit. A second exemplary architecture is proposed by the Korea Advanced Institute of Science and Technology and described in K. Kim et al., “A 125 GOPS 583 mW Network-on-Chip based parallel processor with bio-inspired visual attention engine”, IEEE Journal of Solid-State Circuits, vol. 44, no. 1, January 2009. Each processing unit comprises a set of processors and a local memory. Each processor has full access to the local memory of the processing unit to which it belongs. The local memories of different processing units can communicate with one another and each processor can communicate with left and right neighboring processors, including if a neighboring processor is located in another processing unit. These communications between local memories and between processors make it possible to extend the size of the neighborhoods accessible to the processors. The architecture is, however, ill suited to such a use: on the one hand, the communication from processor to left/right neighboring processor between processing units allows only one datum to be exchanged per cycle, which in practice limits the extension of the size of the neighborhoods. Also, the communication from local memory to local memory entails overwriting at least a portion of the data present in one of the local memories, which constrains the order in which the data must be processed.