1. Field of the Invention
The invention relates to a digital switching stage having a differential amplifier with a first and a second differential amplifier branch; a first resistor which is connected in the first differential amplifier branch has a first terminal that is a terminal for a first supply potential and has a second terminal; and a first bipolar transistor which is connected in an emitter follower circuit with respect to the second terminal of the first resistor has an emitter which is connected to an output terminal.
Such a switching stage is shown in the literature, such as in an article by George R. Watson, entitled "Advances in Bipolar VLSI", in Proceedings of the IEEE, Vol. 78, No. 11, pp. 1706-1719, November 1990. An output of the switching stage is essentially capacitively loaded by a connecting line connected to it. At a positively oriented edge of the output signal, the current required to reverse the charge of the parasitic capacitance which is operative on the output side flows through the emitter follower transistor. That is, the charge reversing current is furnished at low impedance by the first supply potential source. At a negatively oriented output signal edge, the charge reversing current flows either through one additional current source or through the input of a further switching stage connected to the output side. The current is furnished at high impedance from a further supply potential source.
In order to achieve a high operating speed, the switching stages must have adequate driver capability and a high permanent current therefore flows through the additional current source or the following switching stage. The power loss is correspondingly high.
2. Summary of the Invention
It is accordingly an object of the invention to provide a digital switching stage with a current switch, which overcomes the hereinafore-mentioned disadvantages of the hereto-fore-known devices of this general type and which has a high processing speed and a low power loss.
With the foregoing and other objects in view there is provided, in accordance with the invention, a digital switching stage, comprising a differential amplifier having a first and a second differential amplifier branch; a terminal for a first supply potential, a terminal for a second supply potential, and an output terminal; a first resistor being connected in the first differential amplifier branch and having a first terminal and a second terminal, the first terminal being the terminal for the first supply potential; a first bipolar transistor being connected in an emitter follower circuit with respect to the second terminal of the first resistor and having an emitter being connected to the output terminal; a second bipolar transistor having a base and having a collector-to-emitter path being connected between the output terminal and the terminal for the second supply potential; and a second resistor being connected in the second differential amplifier branch and having a first terminal and a second terminal, the first terminal of the second resistor being connected to the output terminal, and the second terminal of the second resistor being connected to the base of the second bipolar transistor.
In the switching stage according to the invention, for both the leading and the trailing output signal edges, the charge reversing current of the parasitic capacitance that is operative on the output side is furnished at low impedance from the supply potential forces. The input and output signal levels are symmetrical to the supply potentials. In comparison with the conventional switching stage, the supply voltage is lower, so that the lower loss is further reduced thereby.
In accordance with another feature of the invention, there is provided a current source transistor having a collector-to-emitter path, the differential amplifier including a first and at least one second switching transistor having mutually coupled emitters being connected through the collector-to-emitter path of the current source transistor to the terminal for the second supply potential.
In accordance with a further feature of the invention, there is provided a voltage divider connected between the terminals for the supply potentials for supplying the base of the first switching transistor with a reference potential.
In accordance with an added feature of the invention, the voltage divider includes a first diode having an anode connected to the terminal for the first supply potential and having a cathode; a second diode having a cathode connected to the terminal for the second supply potential and having an anode; a first resistor connected between the cathode of the first diode and the base of the first switching transistor; and a second resistor connected between the base of the first switching transistor and the anode of the second diode.
In accordance with an additional feature of the invention, the base of the current source transistor is connected to the anode of the second diode.
In accordance with yet another feature of the invention, the first and second resistors of the voltage divider have the same given resistance.
In accordance with yet a further feature of the invention, the first and second resistors of the differential amplifier each have the same resistance being twice the given resistance.
In accordance with a concomitant feature of the invention, the resistance of the first resistor of the differential amplifier is greater than the resistance of the second resistor of the differential amplifier, and the resistances of the first and second resistors of the differential amplifier are each greater than twice the given resistance.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a digital switching stage with a current switch, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.