1. Field of the Invention
The present invention relates to a semiconductor device and, more particularly, to a semiconductor device having a structure in which a semiconductor chip is covered with an encapsulating resin layer.
2. Description of the Related Art
Semiconductor devices such as a large-scale integrated circuit (LSI) are required to have high speed. To meet this requirement, it is recently being attempted to use low-resistivity materials as wires and decrease the relative dielectric constant of an interlayer insulating film. More specifically, the wiring material is being changed from Al to Cu. Also, as an interlayer insulating film, it is being considered to use a so-called “low-k film”, such as a fluorine-doped SiO2 film or an SiO2 film containing an organic component, which has a relative dielectric constant smaller than that of a dense and pure SiO2 film. Note that “an interlayer insulating film having a relative dielectric constant smaller than that of an SiO2 film” used in this specification and in the scope of claims means “a low-k film”.
The relative dielectric constant of an interlayer insulating film can be decreased by making the density of the film lower than the intrinsic density of the material, or by eliminating the dielectric polarization in the material.
For example, a low-density insulating film is generally obtained by making the material porous. The relative dielectric constant of an insulating film thus obtained is made smaller than the intrinsic relative dielectric constant of the material by pores in the insulating film. Unfortunately, these porous insulating films generally have low mechanical strength.
In addition, an insulating film from which the dielectric polarization is eliminated has low adhesion to another insulating film. That is, in a structure in which a plurality of interlayer insulating films including an interlayer insulating film having a low relative dielectric constant are stacked, peeling readily occurs at the interfaces between the insulating films.
The low mechanical strength and low adhesion of an interlayer insulating film pose problems such as film peeling in steps in which heating is performed. Examples are packaging of a semiconductor chip including a multilayer interconnection structure, mounting the obtained semiconductor package on a printed wiring board, and a temperature cycling test (TCT). This is so because in these heating steps, a thermal stress caused by a difference in coefficient of linear expansion between a semiconductor substrate and an encapsulating resin layer is applied to the multilayer interconnection structure to destroy or peel an interlayer insulating film.
Jpn. Pat. Appln. KOKAI Publication No. 9-246464 describes a semiconductor package in which a semiconductor chip is mounted on a wiring substrate via insulating resin by flip chip bonding, and the obtained structure is encapsulated with an encapsulating resin. In this semiconductor package, the insulating resin covers the side surfaces of the semiconductor chip. Jpn. Pat. Appln. KOKAI Publication No. 9-246464 also describes that a resin having Young's modulus smaller than that of the encapsulating resin is used as the insulating resin. The invention described in Jpn. Pat. Appln. KOKAI Publication No. 9-246464 can prevent, by the use of this structure, destruction of connecting portions occurring between the semiconductor chip and wiring substrate owing to, e.g., the thermal stress of the encapsulating resin.