1. Field of the Invention
The present invention relates to a method of driving a gate line, a gate drive circuit and a display apparatus having the gate drive circuit. More particularly, the present invention relates to a method of driving a gate line in which reliability of an operation thereof is substantially enhanced, a gate drive circuit performing the method and a display apparatus having the gate drive circuit.
2. Description of the Related Art
Generally, a liquid crystal display (“LCD”) apparatus includes an LCD panel which displays images by controlling a light-transmitting ratio of liquid crystal molecules provided with light from a backlight assembly disposed below the LCD panel.
The LCD apparatus typically includes a display panel, a gate driving part and a data driving part. The display panel includes gate lines, data lines and pixel parts electrically connected to the gate lines and the data lines. The gate driving part outputs gate signals to the gate lines. The data driving part outputs data signals to the data lines. The gate driving part and the data driving part may be formed in a chip mounted on the display panel.
In efforts to decrease a size of the LCD apparatus and to improve manufacturing productivity of the LCD apparatus, the gate driving part has been integrated on a display substrate such as an amorphous silicon gate (“ASG”) type substrate. However, when a gate drive circuit integrated on the display substrate is driven at a high temperature, noise from an abnormal gate on signal is generated during a gate off signal interval is generated.
In addition, properties of an amorphous silicon thin-film transistor (“a-Si TFT”) of the gate drive circuit vary with changes in temperature and over time.
As a result, a gate bias stress applied to a TFT in the gate drive circuit generates a threshold voltage shift when the gate drive circuit is driven. The threshold voltage shift substantially reduces a current driving ability of a hold transistor which is included in the gate drive circuit to maintain an off level of a gate line and a gate terminal of a pull-up transistor which outputs a gate signal.