1. Technical Field
The present disclosure relates generally to integrated circuit (IC) design. More particularly, and not by way of any limitation, the present disclosure is directed to an architecture and associated system and method for compressing repair data in an IC design having a plurality of memory instances.
2. Description of Related Art
Modern integrated circuits (ICs) such as application-specific ICs or ASICs may contain a large number of repairable memories. It is not uncommon to have 1000-2000 memories in some ASIC implementations. In such cases storing reconfiguration data to repair the memories may require upwards of 10,000 to 20,000 bits. Usually, this data may be split into multiple containers (e.g., banks of fuses) across the chip area. However, in some cases allocation of such a large container on an IC may not be possible.