The present invention relates to a semiconductor memory device and a manufacturing method thereof. More particularly, the present invention relates to a ferroelectric memory device in which a ferroelectric film is used for a gate insulating film and a manufacturing method thereof.
Recent advances in thin-film technology have produced nonvolatile memory devices using ferroelectric films (i.e., ferroelectric memory devices), which can perform high-speed read/write operations by using the polarization reversal and retention characteristics of the ferroelectric film. Since the polarization reversal of a ferroelectric film is caused by a transition at the atomic level, a ferroelectric memory device operates 10.sup.4 -10.sup.5 times faster than other types of nonvolatile memories (e.g., EEPROM or flash memory devices) and thus can achieve read-cycle speeds comparable to that of a DRAM device, i.e., in the hundreds of nanoseconds. Also, since polarization reversal only requires a low supply voltage, e.g., two to five volts, the memory device does not require the higher supply voltage, e.g., ten to twelve volts, necessary for EEPROM or flash memory read operations.
Broadly speaking, there are two types of conventional ferroelectric memory devices: one which detects the amount of charge stored in a capacitor and one which detects a change in the resistance caused by the spontaneous polarization of a ferroelectric.
The first type comprises two transistors and two capacitors or of a single transistor-capacitor pair. Memory devices of this type are widely adopted in DRAM devices and are generally formed of CMOS transistors, with a thick interlayer insulating film separating the transistors from a ferroelectric capacitor formed on top. In this structure, although the impact of the ferroelectric electrode material on the underlying CMOS device can be reduced, a destructive read-out problem persists in that the stored data is ultimately destroyed by being read. This destructive read-out becomes of greater concern as the number of read/write operations in a memory device increases.
The second type of ferroelectric memory device endeavors to overcome this destructive read-out problem. An example of the second type of ferroelectric memory device is called a metal-ferroelectric insulator semiconductor field-effect transistor (MFIS FET). Such a device provides for nondestructive read-out, which makes it appropriate for increased read/write operations. In principle, this type of memory device, which has a single transistor compared to a DRAM having both a transistor and a capacitor, reduces the cell area without altering the cell structure in accordance with typical MOS FET scaling rules. Moreover, its read time need not be as long as that of a flash memory which is a nonvolatile memory, and data can be retained after a read-out operation. The memory device employs a metal-insulator-semiconductor (MIS) structure using a ferroelectric film as a gate insulating film, in which a read-out operation is performed by forming an inversion layer in a channel region of a transistor. The inversion layer is formed by controlling the potential on a silicon interface based on the polarization retention of a ferroelectric.
However, there are additional problems encountered with the use of the MFIS FET. The major problem derives from the fact that in the MFIS FET a ferroelectric film is formed directly on a silicon semiconductor substrate. When an oxide ferroelectric film, such as PZT (PbZr.sub.x T.sub.1-x O.sub.3), is formed directly on a silicon substrate, oxygen atoms are injected from the oxygen-rich ferroelectric film into its interface with the silicon substrate, thereby resulting in the formation of a superfluous thin film, e.g., an SiO.sub.2 film. As a result, either the composition ratio of the ferroelectric film is locally destroyed, or a higher operating voltage is required. Furthermore, charged particles are injected into the film by trap levels resulting from stress of the ferroelectric film, thereby erasing the charge produced by polarization retention. Also, if the film is formed at a high temperature, constituents of the ferroelectric are apt to diffuse into the silicon substrate and alter the characteristics of the field effect transistor. In addition, if a non-oxide ferroelectric, e.g., BaMgF.sub.4, were used instead of an oxide ferroelectric, fluorine ions are apt to penetrate into the gate insulating film, resulting in the elimination of the polarization characteristics.
Accordingly, since a ferroelectric film is not compatible with a silicon substrate in terms of lattice constant and thermal expansion coefficient, it is very difficult to form a high-quality ferroelectric film on the silicon substrate. Furthermore, to form the source/drain regions by self-alignment, a film showing tolerance to a thermal process at approximately 1,000.degree. C. would be required.
In an effort to solve the above problems, an MFIS FET in which a PbTiO.sub.3 film is deposited on a CeO.sub.2 film and aluminum is used for the electrodes has recently been reported. FIG. 1 is a sectional view showing a conventional MFIS FET using a CeO.sub.2 film.
Referring to FIG. 1, the MFIS FET includes a p-type silicon substrate 1, a field oxide film 2, a source/drain region 3, a CeO.sub.2 film 5, a PbTiO.sub.3 ferroelectric film 6, and an aluminum gate electrode 7. In this device, the hetero-epitaxial growth of PbTiO.sub.3 ferroelectric film 6 is realized by using the CeO.sub.2 film 5 as a gate insulating film. Since the forming of the gate electrode in this structure occurs after high-temperature process of forming the ferroelectric film, aluminum can be used as the electrode material and the structure becomes suitable for integration. Thus, the MFIS FET can be applied to a memory device.
However, although the CeO.sub.2 film 5 shown in FIG. 1 exhibits little lattice mismatching (approximately 0.35%) with a (111) substrate, it has no great advantage with respect to a (100) substrate. Furthermore, the electrical characteristics of this MFIS FET have not been completely verified.