1. Field of the Invention
The present invention relates generally to a magnetic random access memory (MRAM), and more particularly to a memory cell architecture in an MRAM that includes magnetic memory cells, each of which is formed using an element that stores “0”/“1” data by tunneling magnetoresistive effect.
2. Description of the Related Art
In recent years, a variety of memories, which store data based on novel principles, have been proposed. Of these, there is known an MRAM with nonvolatility and high operation speed, wherein magnetic memory cells, each of which is formed using a magnetic tunnel junction (MTJ) element that stores “0”/“1” data by tunneling magnetoresistive (TMR) effect, are arranged in a matrix.
FIG. 14 schematically shows a cross-sectional structure of an MTJ element 70 that is used in a conventional MRAM.
FIGS. 15A and 15B illustrate two states of the directions of spin in two magnetic layers 71 and 72 of the MTJ element 70 shown in FIG. 14.
The MTJ element 70 is configured such that one non-magnetic layer (tunneling barrier film) 73 is interposed between two magnetic layers 71 and 72. The MTJ element 70 stores “0”/“1” data, depending on whether the directions of spin of the two magnetic layers 71 and 72 are parallel, as shown in FIG. 15A, or antiparallel, as shown in FIG. 15B.
Normally, an antiferromagnetic layer 74 is disposed on one of the two magnetic layers 71 and 72. When the layer 74 is disposed on the layer 72, the antiferromagnetic layer 74 fixes the direction of spin of the magnetic layer 72. Thus, data can easily be rewritten by changing only the direction of spin of the other magnetic layer 71. The variable-spin side magnetic layer 71 is referred to as a “free layer”, and the fixed-spin side magnetic layer 72 is as a “fixed layer” (or “pinned layer”).
As is shown in FIG. 15A, when the directions of spin (indicated by arrows) in the two magnetic layers 71 and 72 are parallel (the same), the tunnel resistance of the tunneling barrier film 73 that is sandwiched between the two magnetic layers 71 and 72 decreases to a minimum (tunneling current increases to maximum).
As is shown in FIG. 15B, when the directions of spin in the two magnetic layers 71 and 72 are antiparallel, the tunnel resistance of the tunneling barrier film 73 that is sandwiched between the two magnetic layers 71 and 72 increases to a maximum (tunneling current decreases to minimum).
FIG. 16 schematically shows an example of a plan-view layout of a memory cell array of an MRAM that incorporates conventional memory cells. This example illustrates an architecture in a data write mode.
A plurality of write word lines WWL and a plurality of bit lines BL are arranged perpendicular to each other. At intersections of these lines, memory cells each comprising an MTJ element are disposed. Each MTJ element has rectangular shape with a longitudinal axis extending along the write word line WWL, and with a transverse axis extending along the bit line BL. The direction of spin, which is parallel to the longitudinal axis, is given to the MTJ element. In the MRAM, two states with different resistance values of the MTJ element are associated with a “1” data storage state (“1” state) and a “0” data storage data (“0” state), respectively.
FIG. 17 is a cross-sectional view, taken along line 15—15 in FIG. 16, showing an example of the structure of, in particular, one memory cell in a cross section perpendicular to the write word line WWL.
FIG. 18 is a cross-sectional view, taken along line 16—16 in FIG. 16, showing an example of the structure of the memory cell in a cross section perpendicular to the bit line BL.
In FIGS. 17 and 18, reference numeral 10 denotes a semiconductor substrate (e.g. P-type Si substrate); 11 a shallow-trench device isolation region (STI); 12 a gate oxide film; 13 an impurity diffusion layer (N+) that functions as a drain region or a source region of a read-out cell select transistor Tr (NMOSFET); 14 a gate electrode (GC); 15 a first metal wiring layer (M1); 16 a second metal wiring layer (M2); 17 an MTJ connection wire formed of a third metal wiring layer (M3); 18 a conductive contact for electrically connecting the first metal wiring 15 to the diffusion layer 13; 19 a conductive contact for electrically connecting the second metal wiring layer 16 to the first metal wiring layer 15; 20 a conductive contact for electrically connecting the third metal wiring layer 17 to the second metal wiring layer 16; 70 an MTJ element; 22 a fourth wiring layer (M4); 23 a conductive contact for electrically connecting the fourth metal wiring layer 22 to the MTJ element 70; and 24 an interlayer insulation film.
In the Figures, the uses of the respective wiring layers are defined as follows: (BL) is a bit line for write/read, (WWL) is a write word line, (SL) is a source line, and (RWL) is a read-out word line. The source line (SL) is connected to a ground potential.
Now referring to FIG. 14 to FIG. 18, the operational principle of data write to the prior-art MTJ element 70 is described.
Data write to the MTJ is performed in the following manner. As is shown in FIG. 16, write currents in directions, for example, indicated by arrows, are let to flow in the write word line WWL and bit line BL. Using a composite field of magnetic fields Hy and Hx generated by these currents, the direction of spin of the free layer 71 can be set to be parallel or antiparallel, relative to the pinned layer 72. Thereby, data is written.
For example, when data is written to the MTJ element 70 shown in FIG. 16, a current in a first direction or in a second direction, which is opposite to the first direction, is supplied to the bit line BL in accordance with write data, thereby generating a magnetic field Hx. A current in a fixed direction is supplied to the write word line WWL, thereby generating a magnetic field Hy. Using a composite field produced by the magnetic fields Hx and Hy, data is written. In this case, if the current in the first direction is supplied to the bit line BL, the directions of spin in the MTJ element 70 become parallel. If the current in the second direction is supplied, the directions of spin become antiparallel. FIG. 16 illustrates the case where the direction of spin in the free layer 71 is made parallel to the direction of spin in the pinned layer 72 by the composite field.
When data is read out of the MTJ element 70, the read-out word line RWL shown in FIGS. 17 and 18 are activated to turn on the transistor Tr that is the switching device connected to the selected MTJ element 70. Thus, a current path is formed and a current is let to flow from the selected bit line BL to ground potential. As a result, a current corresponding to the resistance value of the selected MTJ element 70 flows only through the MTJ element 70. By detecting the current value, the data can be read out.
Referring to FIGS. 19 and 20, how the direction of spin in the MTJ element 70 is selected by the direction of applied field is described in brief.
FIG. 19 shows variation characteristics (MTJ curve) of resistance value due to reversal of applied field in the MTJ element 70.
FIG. 20 shows an asteroid curve of the MTJ element 70.
As indicated by the MTJ curve in FIG. 19, when a magnetic field Hx is applied in an easy-axis direction of the MTJ element, the resistance value (magnetoresistance (MR) ratio) of the MTJ element 70 changes by, e.g. about 17%. The ordinate in FIG. 17 expresses the resistance value of the MTJ element 70 as a change ratio (i.e. resistance ratio between pre-change and post-change). The MR ratio varies depending on the properties of the magnetic layers of the MTJ element 70. At present, an MTJ element with an MR ratio of about 50% is obtained. A composite field of an easy-axis field Hx and a hard-axis field Hy is applied to the MTJ element 70.
As shown by solid lines and broken lines in FIG. 19, the magnitude of the easy-axis field Hx, which is necessary for changing the resistance value of the MTJ element 70, varies depending on the magnitude of the hard-axis field Hy. The broken lines indicate MTJ curves in cases where the hard-axis field Hy is greater than in the case of the solid lines. Making use of this phenomenon, data can be written to only the MTJ element 70 in the arrayed memory cells, which is disposed at the intersection of the selected write word line WWL and selected bit line BL.
As is shown in FIG. 20, if the magnitude of the composite field of the easy-axis field Hx and hard-axis field Hy falls outside the asteroid curve (e.g. locations indicated by black circular marks), the direction of spin in the magnetic layer of the MTJ element 70 can be reversed.
On the other hand, if the magnitude of the composite field of the easy-axis field Hx and hard-axis field Hy falls inside the asteroid curve (e.g. locations indicated by white circular marks), the direction of spin in the magnetic layer of the MTJ element 70 cannot be reversed.
Accordingly, the data write to the MTJ element 70 can be controlled by varying the magnitude of the composite field of the easy-axis field Hx and hard-axis field Hy and changing the position of the magnitude of the composite field in the Hx-Hy plane.
In the above-described prior-art cell architecture shown in FIG. 15, however, the MTJ element 70 is stacked via many metal layers that are provided above the read-out cell select transistor Tr. This complex stacked structure requires many conductor layers and interlayer insulation film, including eight metal wiring layers 18, 15, 19, 16, 20, 17, 23 and 22 and one MTJ element 70. Consequently, a great number of fabrication steps are needed, and it is difficult to provide an MRAM at low cost.