Silicon (Si) nanowires, due to their potential of surpassing conventional lithography limitations and tuning their chemical and physical properties at the nanometer scale during growth, are attractive building blocks for high-performing functional electronic devices. While extensive research has been devoted to developing methods to assemble and integrate Si nanowires into planar functional devices, limited efforts have been devoted to the device integration of vertical Si wire arrays (both nanowires and microwires) even though such wire arrays are desirable for applications ranging from sensors, solar cells, thermoelectric devices, Li-ion batteries to vertical field-effect transistors.
Si wire arrays with lengths of a few to tens of micrometers are usually formed by the deposition of vapor onto a Si wafer that is about 500 microns thick, rigid, and opaque, or by the chemical etching of such a wafer. Separation of the resulting Si wire arrays from the parent Si wafer allows the electrical, thermal, optical and mechanical properties of the Si wire arrays to be isolated and harnessed in devices without being overshadowed by the properties of the thick parent Si wafer, and allows the transfer of the Si wire arrays to other flexible, lightweight, low cost or transparent substrates for enhanced device functionality. A key condition for the separation and transfer of Si wire arrays is the preservation of their original properties and orientation. A range of techniques have been proposed for the separation of vertical Si wire arrays from their parent Si wafers, which rely on the mechanical breakage of the Si wires by the application of peeling forces, direct shear forces, or the creation of a horizontal porous crack within the Si wires. However, these techniques rely upon encapsulation of the Si wires in a polymer host so that the Si wires are held together during the mechanical breaking process, and the presence of the polymer host makes it difficult to use the separated Si wires for applications that benefit from an exposed Si surface, such as for Ohmic contacts to metal electrodes, sensors or catalysts. In addition, some of these techniques are restricted to Si wires of certain geometries or those made by particular methods.
It is against this background that a need arose to develop the electro-assisted technique described herein.