1. Field of the Invention
The present invention relates to a data transmission system, a data recording and reproducing apparatus, and a recording medium each having a data structure of error correcting code, a data structure for use in a recording medium, a method for arranging a parity of an error correction code, a method for transmitting information data, a method for receiving information data, a method for recording information data in a recording medium, and a method for reproducing information data from a recording medium.
In particular, the present invention relates to a data transmission system for transmitting data through a communication line, a data recording and reproducing apparatus for recording data into a recording medium and reproducing data from the recording medium, and a recording medium such as an optical disk, a magneto-optical disk, a magnetic disk, a compact disk, a magnetic tape, a semiconductor memory, or the like, each of the data transmission system, the data recording and reproducing apparatus, and the recording medium having a data structure of error correcting code, a data structure for use in a recording medium, a method for arranging a parity of an error correcting code, a method for transmitting information data, a method for receiving information data, a method for recording information data in a recording medium, and a method for reproducing information data from a recording medium.
2. Description of the Prior Art
When transmitting and recording a great amount of digital data, an error correcting code (referred to as an ECC hereinafter) is widely used for the purpose of improving the reliability of the data.
The ECC word generated by attaching a parity to an original data, and then, the redundancy of the data having the parity increases, however, the ECC has the capabilities of detecting and correcting errors generated in the process of transmitting, recording and reproducing the data.
In general, the ECC has a higher error correcting capability when the ECC word has an increased redundancy, i.e., when the ECC word includes a greater amount of parity symbols. Therefore, the ECC word includes a plurality of parity symbols or bytes.
Conventionally, when ECC encoding a great amount of data upon transmitting or recording the data, the data is previously divided into a plurality of blocks each having a predetermined length, and a parity is attached to each block. Then, the parity is arranged at the tail of the block to be corrected, generally. That is, in the conventional process of data transmission, the data has been transmitted with the parity added to the tail of each data block. On the other hand, in the data recording process, the parity has been recorded in a position adjacent to each data block.
An arrangement of the data and the parity of the ECC word in the conventional data recording method is concretely shown in FIG. 1.
FIG. 1 shows a logical data format of one block of an optical disk in which data and a parity are recorded by a prior art method for arranging the parity of the ECC.
The block is divided into a data area 90, a row parity area 54, and a column parity area 53, depending on the type of information data recorded. In the present case, the parity is a part of the ECC word. As is apparent from FIG. 1, the row parity area 54 and the column parity area 53 are partially overlapped with each other.
One block is comprised of 156 data frames 51 and 12 parity frames. In the present case, the frame 51 means a group of data or parities corresponding to one row of each block, and constructs an ECC word in the row direction.
Each data frame 51 is comprised of data of 158 bytes and a row parity of 10 symbols each of which consists of one byte (referred to as a C1 parity hereinafter) for error correction of the data. Then, thirteen data frames constitute one sector 52. Therefore, one block is comprised of twelve sectors 52 in this case. At the head of each sector 52 is written a physical sector address 50 of each sector 52 (referred to as a sector address hereinafter). Further, it is noted that a synchronous (Sync) pattern (not shown) is generally added to the head of each frame.
In the column parity 53, twelve bytes in the direction of column constitute one parity (referred to as a C2 parity hereinafter), and the parity is used for correcting an error of the 156-byte data series located upward in an identical column. The above-mentioned 156-byte data and 12-byte parity construct an ECC word in the column direction. FIG. 1 shows a logical format of one block, and the block is physically written continuously in a sequence from the frame located in the uppermost position of the block onto a track of an optical disk in a manner as shown in FIG. 2. Therefore, paying attention to the data series in the direction of column, data are discretely arranged on the disk, and this arrangement is referred to as an interleave.
Thus, conventionally, in both of (a) the data arrangement in the direction of row, i.e., the data series which is not interleaved and (b) the data arrangement in the direction of column, i.e., the data series which is interleaved, the data area 90 in which data is arranged and the parity area 91 in which the parity is arranged have been clearly distinguished from each other.
However, according to the recent trend of increasing the storage capacities and reducing the access times of optical disks, upon reading out data from any optical disk in which the data have been written by the prior art arrangement method, there have been such problems as follows.
Attention is now paid to timings for detecting sector addresses upon continuously reading out information along a track. FIG. 3 shows the timings for the above operation. In this case, the information data is sequentially read out from the frame located in the uppermost position of the block shown in FIG. 1, and therefore, the twelve sector addresses are detected at a predetermined regular time interval. However, since the twelve column parity frames of the column parity 53 are subsequently read out, and therefore, a certain time interval continues for which no sector address is detected continues. Thereafter, the next block is read out, and then, the similar phenomenon occurs repetitively.
Thus, according to the conventional method for arranging the parity of the ECC, the timings for detecting the sector addresses becomes irregular. Therefore, upon retrieving a desired sector address, a complicated control circuit and a complicated calculator circuit are necessary, and this leads to a cause of retarding the time of reading-out. In this case, for example, by providing only the row parity without adding the column parity itself, the timings for detecting the sector addresses can be made regular. However, with only the row parity, the data correcting capability is reduced to impair the reliability of the recorded data.