1. Field of the Invention
The invention in general relates to the fabrication of layered superlattice materials, and more particularly to a fabrication method using unreactive gas annealing and a low temperature pretreatment to reduce exposure of an integrated circuit to oxygen at elevated temperature.
2. Statement of the Problem
Ferroelectric compounds possess favorable characteristics for use in nonvolatile integrated circuit memories. See Miller, U.S. Pat. No. 5,046,043. A ferroelectric device, such as a capacitor, is useful as a nonvolatile memory when it possesses desired electronic characteristics, such as high residual polarization, good coercive field, high fatigue resistance, and low leakage current. Layered superlattice material oxides have been studied for use in integrated circuits. U.S. Pat. No. 5,434,102, issued Jul. 18, 1995, to Watanabe et al., and U.S. Pat. No. 5,468,684, issued Nov. 21, 1995, to Yoshimori et al., describe processes for integrating these materials into practical integrated circuits. Layered superlattice materials exhibit characteristics in ferroelectric memories that are orders of magnitude superior to alternative types of ferroelectric materials, such as PZT and PLZT compounds.
Integrated circuit devices containing ferroelectric elements with layered superlattice materials are currently being manufactured. A typical ferroelectric memory cell in an integrated circuit contains a semiconductor substrate and a metaloxide semiconductor field-effect transistor (xe2x80x9cMOSFETxe2x80x9d) in electrical contact with a ferroelectric device, usually a ferroelectric capacitor. A ferroelectric memory capacitor typically contains a thin film of ferroelectric metal oxide located between a first, bottom electrode and a second, top electrode, the electrodes typically containing platinum. Layered superlattice materials comprise metal oxides. In conventional fabrication methods, crystallization of the metal oxides to produce desired electronic properties requires heat treatments in oxygen gas at elevated temperatures. The heating steps in the presence of oxygen are typically performed at a temperature in the range of from 800xc2x0 C. to 900xc2x0 C. for 30 minutes to two hours. As a result of the presence of reactive oxygen at elevated temperatures, numerous defects are generated in the single crystal structure of the semiconductor silicon substrate, leading to deterioration in the electronic characteristics of the MOSFET. Good ferroelectric properties have been achieved in the prior art using process heating temperatures at about 700xc2x0 C. to crystallize layered superlattice material. See U.S. Pat. No. 5,508,226, issued Apr. 16, 1996, to Ito et. al. Nevertheless, the annealing and other heating times in the low-temperature methods disclosed in the prior art are in the range of three to six hours, which may be economically unfeasible. More importantly, the long exposure time of several hours in oxygen, even at the somewhat reduced temperature ranges, results in oxygen damage to the semiconductor substrate and other elements of the CMOS circuit.
After completion of the integrated circuit, the presence of oxides may still cause problems because oxygen from the thin film tends to diffuse through the various materials contained in the integrated circuit and combine with atoms in the substrate and in semiconductor layers forming oxides. The resulting oxides interfere with the function of the integrated circuit; for example, they may act as dielectrics in the semiconducting regions, thereby virtually forming capacitors. Diffusion of atoms from the underlying substrate and other circuit layers into the ferroelectric metal oxide is also a problem; for example, silicon from a silicon substrate and from polycrystalline silicon contact layers is known to diffuse into layered superlattice material and degrade its ferroelectric properties. For relatively low-density applications, the ferroelectric memory capacitor is placed on the side of the underlying CMOS circuit, and this may reduce somewhat the problem of undesirable diffusion of atoms between circuit elements. Nevertheless, as the market demand and the technological ability to manufacture high-density circuits increase, the distance between circuit elements decreases, and the problem of molecular and atomic diffusion between elements becomes more acute. To achieve high circuit density by reducing circuit area, the ferroelectric capacitor of a memory cell is placed virtually on top of the switch element, typically a field-effect transistor (hereinafter xe2x80x9cFETxe2x80x9d), and the switch and bottom electrode of the capacitor are electrically connected by a conductive plug. To inhibit undesired diffusion, a barrier layer is located under the ferroelectric oxide, between the capacitor""s bottom electrode and the underlying layers. The maximum processing temperature allowable with current barrier technology is in the range of from 700xc2x0 C. to 750xc2x0 C. At temperatures above this range, the highest-temperature barrier materials begin to degrade and lose their diffusion-barrier properties. On the other hand, the minimum feasible manufacturing process temperatures of layered superlattice materials used in the prior art is about 800xc2x0 C., which is the temperature at which deposited layered superlattice materials are annealed to achieve good crystallization. Lower annealing temperatures require much longer time periods of exposure to oxygen, which can result in damage to the integrated circuit.
For the above reasons, therefore, it would be useful to have a method for fabricating layered superlattice materials in ferroelectric integrated circuits that minimizes the time of exposure to oxygen at elevated temperature, as well as reduces the maximum temperature used.
The embodiments of the present invention reduce the time of exposure of the integrated circuit to oxygen gas at elevated temperature, and reduce fabrication processing temperatures.
In an important embodiment of the invention, a portion of the time period during which an integrated circuit is heated or annealed at elevated temperature is conducted in an oxygen-free unreactive gas. The oxygen-free gas may be any relatively unreactive gas or mixture of unreactive gases, such as nitrogen and the noble gases, in particular, argon and helium. A useful result of embodiments of the invention is that when a fabrication method includes annealing in unreactive gas for a significant portion of the total annealing time at elevated temperature, then the ferroelectric polarizability of layered superlattice material is as high or higher than the polarizability of layered superlattice material annealed for the same total annealing time in oxygen only.
The invention provides a method of fabricating a thin film of layered superlattice material comprising: providing a substrate and a precursor containing metal moieties in effective amounts for spontaneously forming a layered superlattice material; applying the precursor to the substrate; annealing the solid thin film in an unreactive gas at a temperature in a range of from 600xc2x0 C. to 800xc2x0 C.; and annealing the solid thin film in an oxygen-containing gas at a temperature in a range of from 600xc2x0 C. to 800xc2x0 C. The invention contemplates that the annealing in an unreactive gas may either precede or come after the annealing in an oxygen-containing gas. The annealing in an unreactive gas may be conducted for a time period in the range of from 30 minutes to 100 hours. The annealing in an oxygen-containing gas is conducted for a time period in the range of from 30 minutes to two hours. In a preferred embodiment, the annealing in an oxygen-containing gas is conducted for a time period not exceeding 60 minutes. Typically, this step of annealing is conducted in substantially pure O2 gas.
A further embodiment of the invention includes heating the substrate after applying the precursor, forming a solid film from the precursor. In an embodiment, the heating is conducted at a temperature not exceeding 600xc2x0 C. The heating typically comprises a step of drying the precursor coating on the substrate at a temperature not exceeding 300xc2x0 C. Typically, drying is accomplished by baking in an oxygencontaining gas, preferably in O2 gas.
In another important embodiment of the invention, the heating comprises a step of pretreating the substrate after the precursor is applied and before annealing. Typically, pretreating is conducted in an oxygen-containing gas. Pretreating preferably comprises rapid thermal processing (xe2x80x9cRTPxe2x80x9d) of the substrate having the precursor coating. In a typical embodiment, the rapid thermal processing is conducted at a temperature in the range of from 300xc2x0 C. to 600xc2x0 C. for a time period in the range of from 1 minute to 15 minutes. Pretreating also may comprise a hot plate baking of the substrate. Typically, hot plate baking is conducted in air at a temperature in the range of from 300xc2x0 C. to 600xc2x0 C. for a time period in the range of from 1 minute to 15 minutes. Pretreating may also comprise a furnace pre-annealing of the substrate. Typically, furnace pre-anneal is conducted at a temperature in the range of from 300xc2x0 C. to 600xc2x0 C. for a time period in the range of from 1 minute to 15 minutes.
In another embodiment of the invention, the substrate comprises a first electrode, and the method includes steps of forming a second electrode on the solid thin film, after the step of annealing, to form a capacitor, and subsequently performing a step of post-annealing. In a preferred embodiment, the first electrode and the second electrode contain platinum. The step of post-annealing is conducted at a temperature not exceeding 800xc2x0 C., preferably for a time period in the range of from 30 minutes to two hours. In one embodiment of the invention, the post-annealing is conducted in an oxygen-containing gas, typically in O2 gas. In a preferred embodiment of the invention, the post-annealing is conducted in oxygen-free unreactive gas, typically N2 gas.
In a preferred embodiment of the invention, an electrically conductive barrier layer is formed on the substrate prior to applying the precursor coating.
The thin film of layered superlattice material typically has a thickness not exceeding 500 nanometers (xe2x80x9cnmxe2x80x9d). In one embodiment, the layered superlattice material comprises strontium, bismuth and tantalum. In another embodiment, the precursor includes metal moieties for forming a layered superlattice material thin film comprising strontium, bismuth, tantalum and niobium.
In accordance with the invention, the precursor comprises a solution of metal organic precursor compounds containing metal atoms contained in the desired layered superlattice material. Preferably, the metal organic compounds are metal 2-ethylhexanoates.
Numerous other features, objects and advantages of the invention will become apparent from the following description when read in conjunction with the accompanying drawings.