The present invention relates to an electrostatic protection circuit and a semiconductor integrated circuit using the same, particularly to an electrostatic protection circuit for an integrated circuit using an insulated gate field effect transistor (hereinafter referred to as a MOSFET).
FIG. 9 shows a typical electrostatic protection circuit having a commonly-used signal terminal 1509 and power supply terminals 1 and 2 of a MOS integrated circuit using a bulk substrate. In FIG. 9, there are two paths for absorbing static electricity charge applied between the signal terminal 1509 and the power supply terminals 1 and 2. One is a path in which discharge current flows from the signal terminal 1509 to the first power supply terminal 1 designated as potential +VDD through a diode 1503 and the other is a path in which discharge current flows from the second power supply terminal 2 designated as potential xe2x88x92VSS to the signal terminal through a diode 1504. There is another path in which discharge current flows from the second power supply terminal 2 through the diode 1501 to the first power supply terminal 1. To be more practical, an input signal from a pad terminal 1506 is fed to gate electrodes of a p-type MOSFET 1507 and an n-type MOSFET 1508 which form an internal circuit inverter, through a resistor 1505 and the connection of the terminals of the diodes 1503 and 1504, as shown in FIG. 9.
If the pad 1506 is directly connected to the gate of the p-type MOSFET 1507 or n-type MOSFET 1508 of the internal circuit in FIG. 9, the gate electrodes of the p-type MOSFET 1507 and the n-type MOSFET 1508 are often broken when static electricity is applied from the pad 1506. To prevent this, a resistor 1505 for buffering the shock of static electricity and the diodes 1503 and 1504 for absorbing the charge are used. In addition, the diode 1501 serves as a charge-absorbing path not only for static electricity applied between the first and second power supply terminals but also for static electricity applied to the above-described signal terminals as discussed later.
In the conventional electrostatic protection circuit, the above-mentioned diode element 1503 for absorbing charges is connected so as to conduct the charges to the first power supply terminal 1, and the diode element 1504 is connected so as to conduct the charges from the second power supply terminal 2 to the signal terminal 1509. Further, the diode 1501 is connected in a reverse direction between the first power supply terminal 1 and the second power supply terminal 2. This is because, if the diodes 1501, 1503, and 1504 are connected in a forward direction so as to conduct the current in the opposite direction to that shown in FIG. 9, leakage currents may flow through the forward-biased diodes when the integrated circuit is connected to a power supply.
Further, in integrated circuits using a silicon-on-insulator substrate (hereinafter abbreviated as xe2x80x9cSOI integrated circuitxe2x80x9d), there are no wells such as those in a bulk substrate, the bottom is insulated by a buried oxide film, and the side is also covered with a local oxide film formed by LOCOS (local oxidation of silicon) method. For this reason, there is generally no equivalent to the diode 1501 between the first and second power supply terminals shown in FIG. 9. In other words, there is no diode formed by a p well and an n well in a conventional substrate between the first and second power supply terminals as shown in FIG. 11. However, such a diode is required from the viewpoint of electrostatic protection as discussed later. Therefore, in an SOI integrated circuit, a diode 1801 is added between the first and second power supply terminals as shown in FIG. 12, or a MOSFET 1901 with the source and gate electrodes connected together is connected between the first and second power supply terminals for causing the MOSFET 1901 to perform the function of the reverse-biased diode as shown in FIG. 13. Alternatively, a p-type MOSFET 2001 and n-type MOSFET 2000 each having the source and gate electrodes connected together are connected in parallel between the first and second power supply terminals as shown in FIG. 14 to cause them perform the function of the reverse-biased diodes. SOI integrated circuits are thus provided with electrostatic protection based on the same principle as for bulk-substrate integrated circuits.
If static electricity is added between the power supply terminals or between the signal terminal and one of the power supply terminals, electrostatic breakdown may occur inside the integrated circuit. In the case where static electricity is added to signal terminals, the internal circuit to which the signal terminals are connected may frequently be damaged unless the charges are quickly absorbed by an electrostatic protection circuit. In FIG. 9, the gates of p-type MOSFET 1507 and n-type MOSFET 1508 may be broken down. The gate insulating film of a MOSFET is made of a very thin film from several hundred angstrom to several tens angstrom formed between the substrate and the gate electrode, and the substrate or the source electrode is finally connected to the power supply. As a result, a high voltage is applied across the thin gate silicon oxide film to produce a strong electric field, resulting in breakdown of the gate film. Therefore, when static electricity is added, the electrostatic protection circuit in FIG. 9 or a similar means is used to absorb the charges quickly. In the circuit of FIG. 9, the following four cases are possible for the flow of charges between the signal terminal 1509 and the first and second power supply terminals 1 and 2:
(A) Signal terminal: positive charges, First power supply terminal: negative charges
(B) Signal terminal: negative charges, First power supply terminal: positive charges
(C) Signal terminal: positive charges, Second power supply terminal: negative charges
(D) Signal terminal: negative charges, Second power supply terminal: positive charges
In the conventional circuit shown in FIG. 9, the diode 1503 or diode 1504 operates in a forward direction in the cases (A) and (D) above. Accordingly, electrostatic charges that comes in can be quickly absorbed, thereby preventing electrostatic destruction. In cases (B) and (C), the diodes 1503 and 1504 are both in a reverse direction with respect to the polarity of electrostatic charges. In case (B), negative charge forces its path through the diode 1503 in a reverse direction. Otherwise, the negative charges first flow through the diode 1504 in a forward direction, then flow from the second power supply terminal 2 to the first power supply terminal 1 through the reverse diode 1501 in the substrate. In case (C), positive charges force its path through the diode 1504 in a reverse direction. Alternatively, the positive charges first flow through the diode 1503 in a forward direction, then flow from the first power supply terminal 1 to the second power supply terminal 2 through the reverse diode 1501 in the substrate. Therefore, in cases (B) and (C), because charges must necessarily flow through a diode in a reverse direction, the circuit is vulnerable to static electricity and can be broken by even comparatively low voltages. A path through which electrostatic charges flow out in the case (C) is shown in FIG. 10 as an example.
The function of the reverse-biased diode between the power supplies in the case where static electricity is applied to the signal terminals has been described above. If static electricity is applied between the power supply terminals in the same polarity as the power supply voltage, the charges flow through the diode between the power supply terminals in a reverse direction. Since even this diode does not exist in SOI integrated circuits, electrostatic charges cannot be absorbed, and hence breakdown easily occurs at the most vulnerable part among the parts involved in the power supply lines.
Next, the mechanism why a diode is endurable in a forward direction and weak in a reverse direction will be briefly discussed referring to FIGS. 30 and 31. In FIG. 30, a p-type diffusion layer 131 and an n-type diffusion layer 132 join together at the boundary to form a pn diode. FIG. 30 shows the case in which the p-type diffusion layer 131 is at a positive potential and the n-type diffusion layer 132 is at a negative potential. In this case, since the diode is forward-biased and a current therefore can flow easily everywhere in the pn boundary, the current flows uniformly across the entire pn boundary. Accordingly, the diode as a whole allows easy flow of current and exhibits high charge-absorbing capability. Furthermore, because the current flows in the diode itself well dispersed and uniformly without extreme concentration, no destruction of the diode itself occurs due to flow of current.
On the other hand, FIG. 31 shows the state where a current flows in a reverse direction. In FIG. 31, a p-type diffusion layer 141 and an n-type diffusion layer 142 join together at the boundary to form a pn diode. FIG. 31 shows the case in which the p-type diffusion layer 141 is at a negative potential and the n-type diffusion layer 142 is at a positive potential.
In this case, since the diode is reverse-biased to the voltage applied, normally no current flows. However, if a high voltage is applied to the diode in order to force a current in a reverse direction, the current begins to flow at specific parts where the breakdown voltage is comparatively low and hence current can easily flow due to non-uniform pn boundaries. Therefore, even if the voltage goes over the breakdown voltage and a current begins to flow, this does not mean that the current is flowing uniformly across the entire boundary. The current tends to concentrate in the parts allowing easy flow thereof. The state of this current flow is shown in FIG. 31. Since current does not flow uniformly in the diode but tends to concentrate in specific parts when the current flows in a reverse direction in the diode, the capability of the diode to allow current to flow is small relative to the size of the pn boundary area of the diode. In other words, the diode exhibits only a small charge absorbing capability. In addition, since current concentrates in parts of the diode allowing easy flow of current, the current density in those parts extremely increases, there is a high risk for the diode to be unduly heated and broken down.
As described above, a diode exhibits high endurance to static electricity when acting in a forward direction, but exhibits so weak endurance when acting in a reverse direction that the diode may be damaged even by low static electricity depending on the manner in which the static electricity is applied.
In the conventional electrostatic protection circuit configuration, the above-described occurrence in which the diodes operate only in a reverse direction to the charges is unavoidable. To improve the electrostatic endurance in these cases, conventionally the size of the diode or MOSFET has been increased to cope with weakness in a reverse direction by increasing the areas of the diode or MOSFET. This increases the area occupied by the electrostatic protection circuit attached to each pad, resulting in a cost increase and limitation to the number of pads and pins which can be formed.
Furthermore, the increase in the diode area accompanies an increase in the parasitic electrostatic capacity acting as a capacitor, causing degradation of the high frequency characteristics of signal terminals for which the high frequency operation is required and an increase in power consumption.
In the case of SOI integrated circuits, as mentioned above there is a problem of very low electrostatic endurance due to absence of even the reverse-biased diode formed by p and n wells between the power supply terminals. Assume that an attempt is made, for example, to add a reverse-biased diode or equivalent device corresponding to the reverse-biased diode formed by p and n wells in a conventional bulk substrates between the power supply terminals by forming an additional diode or MOSFET. This method also cannot provide SOI integrated circuits with a sufficiently high electrostatic endurance because it is not possible to form a reverse-biased diode as large as the conventional reverse-biased diode formed by the p and n wells parasiting between power supply terminals with a very large area because of the limitation to the area.
The present invention has been completed in view of these problems, and has an objective of providing an improved electrostatic protection circuit which affords a sufficiently high electrostatic endurance between the power supply terminals or between one of the power supply terminals and the signal terminal, and a semiconductor integrated circuit using the electrostatic protection circuit. Another objective of the present invention is to provide an electrostatic protection circuit exhibiting high electrostatic endurance with a comparatively small area, and a semiconductor integrated circuit using this electrostatic protection circuit, which is sufficiently endurable to the static electricity and suitable for high-frequency operation because of very small parasitic electrostatic capacity due to the use of this protection circuit.
According to one aspect of the present invention, there is provided an electrostatic protection circuit comprising:
a first power supply terminal to which a first voltage is applied;
a second power supply terminal to which a second voltage lower than the first voltage is applied;
a first diode connected in a reverse direction between the first and second power supply terminals; and
a second diode connected in a forward direction between the first and second power supply terminals,
wherein a forward drop voltage of the second diode is set to be higher than a drive voltage supplied between the first and second power supply terminals.
According to this aspect of the present invention, either one of the first and second diodes always operates in a forward direction with respect to the static electricity applied between the first and second power supply terminals regardless of the polarity of the static electricity. Electrostatic charges therefore can be quickly absorbed through the diode in a forward direction.
Because the second diode is connected in a forward direction between the first and second power supply terminals in this embodiment, this second diode is forward-biased to the electric charges of the drive voltage applied between the first and second power supply terminals in the ordinary operations. However, the forward drop voltage of the second diode is set to be higher than the drive voltage supplied between the first and second power supply terminals. For this reason, a forward leakage current does not flow through the second diode during normal operation.
The second diode may have a pn junction structure formed by a p-type diffusion layer and an n-type diffusion layer joined together. In this case, the forward drop voltage of the second diode is defined by a contact potential (or contact potential difference) which is a potential difference generated at the boundary of the p-type diffusion layer and an n-type diffusion layer. Therefore, if the forward drop voltage of the second voltage is set to be higher than the drive voltage supplied between the first and second power supply terminals, a forward leakage current of the second diode can be prevented from flowing during normal operation.
The second diode may be formed from a plurality of diodes connected in series. Each of the plurality of diodes has a pn junction structure formed by a p-type diffusion layer and an n-type diffusion layer joined together. Assuming that the number of diodes connected in series is n, the forward drop voltage of the second diode becomes n times the contact potential of each diode. As a result, it is possible to use higher power supply voltages.
The second diode may include first p-type and n-type diffusion layers and a second p-type or n-type diffusion layer disposed between and connected to the first p-type and n-type diffusion layers. In this case, it is preferable that the diffusion concentration of the first p-type and n-type diffusion layers is set to be higher than the diffusion concentration of the second p-type or n-type diffusion layer. Because the contact potential of the second diode can be increased in this manner, it is possible to use higher power supply voltages.
The second diode may also be formed by a MOS transistor having a drain electrode and a gate electrode which are connected to each other. In this case, the forward drop voltage of the second diode is defined by the threshold voltage of the MOS transistor.
The second diode may also be formed by connecting a plurality of MOS transistors in series. In this case, a drain electrode and a gate electrode are connected to each other in each of the plurality of MOS transistors. Assuming the number of MOS transistors connected in series is n, the forward drop voltage of the second diode is n times the threshold voltage of each MOS transistor. As a result, it becomes possible to use higher power supply voltages.
The first diode may be formed by connecting in parallel a p-type MOS transistor having a source electrode and a gate electrode connected to the first power supply terminal, with an n-type MOS transistor having a source electrode and a gate electrode connected to the second power supply terminal. This configuration ensures the first diode to exhibit more stable characteristics.
The first and second diodes may be formed on a silicon-on-insulator (SOI) substrate. The first and second diodes are then surrounded by insulator layers, and therefore formation of superfluous parasitic diodes can be prevented.
According to another aspect of the present invention, there is provided an electrostatic protection circuit comprising:
a first power supply terminal to which a first voltage is applied;
a second power supply terminal to which a second voltage lower than the first voltage is applied;
a signal terminal to which a signal voltage equal to or lower than the first voltage and equal to or higher than the second voltage is applied;
a first diode connected in a forward direction between the first power supply terminal and the signal terminal;
a second diode connected in a forward direction between the signal terminal and the second power supply terminal;
a third diode connected in a reverse direction between the first power supply terminal and the signal terminal; and
a fourth diode connected in a reverse direction between the signal terminal and the second power supply terminal,
wherein a forward drop voltage of each of the first and second diodes is set to be higher than a drive voltage supplied between the first and second power supply terminals.
According to this aspect of the present invention, one of the first to fourth diodes certainly operates in a forward direction with respect to the static electricity applied between the signal terminals and the first/second power supply terminal regardless of the polarity of the static electricity. Electrostatic charges therefore can be quickly absorbed through the diode in a forward direction.
The first and second diodes are connected in a forward direction between the signal terminal and the first or second power supply terminal. Therefore, the first and second diodes are forward-biased to electric charges of the drive voltage applied between the signal terminal and the first/second power supply terminal in the ordinary operations. However, the forward drop voltage of each of the first and second diodes is set to be higher than the drive voltage supplied between the first and second power supply terminals. For this reason, a forward leakage current does not flow through the first and diode during normal operation.
The above-mentioned features can be applied to other aspects of the present invention.
According to still another aspect of the present invention, there is provided a semiconductor integrated circuit comprising:
a logic circuit formed by interconnecting a plurality of p-type MOS transistors and a plurality of n-type MOS transistors; and
an input/output circuit disposed around the logic circuit,
wherein the input/output circuit includes an electrostatic protection circuit which protects the logic circuit from static electricity and has elements of one aspect of the present invention.
According to this aspect of the present invention, the logic circuit can be protected from static electricity by the actions of the above-described electrostatic protection circuit.
Above-described features of the electrostatic protection circuit can be applied to the semiconductor integrated circuit of the present invention.
Particularly, the diffusion concentration of at least one of the p-type and n-type diffusion layers of the first diode may be set equal to or higher than the diffusion concentration of diffusion layers used for source electrodes of the plurality of p-type and n-type MOS transistors in the logic circuit. If the diffusion concentrations of the above diffusion layers are set to be equal, no forward leakage current occurs through the second diode during normal operation when the forward drop voltage (contact potential) of the second diode is set to be higher than the drive voltage supplied between the first and second power supply terminals. If the above diffusion concentrations are set to be higher, the contact potential of the second diode increases and higher power supply voltages can be used.
Similarly in the case that the threshold voltage of the MOS transistor which forms the second diode is set to be higher than the threshold voltage of each of the plurality of p-type and n-type MOS transistors in the logic circuit, higher power supply voltages can be used.
The semiconductor integrated circuit according to other aspects of the present invention includes the electrostatic protection circuit having the elements of the other aspects of the present invention.
The above described features of the electrostatic protection circuit can be applied to the semiconductor integrated circuit of the present invention.