Electrostatic discharge (ESD) is the sudden and momentary electric current that flows between two electric elements at different electrical potentials. ESD events may cause damage to electronic equipment, especially in solid-state electronics, such as integrated circuits. As fabrication of integrated circuits is moving into sub-micron processes, the circuits are more vulnerable to stress due to ESD. That is, as fabrication, e.g., CMOS, processes downscale, ESD robustness degrades due to the metallization layers being thinner, hence having higher sheet resistance.
Recently developed techniques allow fabricating radio frequency integrated circuits (RFICs) that operate in millimeter wave frequencies, typically using deep sub-micron CMOS technology. In order to enable proper and safe operation of ICs, on-chip ESD protection should be included. In a design of an RFIC, a critical point that requires ESD protection is at the RF front-end between the low noise amplifier (LNA) and antenna(s). The LNA, which is commonly the most sensitive element in the RF front end, is typically exposed to ESD sparks (pulses) induced through the antenna pins.
Conventional ESD protection techniques applicable for ICs cannot be efficiently implemented in RFICs and in particular, RFICs for millimeter wave frequencies. The conventional techniques introduce significant parasitic capacitance and resistance, thus degrading RF front-end performance.
In the related art, several on-chip ESD protection techniques for RFIC can be found. For example, the article “ESD Protection for a 5.5 GHz LNA in 90 nm RF CMOS Implementation Concepts, Constraints and Solutions” to Natarajan, et al., proposes to place inductors at input and output pins of the LNA to divert the ESD current away from the LNA core to the power lines. The size of the inductors can be relatively small, thus suitable for RFIC designs where area is limited. However, the fabricated inductors are characterized by high series resistance due to the thin metal layer of the semiconductor substrate. This reduces the effectiveness of the ESD protection. Further, the inductors introduce high heat dissipation in a long-lasting ESD pulse. This can lead, for example, to open interconnect.
Another ESD solution designed for protection of RFICs is based on a shorted-stub transmission line. As illustrated in FIG. 1A, the transmission line 110 is connected between an input pin 101 of a LNA 120 and the ground. The shorted-stub transmission line 110 discharges ESD pulses, while at the same time operates as a matching circuit for a normal operation of the LNA 120. This ESD protection solution suffers from the deficiencies noted above, e.g., high resistance and high heat dissipation. In addition, the length of the transmission line 110 is typically λ/4, where λ is the wavelength of a signal amplified by the LNA 120. For example, for 60 GHz signals the length of the transmission line 110 is not less than 600 micron (when fabricating a transmission line on a multilayer semiconductor substrate the length of each line is shorter than λ/4 due to characteristics of the substrate).
In order to improve the protection efficiency and reduce the heat dissipation, a ladder-shaped ESD protection circuit is proposed in “Ladder-shaped network for ESD protection of millimeter-wave CMOS ICs” to Park, et al. As illustrated in FIG. 1B, the ESD protection circuit consists of three shorted stubs 130 and three series stubs 140. The length of each shorted stub 130 is 300 micron. The ladder-shaped structure operates as a high-pass filter, i.e., filtering ESD pulses characterized by a low frequency relative to the operating frequency of the LNA.
The major disadvantage of the shorted-stub based ESD protection solutions, illustrated in FIGS. 1A and 1B, is that they are considerably large in size for RFIC designs. Therefore, such structures are unsuitable for use in RFICs, and more particularly elements that should be integrated in devices for 60 GHz band applications.
Therefore, it would be advantageous to provide a solution for designing a compact size circuit for providing robustness in ESD protection for RFICs operation in millimeter wave frequencies.