Central processing units (CPUs) can use virtual addresses to access a physical memory, such as a random access memory (RAM), divided into page units (e.g., of several kilobytes each). Virtual addresses, which differ from physical addresses, are addresses of a virtual memory having a continuous virtual space composed of discontinuous physical memory regions. When a CPU uses virtual addresses, therefore, a memory management unit (hereinafter abbreviated to “MMU”) translates virtual addresses to physical addresses to enable the CPU to access physical memory.
The MMU fetches (loads) a page table, which is a translation table for translating virtual addresses to physical addresses, from the RAM into a translation look-aside buffer (hereinafter abbreviated to “TLB”) and translates a virtual address for which the CPU has requested access to a physical address using this page table.
As shown in the schematic view in FIG. 4, a page table has memory page entries for access to different memory pages of a physical memory 50. Each memory page entry contains the virtual and physical addresses of the corresponding memory page. The necessary memory page entry is fetched from the page table information stored in the physical memory 50 and is stored in a TLB 54 provided in an MMU 52.
The memory page entry also contains a memory protection attribute specifying, for example, “read,” “write,” or “execute.” The technique disclosed in PTL 1 is a technique that sets a value in the protection bit of the memory protection attribute of the memory page entry fetched from the page table into the MMU to prevent a runaway task if a global variable used only by one task is accidentally overwritten by another task.