1. Field of the Invention
The present invention relates to a memory driving method and a semiconductor storage device, particularly to an FBC (Floating Body Cell) memory in which information is stored by accumulating majority carriers in a floating body of a field effect transistor.
2. Related Art
Recently, there is an FBC memory device as a semiconductor storage device expected to be an alternative to a 1T (Transistor)-1C (Capacitor) type DRAM. The FBC memory device is formed by FET (Field Effect Transistor) including a floating body (hereinafter referred to as body) on an SOI (Silicon On Insulator) substrate. In the FBC memory device, data “1” or data “0” is stored according to the number of majority carriers accumulated in the body. For example, in FBC formed by an N-type FET, it is conventionally defined that the data “1” is the state in which many holes are accumulated in the body while the data “0” is the state in which few holes are accumulated in the body. A memory cell in which the data “0” is stored is called a “0” cell and a memory cell in which the data “1” is stored is called a “1” cell.
FBC is excellent in miniaturization compared with a conventional DRAM. However, because the body of FBC has an electrostatic capacity smaller than that of a capacitor of the conventional DRAM, FBC has a data retention time shorter than that of DRAM although a leakage current from the body of FBC is smaller than that from the capacitor of DRAM. Accordingly, it is necessary to frequently perform a refresh operation. As a result, disadvantageously a ratio of a time when usual read and write are prohibited (refresh busy rate) is increased and a current necessary to retain the data is increased compared with the conventional DRAM. In particular, large power consumption becomes a serious problem in portable devices.
Additionally, in the FBC memory, it is necessary that a size of a current driver is enlarged because a current is passed through the memory cell to write the data. Therefore, a chip size is not so decreased although the memory cell has the small size. That is, a proportion of the memory cell to the chip (cell efficiency) is small.
There has been proposed block refresh in order to deal with the problems (P. Fazan, S. Okhonin and M. Nagoga, “A new block refresh concept for SOI floating body memories” IEEE Int. SOI Conference, pp. 15-16, September, 2003). The block refresh is a method, in which holes are supplied only to the “1” cell by impact ionization and the holes are drawn from both the “0” cell and “1” cell by utilizing a charge pumping phenomenon. The charge pumping phenomenon is one in which the holes are drawn from the body as a result of recombination of the holes in the body and electrons trapped by a surface state existing in an interface between a silicon substrate and a gate dielectric film. Accordingly, density of the surface state becomes important. Usually the surface state has the density of about 1010 cm−2. For example, an average of about one surface state exists for a channel having an area of 0.1 μm×0.1 μm. That is, the memory cell having no surface state exists with a considerably high probability. Thus, the block refresh is not the effective method to the memory cell having no surface state, and the block refresh is impractical.