Light emitting diodes (LEDs) emit light when electrical current flows through them and emit no light when no current flows through them. LEDs require control of the current flowing through them to obtain desired brightness. One way of controlling this current flow, and brightness, is by alternately providing current flow through a LED and stopping current flow through the LED in response to a pulse width modulated (PWM) control signal. The percentage of the alternating current flow can be described as a duty cycle of the current flow.
A fifty percent (50%) duty cycle describes a current flow through the LED 50% of the time and no current flow through the LED the other 50% of the time. A 10% duty cycle describes a current flow through the LED 10% of the time and no current flow 90% of the time. A 90% duty cycle describes a current flow through the LED 90% of the time and no current flow 10% of the time. The PWM signal can have a duty cycle to control the current flow and the brightness of the LED.
Although the controlling pulse width modulated signal may have a well-defined 50% duty cycle of on and off times, unequal capacitances in the circuits implementing the flow of current through the LEDs may cause unequal turn on and turn off times of the current, and produce other than a 50% duty cycle of the LEDs.
While some integrated circuit LED controllers contain an integrated power transistor to drive external power to the LEDs, some applications use an integrated circuit to drive an external power transistor to drive external power to the LEDs.
In FIG. 1, circuit 10 provides a series connection between a power lead 12 supplying a voltage such as from a battery, Vbat, and a field ground lead 14 of a current sense resistor 16, a power field effect transistor (FET) 18, and three LEDs 20, 22, and 24. Transistor 18 has a drain 26, a gate 28, and a source 30. Transistor 18 also presents a gate to drain capacitance Cgd 32 and a gate to source capacitance Cgs 34, both indicated in dotted lines.
Integrated circuit controller 36 includes gate driver circuit 38, an Idrive output pin 40, and a PWM input pin 42. The Idrive output pin 40 is connected to the gate 30 of transistor 18 by external lead 41. Gate driver 38 includes switching circuit 44 connected between a power source and a ground and operates under control of a PWM signal received at pin 42 to turn on transistor 18 by sourcing charge to the gate 30 of transistor 18 and to turn off transistor 18 by removing charge from the gate 30. Turning on the transistor 18 conducts a current Iled from the power lead 12 through the resistor 16 and the LEDs 20, 22, and 24 to ground lead 14. Turning off the transistor 18 blocks current from the power lead 12 through the resistor 16 and the LEDs 20, 22, and 24 to ground lead 14.
In some applications, such as an automotive application, the resistor 16, power transistor 18, and LEDs 20, 22, and 24 are separate from the integrated circuit controller 36. In these applications, a problem exists in turning the current Iled through transistor 18 on and off in equal periods of time after state changes in the PWM signals. In large power FET transistors, the capacitances Cgd and Cgs are usually very large.
The current in the power FET transistors depends on the overdrive voltage VOV, which is the voltage difference between VGS and transistor GATE-SOURCE threshold voltage Vth. VOV_10% is the overdrive voltage when LED current reaches 10% of full current, VOV_90% is the overdrive voltage when LED current reaches 90% of full current, VOV_FULL is the overdrive voltage when LED has full current. The turn-on delay time Ton_delay depends on the time need to charge the capacitance Cgs from 0V to Vth+VOV_10%. The turn-off delay time Toff_delay depends on the time need to discharge the capacitance Cgs from VOV_FULL to VOV_90%. Typically the voltage difference between VOV_FULL−VOV_90% is much less than the difference between Vth+VOV_10% and 0V. This means that the turn-on delay time Ton_delay and the Toff_delay time of the transistor 18 will be different even with equal Idrive gate currents.
In FIG. 2, PWM signal turns on at time 46 and turns off at time 48. An Idrive current turns on at time 46 and turns off at time 48. Due to the capacitance Cgs 34, the voltage on the gate Vgs increases slowly to turn on the transistor 18 at time 50, effecting a Ton_delay between times 46 and 50. At time 48, the PWM signal turns off and the Idrive signal removes charge from gate 18, to turn off the transistor 18 at time 52, effecting a Toff_delay between times 48 and 52.
A constant current Idrive is used to drive the transistor 18 in order to control the LED current slew rate during a rising and falling phase. For electromagnetic compatibility (EMC) considerations, a low slew rate (1˜10 mA/us) of the LED current is preferred. This means that the drive current cannot be very large. This results in the Ton_delay being long due to the limited drive current and a large Cgs of transistor 18 of about several hundred microseconds. The Toff_delay at time is very small, about several microseconds. A big gap between Ton_delay and Toff_delay exists, which causes Iled current duty cycle loss.