At present, for the purpose of smoothly supplying electric power to an IC chip, a chip capacitor is often mounted on the surface of a printed circuit board used as a package substrate.
The reactance of a wiring from the chip capacitor to the IC chip depends on frequency. Due to this, as IC chip driving frequency increases, the chip capacitor cannot exhibit sufficient effect even if the chip capacitor is mounted on the surface of the printed circuit board. Considering this, the applicant of the present invention proposed a technique, identified as Japanese Patent Application No. 11-248311, for forming a concave portion on a core substrate so as to contain therein a chip capacitor. Techniques for embedding a capacitor in a substrate are disclosed in Japanese Patent Unexamined Application Publication (to be referred to as “Publication” hereinafter) Nos. 6-326472, 7-263619, 10-256429, 11-45955, 11-126978, 11-312868 and the like.
Publication No. 6-326472 discloses a technique for embedding a capacitor in a resin substrate made of glass epoxy. With this constitution, it is possible to reduce power supply noise and to dispense with a space for mounting the chip capacitor, thereby making an insulating substrate small in size. Publication No. 7-263619 discloses a technique for embedding a capacitor in a substrate made of ceramic, alumina or the like. With this constitution, the capacitor is connected between a power supply layer and a ground layer to thereby shorten wiring length and reduce wiring inductance.
However, according to the Publication Nos. 6-326472 and 7-263619 stated above, the distance from the IC chip to the capacitor cannot be set too short and the wiring inductance cannot be reduced as currently desired in the higher frequency region of the IC chip. In case of a multi-layer buildup wiring board made of resin, in particular, due to the difference in the coefficient of thermal expansion and a capacitor made of ceramic and a core substrate as well as interlayer resin insulating layers made of resin, disconnection occurs between the terminal of the chip capacitor and a via, separation occurs between the chip capacitor and the interlayer resin insulating layers and cracks occur to the interlayer resin insulating layers. Thus, the multi-layer buildup wiring board could not realize high reliability for a long time.
On the other hand, according to the invention of Publication No. 11-248311, if the position at which a capacitor is arranged is deviated, the connection between the terminal of the capacitor and a via cannot be accurately established and power cannot be possibly supplied from the capacitor to the IC chip.
The present invention has been made to solve the above-stated problems. It is, therefore, an object of the present invention to provide a printed circuit board including therein a capacitor and having enhanced connection reliability and to provide a method of manufacturing the printed circuit board.