FEC (Forward Error Correction, forward error correction) is an error control technology in data transmission, and is widely used in communications field such as optical communication. The FEC has strong error correction capacity, and while a bit error rate before correction of long distance data transmission is greater than 2E-2 (representing that at most 1 bit error occurs when transmitting 2×102 bits), the bit error after FEC error correction can be kept below 1E-15.
In an optical communication system, a burst noise existing in a channel may lead to a burst bit error. The FEC has certain capacity of correcting the burst bit error; however, when the burst bit error caused by the burst noise in the channel exceeds the capacity of correcting the burst bit error of the FEC, the bit error may be spread, and a serious bit error rate after correction is generated.
To deal with the burst bit error, a channel interleaving solution is usually adopted in this field, that is, a continuous burst bit error is “scattered” to different FEC code words, so that the volume of the burst bit error in each code word is smaller than the capacity of correcting the burst bit error of the FEC. The specific method is: interleaving data after FEC coding at a transmitting end, correspondingly de-interleaving the interleaved data after being transmitted through a channel at a receiving end, and performing FEC decoding on the de-interleaved data. Three channel interleaving solutions exist in the prior art, namely, block interleaving, bit interleaved interleaving, and helical interleaving.
FIG. 1A is a schematic diagram of a block interleaving solution. The block interleaving specifically adopts a “row-in and column-out” manner, that is, an information flow is buffered with an order of the row in a storage and then output in the column direction.
FIG. 1B is a schematic diagram of a bit interleaving solution. The bit interleaved interleaving specifically mixes two information flows in a bit interleaved manner.
FIG. 1C is a schematic diagram of a helical interleaving solution. The helical interleaving specifically adopts a “row-in and twill-out” manner, that is, an information flow is buffered with an order of the row in a storage and then output in the twill direction.
However, when the foregoing three interleaving solutions match with a block convolutional decoder to correct the burst bit error, with increase of the interleave depth, the capacity of correcting the burst bit error of the foregoing three interleaving solutions may meet a bottleneck, and the implementation complexity of the three interleaving solutions is high.