1. Field of the Invention
The present invention relates to the design of electrical/electronic circuits, and more specifically to a method and apparatus for attaining a bandwidth limited sampling circuit of high linearity.
2. Related Art
A sampling circuit generally refers to a component which samples a signal level of an input signal (e.g., analog signal) at a particular instant of time and provides an output signal having the signal level to other components for a long duration. In general, a sampling circuit samples an input analog signal at a time point specified by a clock signal, and provides an output signal with the sampled strength to other components for further processing for a long time.
An input signal generally contains a source signal and a noise signal/component. It is generally desirable that the sampled output generated by a sampling circuit contain only the source signal component, which is generally referred to as providing a high signal to noise ratio (SNR).
A prior approach may remove the noise component by eliminating high frequency components from an input signal as the noise component is generally present at high frequencies. One problem with such an approach is that some of the components performing such removal may have non_linear characteristics, which results in a non_linear response in terms of the overall sampling operation. The non_linearity is undesirable in several environments. Accordingly, what is needed is a bandwidth limited sampling circuit of high linearity providing high SNR.
In the drawings, like reference numbers generally indicate identical, functionally similar, and/or structurally similar elements. The drawing in which an element first appears is indicated by the leftmost digit(s) in the corresponding reference number.