As computer systems have become faster in processing speed, improvement in the reliability of such systems has become an issue.
This means that a technique is needed that can make systems operate stably without shutting them down even when a failure has occurred.
Multi-CPU systems, which are equipped with plural CPUs, can operate stably.
The techniques described below are proposed as techniques for the detection of failures in multi-CPU systems.
Patent Document 1 discloses a technique by which operations are monitored in units of processors. In the technique of Patent Document 1, data is transmitted between processors that are connected via a communications device, and one processor monitors responses from the other processors in order to detect failures.
Patent Document 2 discloses a technique by which an abnormal operation in a system is monitored in units of instructions so that the system can recover from the failure. Patent Document 2 discloses a method in which the occurrence of a failure in a processor is monitored by the processor itself and the processor performs a resetting operation using an automatic reset occurrence circuit and a failure element holding circuit when the system can recover by resetting.
The methods disclosed by the above described patent documents have the problems described below.
In the method of Patent Document 1, processors are monitored by communications between processors themselves. This configuration causes a time gap of several minutes between the occurrence of a failure and the recognition of the failure.
In the method of Patent Document 1, information used for investigating the cause is collected after the recognition of a failure, and this means that the information collected for the investigation is not exactly from the moment at which the failure occurred. This makes it difficult to use the information for investigating the cause, and thereby the investigation tends to take a long time period or sometimes the investigation itself is prevented.
The time scale of monitoring a system (in units of minutes or seconds) and the time scale of a CPU (in units of nanoseconds) are significantly different from each other, resulting in difficulty in understanding the status of the system when a failure occurred, and thereby a long time is required to investigate the cause.
Although there is a technique of collecting information on changes in the status of a CPU in the form of log information, effective information sometimes cannot be collected using this technique because of the limitation on the volume of log information.
According to the technique of Patent Document 2, the monitoring and recovering is performed in units of instructions, and the system is reset in order to restart when the restarting of the firmware can make the system recover from a state involving failure.
In the technique of Patent Document 2, the monitoring and recovering is performed in units of instructions, making it difficult to detect a failure in a program or the like in an OS (Operating System).