The present invention relates to an electrically erasable and programable random access read only memory (hereinafter called as an EEPROM).
A conventional EEPROM is disclosed in U.S. Pat. No. 4,901,320 (Literature I) or Japanese laid open publication 64-59693 (Literature II). Literature I relates to an error correction principle and its method, whereas Literature II relates to an EEPROM operable with low voltage and low current. An EEPROM circuit with high liability has recently been demanded. In other words, it has been desired to achieve an EEPROM circuit having relatively longer life time and less failure which can operate with low voltage and low current and can detect its failure.