1. Field Of The Invention
This invention relates to computer systems and, more particularly, to methods and apparatus for controlling the output current produced by charge pumps used for erasing flash electrically-erasable programmable read only memory (flash EEPROM) arrays.
2. History Of The Prior Art
There has been a recent trend toward lowering the power requirements of portable computers. In order to reduce power consumption, much of the integrated circuitry used in personal computers is being redesigned to run at lower voltage levels. The circuitry and components used in portable computers are being designed to operate at voltage levels such as five volts and 3.3 volts. This helps a great deal to reduce the power needs of such computers.
Unfortunately, some features desired in portable computers require higher voltages. Recently, flash electrically-erasable programmable read o only memory (flash EEPROM memory) has been used to store basic input/output startup (BIOS) processes for personal computers. This flash EEPROM memory may be erased and reprogrammed without being removed from the computer by running a small update program when the BIOS processes are changed. However, erasing and reprogramming flash EEPROM memory requires approximately twelve volts to accomplish effectively, a voltage not available from the lower voltage batteries provided in personal computers.
In other electronic arrangements, charge pump circuits have been used to provide a high voltage from a lower voltage source. However, even though charge pumps have long been available which are capable of providing the voltages necessary for programming and erasing flash EEPROM memory arrays, no arrangement had been devised until recently for utilizing charge pumps integrated with flash EEPROM memory arrays to provide the voltages needed to accomplish erasing and programming of the flash EEPROM memory arrays using those positive source erase techniques which are used when twelve volts is available from an external source.
The primary reason for the failure is the universal perception that insufficient current can be generated using charge pumps to accomplish the erase process. The positive source method of erasing flash EEPROM memories draws a very substantial amount of current. However, recently it was discovered that using specially designed charge pumps sufficient current could be generated to accomplish positive source erase of flash EEPROM memory arrays. A charge pump arrangement for accomplishing positive source erase is disclosed in detail in U.S. patent application Ser. No. 08/119,719, now U.S. Pat. No. 5,414,669 entitled Method And Apparatus For Programming And Erasing Flash EEPROM Memory. Arrays Utilizing A. Charge Pump Circuit, K. Tedrow et al, filed on even date herewith, and assigned to the assignee of the present invention.
One of the problems encountered in providing charge pumps for generating source voltages for flash EEPROM memory arrays occurs because some manufactures desire to utilize the flash EEPROM arrays in circuitry for which an external power supply is available. This means that the memory array circuitry for providing the source voltage must be capable of utilizing power provided either by its internal charge pumps or by am external source. Typically the current available from an external power source is more than sufficient to erase the memory cells of the array during an erase operation. When provided by an external power source, the amount of current actually available is such that the memory cells are typically moved into a soft breakdown region in which current is dissipated through the source-substrate diode. The current transferred through the source-substrate diode junction is wasted.
However, the current available from the charge pumps is less abundant. There is insufficient current available from charge pumps to erase the memory cells in a time period which is competitive with other forms of memory. For this reason, in order to assure that sufficient current to erase and program the array, it is necessary to assure that current is appropriately utilized so that the dissipation of large amounts of current through the source/substrate diode junction does not occur.