The present invention relates generally to electronic circuits. More particularly, the present invention provides an adjustable bandwidth phase-locked loop.
A phase-locked loop (PLL) 10 is an electronic circuit having a phase detector 12, an amplifier 14 and a voltage-controlled oscillator (VCO) 16 generally connected as shown in FIG. 1. The PLL can be used in a wide variety of applications, including: frequency demodulation (both AM and FM signals); frequency synthesis; frequency multiplication; tone decoding and frequency-shift keyed (FSK) decoders. The PLL is a useful building block available from several manufacturers as a single integrated circuit.
Phase detector 12 provides a comparison between the frequency of input signal 18 and VCO output signal 20, and generates an phase error signal 22 that is a measure of the phase difference between the two input frequencies. Phase error signal 22 may be filtered by a low pass filter 13 then amplified by amplifier 14 resulting in output signal 24. Output signal 24 is Provided as an input to VCO 16 and causes the frequency of VCO output signal 20 to deviate in the direction of the frequency of input signal 18. Filtering of phase error signal 22 smooths swings on the VCO output signal 20. VCO 16 locks on the input frequency maintaining a fixed phase relationship with input signal 18. VCO output signal 18 may be of a different type, e.g., square wave, sine wave or other waveform, than input signal 18. The frequency of VCO output signal 20 is a clean replica of the frequency of input signal 18, which itself may be noisy.
A PLL circuit may be characterized by two interrelated measurements of the PLL circuit performance: bandwidth and acquisition time. The speed at which the VCO output will lock to the input signal is referred to as the acquisition or settling time for the PLL. A PLL may be configured to operate with a fast settling time by adjusting filter 13. Filter 13 typically includes a series resistor and capacitor coupled between the output of phase detector 12 and ground. Many other filter configurations are used as known in the art. The filter is often referred to as a loop filter. The selection of values for the filter loop capacitors and resistors determines the closed loop bandwidth, and thus the settling time for the PLL.
Bandwidth refers to the range over which the VCO output signal may vary with respect to the input signal from initialization until a lock has occurred. The bandwidth of the PLL circuit has a direct effect on whether lock can be achieved on a given reference signal and how long the acquisition time will be. Bandwidth is directly proportional to the filtering of the phase error signal. The more filtering that is provided, in the form of large RC (or LC) time constants in filter 13, the slower the response of the VCO output signal to variations in the input reference signal. Lock is achieved very slowly or may never be achieved if too much filtering is provided. Conversely, settling times may be improved if less filtering is provided but the output of the VCO may vary and be susceptible to noise in the input signal.
A wide bandwidth PLL circuit typically provides faster acquisition time while narrow bandwidth systems are slower to achieve lock. Thus, conventional PLL circuits are not well suited for applications requiring both fast settling times as well as narrow bandwidth performance.
In general, in one aspect, the invention provides an adjustable bandwidth phase-locked loop including a phase-locked loop having a first input node receiving an input signal having a first frequency, a second input node receiving a feedback signal and an output node which has a signal indicative of an error signal characterizing a frequency error between the input signal and the feedback signal. The adjustable bandwidth phase-locked loop includes a voltage controlled oscillator, coupled to the second input node, receiving the error signal and generating the feedback signal where the feedback signal has a frequency which tracks the first frequency. The adjustable bandwidth phaselocked loop includes a variable loop filter, coupled between the phase-locked loop and the voltage controlled oscillator, filtering the error signal. The variable loop filter is configurable to allow for the tracking of the input signal over both of a broad bandwidth and a narrow bandwidth.
Aspects of the invention include one or more of the following features. The phase-locked loop may include a phase detector which detects differences between frequencies of the input signal and the feedback signal and generates the error signal indicative thereof. The voltage controlled oscillator may include an output signal that tracks the frequency of the input signal. The output signal may be a different form than the input signal.
The variable loop filter may include a narrowband loop filter, a wideband loop filter and a switch which switches the narrowband loop filter between the phase-locked loop and the voltage controlled oscillator in accordance with receipt of a bandwidth adjustment signal. The bandwidth adjustment signal may be generated by the phase-locked loop after acquisition of the input signal. A charging circuit may be included to pre-charge the narrowband loop filter to a potential equal to a potential developed across the wideband loop filter so that at a time for switching in the narrowband loop filter the adjustable bandwidth phase-locked loop maintains lock on the input signal. The charging circuit may include an operational amplifier configured as a follower.
The narrowband loop filter may include a first capacitor and the wideband loop filter may include a second capacitor. The charging circuit may pre-charge the first capacitor to a voltage level approximately equal to the voltage developed across the second capacitor, where the voltage developed across the second capacitor is in response to the error signal.
In another aspect, the invention provides an adjustable bandwidth phase-locked loop including a phase-locked loop having a first input receiving an input signal having a first frequency, a second input for receiving a feedback signal and an output for generating an error signal characterizing a frequency error between the input signal and the feedback signal. The phase-locked loop includes a voltage controlled oscillator receiving the error signal and generating the feedback signal where the feedback signal has a frequency which tracks the first frequency. A wideband loop filter is coupled between the phase-locked loop and the voltage controlled oscillator for filtering the error signal to allow for the tracking of the input signal over a broad bandwidth. A narrowband loop filter is provided for filtering the error signal to allow for the tracking of the input signal over a narrow bandwidth. A controllable switch element is provided, operable to change a mode of the narrowband loop filter between the phase-locked loop and the voltage controlled oscillator wherein the narrowband loop filter effectively minimizes the effect of the wideband loop filter resulting in the tracking of the input signal over a narrow bandwidth.
In another aspect, the invention provides a method of adjusting bandwidth of a phase-locked loop circuit where the phase-locked loop circuit includes phase-locked loop for receiving an input signal having a first frequency, a voltage controlled oscillator for generating a locally developed signal having a frequency which tracks the first frequency and a wideband loop filter coupled between the phase-locked loop and the voltage controlled oscillator for dampening the response of the voltage controlled oscillator to allow for the tracking of the input signal over a broad bandwidth. The method includes providing a narrowband loop filter to allow for the tracking of the input signal over a narrow bandwidth and switching in the narrowband loop filter between the phase-locked loop and the voltage controlled oscillator wherein the narrowband loop filter effectively minimizes the effect of the wideband loop filter resulting in the tracking of the input signal over a narrow bandwidth.
In another aspect the invention provides a method for quickly locking a narrow bandwidth phase-locked loop circuit where the narrow bandwidth phase-locked loop circuit includes a phase-locked loop for receiving an input signal having a first frequency, a voltage controlled oscillator for generating a locally developed signal having a frequency which tracks the first frequency and a narrowband loop filter coupled between the phase-locked loop and the voltage controlled oscillator for dampening the response of the voltage controlled oscillator to allow for the tracking of the input signal over a narrow bandwidth. The method includes providing a wideband loop filter to allow for the tracking of the input signal over a wide bandwidth and switching in the wideband loop filter between the phase-locked loop and the voltage controlled oscillator while switching out the narrowband loop filter resulting in the tracking of the input signal over a wide bandwidth. Once lock onto the input signal is acquired, the narrowband loop filter is switched back in between the phase-locked loop and the voltage controlled oscillator resulting in the tracking of the input signal over a narrow bandwidth.
Aspects of the invention provide numerous advantages. Applications for the use of PLL devices may be expanded by providing an adjustable bandwidth PLL device. The invention provides for a fast PLL phase or frequency acquisition while maintaining a reduced PLL bandwidth in narrow bandwidth applications. Acquisition time for a narrow bandwidth PLL circuit may be improved by providing an adjustable PLL circuit that switches from wide band to a narrow band performance after acquisition. Other features will be apparent from the following description and claims.