Radio frequency (RF) signals often must be switched between two destinations, such as when switching an RF signal between a first antenna and a second antenna. Switches that support this configuration are classified as single pole, double throw (SPDT) switches.
SPDT switches known in the art are either solid-state devices or mechanical relays. Mechanical switches are generally quite large, compared to other RF components, and consume significant amounts of power. In communications applications, switches are often designed with semiconductor elements such as transistors or pin diodes. However, for high frequency RF signals in the gigahertz range and above, these devices could suffer from several shortcomings. For example, the device has high insertion loss, which is the loss across the switch when the switch is closed. On the other hand, the device has low isolation, which means signal ‘leakage’ across the switch when the switch is open. In addition, the insertion losses and isolation values for these switches varies depending on the frequency of the signal passing through the switches, which cause unevenness in frequency response and is unsuitable for broadband wireless communications. Isolation between the two output ports of the SPDT switch is of another concern, since coupling of the signal from one output port to the other output port limits the effectiveness of the switch as a dual output port device. Without proper circuitry to overcome the above-mentioned characteristics, semiconductor transistors and pin diodes would not function properly as switches in microwave applications.
FIG. 1A shows a basic prior art SPDT circuit, while FIG. 2A shows an improved prior art SPDT circuit with a parallel inductor. In FIG. 1A, a first switching device T101 such as a FET or PHEMT (Pseudomorphic High Electron Mobility Transistor) is positioned between the first port P1 and the second port P2. Correspondingly, a second switching device T102 is positioned between the second port P2 and the third port P3.
A simplified equivalent circuit with transistor off can be represented by a parasitic capacitor between the drain terminal and the source terminal. The insertion loss of the SPDT switch is determined by the resistance value between drain and source of each transistor. As shown in FIG. 1B, when a semiconductor switching device is turned on, the device can be modeled with a resistor R. When a switching device is turned off, the device can be modeled with a capacitor C. Thus, when the first switching device is turned on and the second switching device is turned off, an equivalent circuit between P2 port and P3 port can be modeled as a resistance in series with a capacitance, with P1 port at the junction between the resistance and capacitance. The resistance results in loss of signal strength, which is commonly known as insertion loss. In addition, the signal can leak through the capacitance of the “off state” switching device, especially at high frequency. For instance, as shown in FIGS. 1C and 1D, using R=4 ohms and C=0.4 pF, there is a −1.7 dB insertion loss in transmission at 5 GHz between P1 and P2 and −6.5 dB of isolation at 5 GHz between P1 and P3.
To reduce the insertion loss, inductors can be added in parallel to the switching devices. The inductance and the capacitance of the switching device becomes a LC resonator with high impedance at the resonating frequency. For example, two inductors L are added in parallel to the source and the drain ends or terminals of the switching device T201 and T202 of FIG. 2A. When the first switching device T201 is turned on and the second switching device T202 is turned off, the circuit of FIG. 2A can be modeled by an equivalent circuit as a resistor R in a parallel with the inductor L and a capacitor C in parallel with inductor L, as shown in FIG. 2B. Assuming that L=2.5 nH, the insertion loss in transmission between P1 and P2 has been improved to −0.5 dB at 5 GHz, as shown in FIG. 2C. Moreover, the isolation between P1 and P3 has been improved to −27 dB at 5 GHz as shown in FIG. 2D.
U.S. Pat. No. 5,774,792 uses such an approach where an SPDT switch includes a plurality of FETs, the FET on the receiver side through which a received signal passes and the shunt FET on the transmitter side are each formed of series-connected FETs, and a capacitor is connected between the first gate and the source and between the second gate and the drain. An inductance is connected in parallel with a series connection of FETs. Similarly, U.S. Pat. No. 6,693,498 uses a plurality of FETs in the SPDT switch and a first inductor connected in parallel to the first FET, and a second inductor connected in parallel to the second FET. The SPDT switch may further include a first inductor connected in series to the first FET, a first capacitor connected in parallel to the series connection of the first FET and the first inductor, a second inductor connected in series to the second FET, and a second capacitor connected in parallel to the series connection of the second FET and the second inductor.
In integrated circuits, size and space constraints are of primary importance. One problem with adding multiple inductors or other passive RF components to microcircuits is that the increase of the die size and thus increasing the cost of a switch.