Semiconductor and other types of electronic devices are often encapsulated wholly or partly in plastic resin to provide environmental protection and facilitate external connection to the devices. For convenience of explanation and not intended to be limiting, the present invention is described for semiconductor devices, but persons of skill in the art will understand that the present invention applies to any type of electronic device that is substantially in chip form. Accordingly, such other types of devices including the non-limiting examples given below, are intended to be included in the terms “device”, “electronic device”, “semiconductor device” and “integrated circuit” whether singular or plural, and the terms “device”, “die” and “chip” are intended to be substantially equivalent. Non-limiting examples of suitable devices are semiconductor integrated circuits, individual semiconductor devices, piezoelectric devices, magnetostrictive devices, solid state filters, magnetic tunneling structures, integrated passive devices such as capacitors, resistors and inductors, and combinations and arrays of any and all of these types of devices and elements. Further, the present invention does not depend upon the types of die or chips being used nor the materials of which they are constructed provided that such materials withstand the encapsulation process.
In certain types of electronic device packaging where connections to multiple devices included in the package are made after encapsulation, there is a problem referred to as warping that can occur during encapsulation. Warping is of particular concern in electronic assemblies that are in the form of a comparatively flat or planar panel whose device electrical connections are exposed on a principal surface. It is often desired to form an integrated electronic assembly by interconnecting the various devices in the panel using planar processing technology. If the panel has warped during encapsulation, the process of adding the interconnects becomes difficult, which can affect overall yield and cost. Thus, control or elimination of warping is important to achieving high manufacturing yields and low manufacturing costs in such encapsulated planar assemblies.
Accordingly, it is desirable to provide packaging for electronic devices that avoids or mitigates the adverse effects of warping during encapsulation. It is further desirable that the packaging is suitable for use with arrays containing multiple devices and/or multiple types of devices and especially device arrays where it is desired that the primary faces of the devices are available for electrical connections thereto by planar processing or the like after the devices are fixed in the encapsulation. In addition, it is desirable that the methods, materials and structures employed be compatible with available manufacturing capabilities and materials and not require substantial modifications of manufacturing procedures or substantially increase manufacturing costs. Furthermore, other desirable features and characteristics of the present invention will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and the foregoing technical field and background.