In a MOS transistor that amplifies radio frequency signals in, for example, WiMAX, a reduction in the size of each element is required. Thus, for example, the width and length of the gate of an amplifying MOS transistor are subject to variation during manufacturing. Thus, when MOS transistors are cascaded, and amplification is performed, necessary gain may not be achieved under the influence of a variation in gain. Gain “gain” of a MOS transistor can be expressed by equation 1 described below. In equation 1, R represents resistance associated with a MOS transistor, and gm represents mutual conductance.gain=gm·R  [equation 1]
According to the foregoing equation, the gain of a MOS transistor may be maintained constant by compensating for the mutual conductance gm. Thus, hitherto, a mutual conductance compensation circuit that compensates for the mutual conductance of a MOS transistor has been provided in an amplifier circuit.
FIG. 1 indicates the components of an amplifier circuit provided with mutual conductance compensation circuits. The amplifier circuit includes an amplifier unit 9, a first mutual conductance compensation circuit 7, a second mutual conductance compensation circuit 8, and MOS transistors 4, 5, and 6 for connecting the circuits to each other.
The amplifier unit 9 includes a first MOS transistor 1, a second MOS transistor 2, a third MOS transistor 3, a first inductor 15, and a second inductor 16. One end of each of the first inductor 15 and the second inductor 16 is connected to a drain-side voltage source AVD. The other ends of the first inductor 15 and the second inductor 16 are connected to the drains of the second MOS transistor 2 and the third MOS transistor 3, respectively. The source of each of the second MOS transistor 2 and the third MOS transistor 3 is connected to the drain of the first MOS transistor 1. Input signals are input to the gate of each of the second MOS transistor 2 and the third MOS transistor 3. The source of the first MOS transistor 1 is connected to a ground AVS.
One end of the first mutual conductance compensation circuit 7 is connected to the drain-side voltage source AVD. The first mutual conductance compensation circuit 7 is a circuit that generates current for controlling mutual conductance so that the mutual conductance is maintained constant. The other end of the first mutual conductance compensation circuit 7 is connected to the drain of the fourth MOS transistor 4. The source of the fourth MOS transistor 4 is connected to the ground AVS. The gate of the fourth MOS transistor 4 is connected to the drain of the MOS transistor 4. Moreover, the gate of the fourth MOS transistor 4 is connected to the gate of the first MOS transistor 1.
One end of the second mutual conductance compensation circuit 8 is connected to the drain-side voltage source AVD. The second mutual conductance compensation circuit 8 is a circuit that generates current for controlling mutual conductance so that the mutual conductance is maintained constant. The other end of the second mutual conductance compensation circuit 8 is connected to the drain of the fifth MOS transistor 5. The source of the fifth MOS transistor 5 is connected to the drain of the sixth MOS transistor 6. The source of the sixth MOS transistor 6 is connected to the ground AVS. The gate of the sixth MOS transistor 6 is connected to the gate of the first MOS transistor 1 and the gate of the fourth MOS transistor. The gate of the fifth MOS transistor 5 is connected to the drain of the fifth MOS transistor 5. Moreover, the gate of the fifth MOS transistor 5 is connected to the respective gates of the second MOS transistor 2 and the third MOS transistor 3 via resistors 17 and 18.
The first mutual conductance compensation circuit 7 generates current such that the mutual conductance gm of the first MOS transistor 1 is maintained constant and mirrors bias to the first MOS transistor 1, using the fourth MOS transistor 4.
The second mutual conductance compensation circuit 8 generates current such that the mutual conductance gm of the second MOS transistor 2 and the third MOS transistor 3 is maintained constant and mirrors bias to the second MOS transistor 2 and the third MOS transistor 3, using the fifth MOS transistor 5.
As a MOS transistor becomes smaller, manufacturing errors in the width and length of the gate of a MOS transistor become large, resulting in a difference in the mutual conductance gm, as indicated in FIG. 2. FIG. 2 indicates characteristics of a circuit in FIG. 1. In FIG. 2, a maximum value characteristic Max represents a MOS transistor having the largest mutual conductance. A minimum value characteristic Min represents a MOS transistor having the smallest mutual conductance. Reference letter Typ represents a MOS transistor having mutual conductance of a standard value characteristic. The standard value characteristic Typ is a characteristic based on the gate electrode width and the gate electrode length set in the design stage. It is assumed here that overdrive voltage Vod=gate-source voltage Vgs−threshold voltage Vth.
In FIG. 2, in order to compensate for the gain of a MOS transistor the mutual conductance gm of which is lower than that in the standard value characteristic Typ, as indicated by the minimum value characteristic Min, the overdrive voltage Vod needs to be increased. In order to compensate for the mutual conductance gm of each MOS transistor only by bias, Vgs needs to be increased until Vod=Vod0. However, even when Vgs is increased until Vod=Vod0, as indicated in FIG. 2, in a MOS transistor having the minimum value characteristic Min, in which the mutual conductance gm is far less than that in the standard value characteristic Typ, Vgs cannot be increased until the mutual conductance gm reaches mutual conductance gm1 in the standard value characteristic Typ. Thus, when the mutual conductance gm decreases, it may be impossible to compensate for the gain only by controlling the gate-source voltage Vgs of a MOS transistor.
On the other hand, in the case of a MOS transistor the mutual conductance gm of which is higher than that in the standard value characteristic Typ, as indicated by the maximum value characteristic Max, in order to compensate for the gain, the gate-source voltage Vgs needs to be controlled to be decreased so that Vod=Vod2. In this case, the mutual conductance gm can be compensated for. However, the overdrive voltage Vod decreases, and thus the amplitude of an input signal that can be linearly amplified decreases. That is, the linearity is deteriorated by compensating for the mutual conductance gm.
When variations occur in elements under the influence of the manufacturing process, the compatibility of compensation for the gain of a MOS transistor with compensation for the linearity cannot be achieved only by controlling the gate-source voltage Vgs.
Japanese Laid-open Patent Publication No. 2000-174568 is known as a technique for bias control for a variation in the gain of the amplifier unit 9.