The present invention relates to a dry etching apparatus for minutely processing patterns of semiconductor circuits or the like.
Plasma etching as a way of dry etching has been often carried out in process of manufacturing semiconductor devices in recent years.
A conventional dry etching apparatus will be depicted hereinbelow. FIG. 4 diagrammatically indicates an example of a reactive ion etching apparatus. The dry etching apparatus in FIG. 4 is provided with an upper electrode 2 and a lower electrode 3 in a vacuum chamber 1 via an insulating member 4. The lower electrode 3 is maintained at a constant temperature by a water-circulating type of temperature control device 5 through the circulation of water in an internal passage 6. A high frequency power source 8 is connected to the lower electrode 3 via an impedance matching circuit 7, bringing about plasma between the electrodes 2, 3.
Etching gas is introduced into the vacuum chamber 1 from a steel gas cylinder 9 through a valve 10 and a mass flow controller 11, which is discharged out by a vacuum pump 12. The pressure inside the vacuum chamber 1 is kept constant by a pressure controller 13.
More specifically, a predetermined etching gas is fed from the steel gas cylinder 9 through the valve 10 and the mass flow controller 11 into the vacuum chamber 1 in a direction of an arrow. When a high frequency power from the high frequency power source 8 is applied to the lower electrode 3, the etching gas is turned into the plasmic state. The etching gas in the plasmic state etches a to-be-etched member 14 disposed on the lower electrode 3.
The lower electrode 3 in the above conventional dry etching apparatus is schematically shown in a diagram in FIG. 5. The lower electrode is one disclosed in Japanese Laid-open Patent publication No. 6-204180. A surface of an aluminum base 3a of the lower electrode 3 to which the member 14 is to be attracted by the electrostatic force is coated with a film 3b of aluminum oxide. Meanwhile, the other surfaces of the aluminum base 3a which would come into contact with the etching gas are coated with an alumina ceramic 3c. A passage 6 for cooling medium is formed inside the lower electrode 3 so as to control the temperature of the to-be-etched member 14.
In the constitution as above, a semiconductor wafer 14 as the to-be-etched member is placed on the lower electrode 3 as indicated in FIG. 4. A high frequency power is applied between the electrodes 2, 3 while the etching gas is fed. At this time, the surface of the semiconductor wafer 14 is charged with negative electricity as a result of the cathode potential drop. In consequence, the lower electrode 3, specifically, aluminum oxide coating 3b is polarized, whereby an electrostatic attraction force is generated between the lower electrode 3 and the semiconductor wafer 14, thereby attracting the semiconductor wafer 14 to the lower electrode 3. In this 10 manner, while the semiconductor wafer 14 is maintained at a constant temperature close to the temperature of the lower electrode 3, plasma etching is carried out.
In the conventional method described hereinabove, the volume resistivity of the aluminum oxide coating 3b of the lower electrode 3 is 1.times.10.sup.12 through 1.times.10.sup.13 .OMEGA.cm in the etching process. Thus, it is difficult to remove the charged electricity from the coating 3b. Therefore, the amount of charge on the surface of the semiconductor wafer 14 is increased as the etching proceeds. As a result, the obtained semiconductor device may be broken subsequent to the electrical discharge as it the coating 3b is increasingly charged, or the electrostatic attraction force remaining even after etching may cause difficulties in transferring the wafer.