Leakage power dissipation is an important issue in the design of large scale integrated circuits such as microprocessors. Increased leakage, e.g., as a result of decreasing transistor dimensions, has resulted in the need for increased keeper sizes in dynamic circuits. Unfortunately, increased keeper sizes are not necessarily needed for all chips at all times in the same manner and can have undesirable results such as higher contention, higher power consumption, higher cross-over (short-circuit) current, and diminished performance. Accordingly, an improved keeper solution is desired.