In the semiconductor industry, there is a continuing trend toward higher device densities. To achieve such densities fabrication of small feature sizes and more precise feature shapes are typically required. For example, this can include fabrication of smaller width and spacing for: interconnecting lines, diameter of contact holes, and surface geometry, such as corners and edges. Accordingly, reducing the dimensions between such small features (critical dimensions—CDs) can facilitate achieving higher device densities.
At the same time, many factors can contribute to fabrication of a semiconductor. For example, at least one lithographic process can be used during fabrication of a semiconductor. This particular factor in the fabrication process is highly scrutinized by the semiconductor industry in order to improve packaging density and precision in semiconductor structure.
Typically, lithography is a process in semiconductor fabrication that relates to transfer of patterns between media. More specifically, lithography can refer to transfer of patterns onto a thin film that has been deposited onto a substrate. The transferred patterns can then act as a blueprint for desired circuit components. For example, various patterns can be transferred to a photoresist (e.g., radiation-sensitive film), which is the thin film that overlies the substrate during an imaging process described as “exposure” of the photoresist layer. During exposure, the photoresist is subjected to an illumination source (e.g. UV-light, electron beam, X-ray), which passes through a pattern template, or reticle, to print the desired pattern in the photoresist. Upon exposure to the illumination source, radiation-sensitive qualities of the photoresist permit a chemical transformation in exposed areas of the photoresist, which in turn alters the solubility of the photoresist in exposed areas relative to that of unexposed areas. When a particular solvent developer is applied, exposed areas of the photoresist are dissolved and removed, resulting in a three-dimensional pattern in the photoresist layer. This pattern is at least a portion of the semiconductor device that contributes to final function and structure of the device, or wafer.
Techniques, equipment and monitoring systems have concentrated on preventing and/or decreasing defect occurrence within lithography processes. For example, aspects of resist processes that are typically monitored can include: whether the correct mask has been used; whether resist film qualities are acceptable (e.g., whether resist is free from contamination, scratches, bubbles, striations, . . . ); whether image quality is adequate (e.g., good edge definition, line-width uniformity, and/or indications of bridging); whether critical dimensions are within specified tolerances; whether defect types and densities are recorded; and/or whether registration is within specified limits; etc. Such defect inspection task(s) have progressed into automated system(s) based on both automatic image processing and electrical signal processing.
Imprint lithography uses a patterned mask to “imprint” a pattern on a resist at a 1:1 feature size ratio. Imprint masks are defined at 1× (e.g., using an e-beam direct write). The 1× definition is an extremely expensive process in which errors can be costly. Moreover, critical dimension (CD) errors cannot be compensated after a lithography imprint mask has been fabricated. Thus, expensive imprint mask fabrication could result due to repeat manufacturing attempts based upon CD errors. Imprint mask integrity must typically be maintained throughout the lithography process because any flaw or structural defect present on a patterned imprint mask can be indelibly transferred to underlying layers during imprinting of a photoresist.
As such, the topography of the underlying substrate can affect the efficiency of the imprint mask and ultimately the chip performance. The topography of the underlying substrate, if not accounted for, can have a negative effect within imprint lithography based at least upon affecting the transfer into the underlying layer. The image transfer between the imprint mask and the image layer can reflect any flaw or defect based upon the long range topography. Thus, imprint mask integrity and topography considerations are crucial elements that must be considered or maintained throughout the lithography process. Current methods of pattern line formation on an imprint mask typically do not provide for a flexible approach that considers the topography variation on the wafer surface.
Therefore, there is a need to overcome the aforementioned deficiencies associated with conventional systems