1. Field of the Invention
This invention relates to dual-channel nanowire FET devices and more particularly relates to an apparatus, system, and method for dual-channel nanowire integration.
2. Description of the Related Art
Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs) are widely used for amplifying or switching electronic signals. A typical MOSFET has a substrate with a source and drain region doped into the substrate. A gate stack, which includes an insulator and a metal (or polysilicon) is then placed on the substrate between the source and drain. The area of the substrate between the source and drain is sometimes referred to as the depletion region.
Advances in technology have allowed the MOSFET to become smaller, faster, have lower leakage current, and have lower output resistance. As a conventional planar MOSFETs are scaled down, it becomes more difficult to control the channel in these devices because they have shorter gate lengths. One advance to enable further MOSFET scaling has been to use nanowires as the semiconductor channel. Nanowires have the advantage of having a gatestack that wraps around the channel. This, in part, improves the performance by enabling devices with short gate lengths to have better control of the channel than a conventional planar device. Some nanowire FETs have been manufactured by having stacked nanowires. Multiple nanowires help increase the current capacity of the FET device.