The present invention relates to a carrier aquisition apparatus for recovering the carrier from a received burst in a digital satellite communication system, and more particularly to a carrier recovery apparatus for recovering the carrier at high speed from the receive burst having undergone a significant frequency offset relative to the transmission speed of digital signals.
In a burst mode digital satellite communication system, it is necessary to promptly synchronize the reference carrier with the carrier component of the receive burst transmitted from another ground station via a satellite, and recover data from modulated digital data, for instance phase shift keying modulated data, contained in the received burst. For this reason, there are arranged in the received burst, preceding the transmit data section, a carrier recovery sequence for recovering the carrier, a bit timing recovery sequence for recovering the bit timing and a unique word for indicating the beginning of the transmitted data. In order to correctly recover the unique word and the data sequence from the receive burst, it is necessary not only to correctly extract a bit timing signal from the bit timing recovery sequence but also to promptly synchronize the reference carrier with the frequency and phase of this carrier recovery sequence while the carrier recovery sequence is being received.
A phase-locked loop (PLL) is used for this carrier recovery. For examples of this PLL, reference may be made to Namiki, Otani and Yasuda, "0 dB Eb/No Burst Mode SCPC Modem with High Coding Gain FEC" in the 1986 INTERNATIONAL CONFERENCE ON COMMUNICATION, and F. M. Gardner, Phaselock Techniques (1979, John Willey & Sons, Inc.) among others.
In a communication process in which signals are transmitted via an artificial satellite, a frequency offset occurs from the remaining effect of automatic frequency control (AFC) or the drift of the oscillator on the transmitting side. The maximum frequency offset can be typically in a usual satellite communication system. In low modulation rate burst signal transmission, however, the carrier offset becomes a serious problem for carrier recovery, as will be described below.
Here is supposed a case where a first order PLL is used which comprises a phase detector, a voltage controlled oscillator, and a loop filter whose transfer function F(s)=1. This first order PLL is characteristic in that the acquisition time is short even when the carrier power-to-noise ratio is low. Then suppose a case in which there is a frequency difference .DELTA.w (=2.pi..DELTA.f) between the carrier component of the received burst and the reference carrier. For the first order phase lock loop with a sinusoidal characteristic phase detector, the equation representing the response of a phase error .theta..sub.e (t) between the input carrier phase and the reference carrier phase is: ##EQU1## where K is the loop gain. In order to achieve a steady state of ##EQU2## In order to achieve phase lock, the relationship of ##EQU3## is required as derived from Equation (1). Therefore, if the frequency offset .DELTA.f exceeds ##EQU4## the PLL will become unable to be phase-synchronized with the input signal, making it difficult for the carrier to be recovered. Although the permissible frequency deviation .DELTA.w can be increased if the loop gain K is enlarged, a greater K would invite an increase in the phase jitter of the reference carrier, and therefore there is a certain limit to the enlargement of K. Accordingly, a wide frequency range for carrier acquisition cannot be covered by a single PLL. If the loop gain of the first order PLL is made 0.1.multidot.2.pi.f.sub.b when the modulation rate is f.sub.b (baud), the frequency offset which permits pull-in by a PLL will be .vertline..DELTA.f.vertline..ltoreq.0.1 f.sub.b. Then, in low rate transmission of f.sub.b =1200 to 9600 (baud), the upper limit of the frequency offset synchronizable by a phase synchronizing circuit will be 120 to 960 Hz. Therefore, it would be difficult to recover, with a single phase synchronizing circuit, the carrier from a received burst having a frequency offset of as great as 2 kHz.
A conceivable solution to this problem is parallel processing, i.e. a method using a plurality of demodulators having a different pull-in range from each other and obtaining demodulated signals from the demodulator having detected the greatest carrier component. This method, however, requires large hardware, because of the need for a plurality of demodulators, and accordingly is uneconomical.