The present invention relates generally to integrated circuits, and more particularly to an integrated circuit system for processing and displaying video and graphics.
Graphics display systems are typically used in television control electronics, such as set top boxes, integrated digital TVs, and home network computers. Graphics display systems typically include a display engine that may perform display functions. The display engine is the part of the graphics display system that receives display pixel data from any combination of locally attached video and graphics input ports, processes the data in some way, and produces final display pixels as output.
This application includes references to both graphics and video, which reflects in certain ways the structure of the hardware itself. This split does not, however, imply the existence of any fundamental difference between graphics and video, and in fact much of the functionality is common to both. Graphics as used herein may include graphics, text and video.
One embodiment of the present invention is a system having an input for receiving compressed video data and an input for receiving graphics data. The system also includes a video decoder for processing the compressed video data to generate a video for displaying, a display engine for processing the graphics data to generate graphics for displaying, and means for overlaying the video and the graphics to generate an output video. The display engine includes a memory used during conversion of a graphics format from a first format to a second format to be in a format compatible with a video format The memory may be implemented in a single-port RAM configured to simulate a dual-port RAM. The single-port RAM may be a single-port SRAM and the dual-port SRAM may refer to a dual-port SRAM. The system may be integrated on an integrated circuit chip.
Another embodiment of the present invention is a method of processing video and graphics. The method includes receiving compressed video data, receiving graphics data, processing the compressed video data to generate a video for displaying, processing the graphics data to generate graphics for displaying, and overlaying the video and the graphics to generate an output video. The graphics format is converted to a format compatible with a video format using a single-port RAM configured to simulate a dual-port RAM.
Yet another embodiment of the present invention is a memory access system, which includes an input for receiving first data and an output for providing second data. The memory access system also includes a single-port RAM, which is configured to simulate a dual-port RAM, and one or more registers to store at least two words of the first data to be used during a write operation. Two words of the second data are read concurrently in a read operation during a first memory access cycle, and two words of the first data are written concurrently in the write operation during a second memory access cycle.