Japanese patent application no. 2000-220497, filed Jul. 21, 2000 is hereby incorporated by reference in its entirety.
The present invention relates to a semiconductor device which stores data by storing an electric charge, a method for refreshing the semiconductor device, and electronic equipment equipped with the semiconductor device.
A VSRAM (Virtually Static RAM) is one type of semiconductor memory. Although memory cells of the VSRAM are the same as memory cells of a DRAM, the VSRAM does not need multiplexing of the column address and the row address. Moreover, the VSRAM can be used without taking refreshing into consideration. Specifically, the VSRAM is provided with transparency of refreshing.
An object of the present invention is to provide a semiconductor device including a memory cell array, in which memory cells for which refreshing is needed are arranged in an array, a method for refreshing the semiconductor device, and electronic equipment equipped with the semiconductor device.
One aspect of the present invention provides a method for refreshing a semiconductor device including a memory cell array, in which memory cells for which refreshing is needed are arranged in an array,
wherein the memory cell array is divided into a plurality of blocks, and
wherein data read or write in one block among the plurality of blocks and refreshing in at least one of the other blocks among the plurality of blocks are performed concurrently.
The term xe2x80x9ctwo events are performed concurrentlyxe2x80x9d used in this specification means that at least part of the events overlaps each other in time during the execution of the events.
Another aspect of the present invention provides a semiconductor device including a memory cell array, in which memory cells for which refreshing is needed are arranged in an array,
wherein the memory cell array is divided into a plurality of blocks, and
wherein the semiconductor device includes a control section which controls data read or write in one block among the plurality of blocks and refreshing in at least one of the other blocks among the plurality of blocks to be performed concurrently.