1. Field of the Invention
The present invention relates to a semiconductor structure, and more particularly, to a semiconductor structure having an epitaxial layer filling a recess, in which the cross-sectional profile of the epitaxial layer is an octagon.
2. Description of the Prior Art
For decades, chip manufacturers have made metal-oxide-semiconductor (MOS) transistors faster by making them smaller. As the semiconductor processes advance to very deep sub micron era such as 65-nm node or beyond, how to increase the driving current for MOS transistors has become a critical issue.
In order to improve device performance, crystal strain technology has been developed. Crystal strain technology is becoming more and more attractive as a means for getting better performance in the field of CMOS transistor fabrication. Putting a strain on a semiconductor crystal alters the speed at which charges move through that crystal. Strain makes CMOS transistors work better by enabling electrical charges, such as electrons, to pass more easily through the silicon lattice of the gate channel.
FIG. 1 is a schematic, cross-sectional diagram illustrating a semiconductor structure applying epitaxy technology in accordance with prior art. As shown in FIG. 1, the semiconductor structure 10 includes a substrate 12, a gate structure 14, a source/drain region 16, two recesses 18 and an epitaxial layer 19. The gate structure 14 includes a gate dielectric layer 14a, a gate electrode 14b, a spacer 14c and a capping layer 14d. The source/drain region 16 and the recess 18 are formed within the substrate 12 adjacent to two sides of the spacer 14c, and a gate channel 20 is formed beneath the gate structure 14 and between the recess 18 to electrically connect the source/drain region 16. The compressive stress or the tensile stress caused by the epitaxial layer 19 is generated on either side of the gate channel 20, thereby increasing the electron or hole mobility in the gate channel 20.
In general, the shape, the size and the relative position of the recess 18 must be formed as shown in FIG. 1 to achieve electrical mobility in the gate channel 20, in which the recess 18 is a diamond shaped structure having a plurality of the slanted sidewalls, and the compressive stress or the tensile stress generated on either side of the gate channel 20 caused by filling the epitaxial layer 19 will increase the electrical or hole mobility of the gate channel 20. However, the process will oblige the gate channel 20 so narrow that the gate structure 14 may collapse and the short channel effect will cause circuit leakages. Moreover, applying the prior art approach (as shown in FIG. 1) to etch the recess 18, the sidewalls of the recess 18 will have an angle A1 pointing to the gate channel 20, and the angle A1 may cause a point discharge and give rise to circuit leakages caused by the short channel effect. Also, the angle A1 beneath the gate structure 14 may easily result in the gate structure 14 collapse because of the stress concentration. Moreover, because the lower part of the recess 18 appears as a V-shaped profile, the angle A2 of the bottom of the recess 18 may also result in circuit leakages.