The present invention relates to Very Large Scale Integrated (VLSI) semiconductor circuit devices and particularly to a macro structural arrangement and method for generating macros for VLSI semiconductor integrated circuits.
VLSI semiconductor circuit devices typically define complex systems including an extremely great number of circuits and multiple functional macros. The term circuit designates an entity consisting of one or two cells or areas of silicon containing circuit components. The term macro designates an entity consisting of many cells arranged for a particular function, such as a memory or a programmable logic array (PLA).
Due to the complexity and the extremely great number of circuit components or cells that must be contained on one semiconductor substrate in a VLSI device or chip, a custom design approach is not practical. The custom design approach, as is known in the art, may be defined as a technique to obtain maximum utility of the area of the semiconductor substrate, or chip, for the circuits implemented on a particular substrate, or chip, by individually designing the component locations and metalization connections for each circuit. In the custom design approach, the chip designer is unconstrained and has essentially total freedom to optimize the design to meet the density and performance requirements of the application. However, these advantages are outweighed by the inherent deficiencies of the required design time and design expense.
Various different design approaches have been proposed and utilized in the art to reduce the deficiencies of the custom design approach. One effective approach implemented by the assignee of the present application is a master-image approach that is described in Donze et al., "Masterimage Approach to VLSI Design", IEEE Computer publication December 1983 pp. 18-25 and further described in Donze et al, "PHILO-A VLSI DESIGN SYSTEM", IEEE-ACM Nineteenth Annual Automation Design Proceedings, 1982 (ISSN 0146-7123, Library of Congress No. 76-150348). The disclosures of the above-identified publications are incorporated herein by reference. The PLA macro generation program described in these publications enables the chip designer to generate a variable-size PLA macro by varying the horizontal direction with the vertical direction fixed. The selected size PLA macro is designed prior to the physical design of the chip and stored as an entity in a design library.
The master image computer design system utilizes the library of predesigned circuits and functional macros. An overall chip image for a particular VLSI device is generated utilizing selected circuits and macros from the library that are placed on the chip image and then wired automatically to generate a physical description necessary to build the masks for the desired system. Automatic placement and wiring programs consist of placement, global wiring and detailed wiring routines. A delay calculator/optimizer program is used in conjunction with these routines for optimizing performance characteristics for the desired system.
Static random access memories (RAMS) are widely used in VLSI semiconductor devices. Present master image computer design systems generate semiconductor chip designs utilizing available versions of RAM macros having fixed sizes. Many of the predesigned RAM macros have been designed by custom design technique with high circuit density in order to minimize semiconductor area and to provide high performance characteristics for the memories. This custom RAM macro design approach, while providing individual, fixed size RAM macros with the advantages of high integration density and high speed, does not facilitate the generation or design of an individual RAM macro with a selected storage capacity. To the contrary, generating a design or physical description for a particular RAM macro having a particular desired storage capacity is normally a very time consuming and difficult task. Accordingly, chip designers typically select one of the available RAM macros from the library that has sufficient size for his particular application.