Those skilled in the art will appreciate the scope of the present disclosure and realize additional aspects thereof after reading the following detailed description of the preferred embodiments in association with the accompanying drawing figures.
An important process in the manufacturing of semiconductor product is operations testing. Through the performance of operations testing, the semiconductor manufacturer ensures that quality integrated circuit (IC) packages are being sold to their customers. Generally, the process is highly automated and requires sophisticated electronic-mechanical system typically referred to as test handlers. Test handlers may include robotic electromechanical machinery used for transporting an IC package to a test site. Once at the test site, the IC packages are inserted into a test socket on a printed testing board. There, the printed testing board performs an operations test and subsequently a pick and place handling device takes the tested IC packages to a location in a binning area. Unfortunately, this creates a bottleneck in the throughput of the typical test hander. In essence, the bottleneck is created during the organization of the IC packages because each of the IC packages must be handled by the test handler in order to place the IC packages in the appropriate binning area.
What is needed then are methods and systems that reduce the handling of the IC packages in order to increase the throughput of the test handler.