1. Field of the Invention
The present invention relates generally to integrated circuits, and more particularly to reduced-size transistors.
2. Background of the Invention
The present invention relates generally to electronics and more particularly to electronic components.
Semiconductor devices such as transistors, are formed in and upon semiconductor substrates. These circuit elements are interconnected by contacts and vias, which connect to patterned conductor layers which are separated by various dielectric layers.
A critical objective of the semiconductor industry has been to continually decrease the size of semiconductor devices to increase performance and reduce cost for applications such as cellphones and portable CD players. As semiconductor technology has advanced, there has been a continuing concentration on reducing the size of the semiconductor devices to allow for increased levels of circuit integration, improved performance, and higher density.
As the advancement in semiconductor technology accelerates according to Moore's Law, much of the work being done is to reduce the channel length of for semiconductor devices such as transistors. However, as the size of the transistor is reduced, the punch-through performance, threshold voltage roll-off, and other short channel effects become problematic.
Performance of shrinking transistors, like off/on state current, threshold roll-off, etc. are becoming a major concern. Moreover, for short-channel devices, the threshold voltage and leakages are reaching the point where the transistors would not be operational.
As semiconductor devices continue to be reduced in size, it is clear that a breakthrough solution to these problems is required for continued success in reducing semiconductor device size and thus increasing device integration, performance, and function while at the same time reducing cost.
Solutions to these problems have been long sought, but have also long eluded those skilled in the art.