The present invention relates to a method and apparatus for processing data within a set-top decoder such as that used to receive digital television signals. In particular, the invention relates to a method and apparatus for preventing the overflow of data in a buffer while maintaining compliance with an interface timing performance standard such as the RS404-A standard of the Electronic Industries Association (EIA).
Technology for the transmission of digital television signals continues to advance in view of increasing consumer demand. Digital television signals provide a sharp picture and a high-fidelity audio signal, in addition to providing the viewer with a larger selection of available programming. In fact, digital programming is expected to eventually supplant existing analog schemes.
Various transmission standards have been created, including the Motion Picture Expert Group's MPEG-2 standard and the similar Digicipher II standard which is proprietary to General Instrument Corporation of Chicago, Ill., U.S.A. Additionally, the RS404-A performance standard has been promulgated by the Electronic Industries Association (EIA) to provide a baseline for interface timing during the transmission of asynchronous (e.g., start-stop) data. The standard is set forth in the documents entitled "Standard for Start-Stop Signal Quality Between Data Terminal Equipment and Non-Synchronous Data Communication Equipment--EIA Standard RS-404", Electronic Industries Association, Washington, D.C., U.S.A., Mar. 1973; and "Application of Signal Quality Requirements to RS-449--Addendum No. 1 to RS-334-A and RS-404," Electronic Industries Association, May 1983. In particular, the RS404 standard is a performance standard which specifies the quality of serial binary signals which are exchanged across an interface between start-stop (e.g., asynchronous) data terminal equipment (such as a processor or teleprinter) and non-synchronous data communications equipment (such as a data set or signal converter) as defined in EIA standard RS-232-C. The data communications equipment is considered to be non-synchronous if the timing signal circuits across the interface are not required at either the transmitting terminal or the receiving terminal.
Digital television signals may be delivered as asynchronous data to a set-top box (e.g., decoder) of the television. Various interface, syntax, buffer requirements and decoder timing requirements must be established. In particular, to minimize the cost of the decoder, it is desirable to minimize the size of the memory which is required to temporarily store the received data until it can be processed and displayed.
In general, an asynchronous data component is one in which data is delivered at low rates without an accompanying clock. The data comprises a succession of characters which are delivered irregularly. This is the type of data which is typically used by the RS232-C serial port of a personal computer. The RS-232 standard is described in the document entitled "Interface Between Data Terminal Equipment and Data Communication Equipment Employing Serial Binary Data Interchange," Electronic Industries Association.
In an asynchronous, or start-stop system, a group of code elements which correspond to a character is preceded by a start element which prepares the receiving equipment for the reception and registration of a character, and is followed by a stop element during which the receiving equipment comes to rest in preparation for the reception of the next character. In a continuous start-stop system, a signal represents a series of characters which follow one another at a nominal character rate. In contrast, in a synchronous system, the sending and receiving data terminal equipment are operating continuously at substantially the same frequency, and are maintained in a desired phase relationship, for example, using a phase-locked loop.
The RS404-A specification for interface timing describes the timing parameters which are associated with each received bit of a character, as well as the start and stop bits. In particular, the minimum description of an asynchronous character requires ten bits, namely, one start bit, seven data bits, one parity bit, and one stop bit. Optionally, two stop bits instead of one may be provided. Additionally, parity may be even or odd. Alternatively, there may be no parity, in which case eight data bits are provided in each character. The term "mark" is associated with a "1", and the term "space" is associated with a "0". The RS232-C standard essentially describes signal voltage levels above +3 volts (V) as representing a space, while a voltage level below -3 V represents a mark, among other electrical interface parameters.
For asynchronous data components that conform to the RS404-A and RS232-C standards, and with data at nominal rates of 1,200, 2,400, 4,800, 9,600 and 19,200 bits per second (bps), processing of the asynchronous data at an encoder must accomplish various tasks. Specifically, the encoder must input serial data, remove start and stop bits, buffer the resulting eight-bit bytes, build packets of these bytes according to the asynchronous data syntax, and send (e.g., transmit) each packet when constructed. The sending of the packets should be delayed to approximately match the video throughput delay of the system, or, if a packet is only partially full because data arrival is irregular, the encoder should implement a latency time-out of, for example, one second. Moreover, the multiplexing and transmission of the asynchronous data packets should conform to a decoder model.
Generally, the decoder must reverse the steps performed by the encoder. In particular, the decoder must buffer the received data. To provide maximum flexibility for multiplexers, a decoder model will typically include a 512 byte transport buffer which is defined for video, audio and isochronous data service components. After removing transport headers and adaptation fields, if any, and the data syntax overhead, the remaining bytes are sent to the main asynchronous data buffer of the decoder similar to MPEG Systems buffer applications. The transfer time is defined assuming that a character rate parameter which corresponds to a minimum average character interval of the RS404-A standard is input to the encoder. A character interval is the duration of a character expressed as the total number of unit intervals, including information, error checking and control bits and the start and stop elements, which are required to transmit a character. As explained in the RS404-A specification, a unit interval is the duration of the shortest nominal signal element. That is, the unit interval is the longest interval of time such that the nominal durations of the start and information elements are integer multiples of the unit interval. A model decoder main buffer is assumed to include 4 msec. of information plus thirty-two bytes. Bytes (e.g., asynchronous data "access units") are removed from the model main buffer at the rate described. The purpose of the decoder buffer model is to define constraints for the encoder. That is, the encoder must build the transport multiplex such that neither the transport nor the main buffers overflow.
As with video, audio and isochronous data, an actual decoder implementation may not match the model in detail. For example, generally, only a single decoder buffer is required, and it must be larger than the size which is suggested by the model. In addition, the decoder buffer may only store asynchronous data bytes, without header information.
The decoder must produce a clock signal to output the asynchronous data from the decoder buffer while not knowing the exact value of the rate. Usually, any clock rate which is close to the nominal bit rate will be effective since the data arrival at the decoder is generally irregular. However, in the case of continuous start-stop operation as described by the RS404-A standard, it is possible for a decoder built with a nominal clock generation to overflow (i.e., overfill its data buffer) when the minimum average character interval is used.
Accordingly, it would be desirable to provide a method and apparatus for avoiding overflow of a decoder buffer. In particular, the scheme should prevent a buffer overflow when using the continuous start-stop operation as described by the RS404-A or similar standard, while also minimizing a data output rate tolerance. The scheme should further provide an output data rate tolerance which conforms to a data rate performance standard such as the RS404-A standard. The present invention provides a method and apparatus having the above and other advantages.