1. Field of the Invention
The present invention relates to a digital TV capable of receiving both a digital video signal and an analog video signal, and more particularly, to a device for supplying display clock which matches each format of a received video signal.
2. Description of the Related Art
A digital television (TV) requires various digital video signals to be displayed based upon a format of each digital video signal. Further, the digital TV should not only receive and display a conventional NTSC broadcasting, but should also receive an analog signal from other receivers such as a digital set-top-box and a digital video cassette recorder (VCR) and perform an on-screen-display (OSD) operation.
Standard digital TV specifications for the United States define eighteen kinds of formats for digital video signals. Thus, a digital broadcasting receiver receives and restores eighteen formats of video signals which can be transmitted, and then displays the same. Here, since there is a restriction that video signals of respectively different formats should be displayed on a single display device, an input video format is converted into a format which matches the display device to then be displayed. A currently adopted display video format utilizes a 1920Hxc3x971080V interlace method, wherein H is the number of horizontal pixels and V is the number of vertical scanning lines, and an actual signal becomes 2200Hxc3x971125Vxc3x9760F in which F denotes a field. In this case, a clock frequency necessary for displaying a video signal becomes 74.25 MHz. Here, the clock of the necessary frequency is supplied by a crystal oscillator.
The digital broadcasting receiver having the above-defined display format can receive and display digital video signals of 60 fields and 59.94 fields. Further, the digital broadcasting receiver can receive and display an analog NTSC video signal whose standard frequency is 59.94 Hz. For this reason, one frame is missing every 1000 frames, resulting in a skip or repetition phenomenon of a signal which causes picture degeneration.
Meanwhile, the use of a graphic generator for an OSD operation is separately provided in the prior art. However, the digital TV can display an Electronic Program Guide (EPG) and Program Specific Information (PSI), by use of a video processor having a built-in graphic function. As a result, the digital TV cannot perform an OSD operation smoothly when it receives and displays an analog video signal of a 1080 interlace format from an external video signal receiver such as a set-top-box.
To solve the above problems, it is an object of the present invention to provide a device for generating a display clock which matches the different formats of received video signals.
To accomplish the above object of the present invention, there is provided a clock generating device for use in a digital video apparatus for displaying video signals having different input formats which are converted into a predetermined display format, the clock supply device comprising: a first clock generation unit for generating a clock of a frequency necessary for displaying video signals of a respectively different format which are received as digital and analog broadcastings; a second clock generation unit for generating a clock of a frequency necessary for displaying an externally received analog video signal of the same format as the display format; a phase locked loop (PLL) unit for phase-locking with a clock corresponding to a currently received video signal format between the clock frequencies generated from the first and second clock generators, and supplying a display clock for performing a display which matches the video signal format; and a display unit for format-converting the received video signal according to the display clock and displaying the format-converted result.