1. Field of the Invention
The present invention relates to a semiconductor memory device having a shallow trench isolation (STI) structure. In particular, the present invention relates to a semiconductor memory device including a static random access memory cell (SRAM cell).
2. Description of the Related Art
In recent years, SRAMs have a problem of causing a soft error resulting from cosmic rays such as α rays and neutron beams because scale-down of the element pattern and low voltage of the power supply have been advanced. More specifically, the signal charge held by the SRAM cell itself is remarkably smaller than other semiconductor devices, such as DRAM. For this reason, the amount of charge generated by the incidence of the cosmic rays becomes relatively larger than the signal charge held by the SRAM cell. If the charge by the cosmic rays reaches a storage node, data held in the storage node is inverted. The charge of the storage node held by the SRAM cell depends on the area of cell and a power supply voltage. Therefore, the charge held by the storage node is further reduced in accordance with scale-down of the element pattern and low voltage of the power supply. This is a factor of giving a great influence to the foregoing scale-down of the element pattern and low voltage of the power supply in the future technical generation.
For example, there has been conventionally known the following technique disclosed in JPN. PAT. APPLN. KOKAI Publication No. 10-79440 as a means of solving the problem of causing the soft error in the SRAM. According to the technique disclosed in the Publication, a conductive film is buried in a trench for STI, and thereafter, an insulating film is formed thereon. A gate electrode is further formed on the insulating film. In the way, capacitance is secured between the conductive film and the gate electrode; therefore, the capacitance of a storage node of the memory cell is increased.
However, according to the foregoing conventional technique, specific contact and interconnect are required in order to apply an electric potential to the conductive film buried in the trench for STI. As a result, the chip area increases.