Integrated circuit design in the deep-submicron process nodes (e.g., 32 nm and beyond) involves a number of non-trivial challenges, and circuits incorporating microelectronic components generated by patterning techniques have faced particular complications at these levels, such as those with respect to achieving small device features. Continued process scaling will tend to exacerbate such problems.
As will be appreciated, the figures are not necessarily drawn to scale or intended to limit the claimed invention to the specific configurations shown. For instance, while some figures generally indicate straight lines, right angles, and smooth surfaces, an actual implementation of an integrated circuit structure may have less than perfect straight lines, right angles, and some features may have surface topology or otherwise be non-smooth, given real world limitations of the processing equipment and techniques used. In short, the figures are provided merely to show example structures.