The present invention relates in general to digital-to-analog converters, and more particularly to the segmented type of converter having multiple resistor sections for carying out the conversion process.
In mixed signal circuits which involve both analog and digital signals, circuits are generally required for converting the analog signals into corresponding digital signals, and vice versa. Digital-to-analog converters provide an analog output as a function of the digital input. Many different varieties of conversion circuits are commercially available to satisfy the various constraints required, such a speed, resolution, differential non-linearity, monotinicity, etc. The digital-to-analog conversion process can be carried out according to different techniques, including the use of weighted current sources, R-2 ladder networks, as well as many other well-known conversion schemes. Because of the wide utilization of microprocessors employed to process digital information, it is a common practice to integrate digital-to-analog converters on the microprocessor chip. Because the use of chip area is always a concern, the minimization of components is therefore of paramount importance.
In a rudimentary digital-to-analog converter having a 12-bit resolution, as many as 4,096 series resistors can be utilized to produce a different magnitude of analog voltage in response to each of the 4,096 digital words. The amount of semiconductor space required for all these resistors would be prohibitively large. In addition to each resistor, there are required corresponding switches across each resistor for selecting voltage levels in response to different input digital combinations.
A segmented digital-to-analog converter (DAC) provides an adequate solution to the problem of a large number of resistors to carry out the conversion algorithm. FIG. 1 of the drawings illustrates two resistor segments or strings of a 12-bit DAC 10. The digital-to-analog converter 10 includes a main DAC 12 and a subsidiary (xe2x80x9csubxe2x80x9d) DAC 18. The main DAC 12 includes a number of series resistors to provide 2x different analog levels in response to X most significant digital bits.
A sub-DAC resistor string 18 includes a number of series-connected resistors to provide 2y different analog levels for the least significant bits of the DAC 10. The DAC 10 includes X+Y digital input bits, and produces 2(x+y) analog levels. A fewer number of resistors are required in a segmented DAC driven by a corresponding number of digital input bits.
A first switch multiplexer 20 is connected between the main DAC resistor string 12 and the sub-DAC resistor string 18. The switch multiplexer 20 is of conventional design for allowing the sub-DAC resistor string 18 to be connected in parallel to any one or more of the resistors in the main DAC resistor string 12. The switch multiplexer 20 is required to provide connections to 2x different resistor combinations in the main DAC 12.
The sub-DAC 18 also includes a switch multiplexer 22 for selecting 2y different resistance values. The output 24 of the second switch multiplexer 22 is connected to an operational amplifier 26. An output 28 of the amplifier 26 provides 2(x+y) different analog outputs corresponding to the different combinations of the X+Y digital bits applied to the DAC 10.
While the switch connections between the main DAC resistor string 12 and the sub-DAC resistor string 18 provides a multiplying function and reduce the number of resistors required to complete the X+Y bit conversion, various shortcomings of this arrangement exist. For example, the coupling of the sub-DAC resistor string 18 to the main DAC resistor string 12 can present an unbalanced load thereon, as a function of the overall resistance of the sub-DAC resistor string 18. This can occur when the individual resistors of the string 18 are switched in or out of the circuit. When an unbalanced load is connected across the main DAC resistor string, a nonlinear conversion results. While FIG. 1 illustrates that only the main DAC resistor string 12 is supplied with a reference supply voltage, the same loading factor exists when the sub-DAC resistor string 18 is independently powered by a reference supply voltage. Various attempts have been made in the prior art to overcome this loading problem between the main and sub-DAC resistor strings. As noted in the background portion of U.S. Pat. No. 4,338,591 by Tuthill, there is proposed the remedy of placing a buffer amplifier between the main DAC resistor string and the sub-DAC resistor string. The buffer amplifiers do effectively isolate the main and sub-DAC resistor strings. But, substantial semiconductor area is required to isolate the resistor strings with a pair of buffer amplifiers. Also, the dynamic range of the main DAC is severely limited by the input range and the finite common mode rejection of the buffer amplifiers.
Instead of isolating the main DAC and the sub-DAC resistor strings with buffer amplifiers, the use of current sources is suggested in U.S. Pat. No. 5,703,588 by Rivoir et al. By utilizing a constant current to drive the main DAC and another constant current source to drive the sub-DAC, a balanced operation therebetween can be accomplished so that neither resistor string draws current from the other. The loading problem is thus alleviated, irrespective of the switch connections. When utilizing current sources, it is imperative that the output impedance thereof is some orders of magnitude higher than the voltage of the resistor string being driven. Otherwise, inaccuracies in the conversion process become significant, especially when large voltage excursions in the sub-DAC are experienced.
Current mirrors are well known for use as current sources and current sinks in DAC resistor strings. While accurate current control can be achieved, the output impedance of such a structure is not always as high as desired. Utilizing two transistors in series as either a current source or a current sink in a DAC resistor string could increase the output impedance of the current source by a factor of the gain of the second transistor. This solution can cause other problems.
It can be seen from the DAC 10 shown in FIG. 1 that, depending on the switch setting of the switch multiplexers 20 and 22, analog voltages very near the reference voltage, or very near the circuit common voltage (ground) can be coupled to the output amplifier 26. Unless expensive, precision instrumentation amplifiers are utilized, a wide dynamic input range (rail-to-rail) of amplifiers is not always available. However, it is most desirable to design DAC resistor strings that operate xe2x80x9crail-to-railxe2x80x9d, otherwise wasted voltage ranges due to headroom resistors must be used. In other words, to reduce the dynamic range over which the amplifier must operate, resistors can simply be placed in series at the top and/or bottom of the DAC resistor strings. Such resistors waste power and require additional semiconductor area.
The accuracy in the conversion of the digital input to an analog output is a function of the values of the resistors with which the resistor strings are formed in the semiconductor material. While exact value resistors are difficult to form in integrated circuits, the repeatability of making a nominal resistance value is high.
The value of the DAC resistors themselves is only one consideration in forming or scaling accurate resistance values for the resistor strings. Another consideration is the contact resistance for each semiconductor resistor. Since each resistor has two contacts, there may be a contact resistance in series with each semiconductor resistor. U.S. Pat. No. 5,343,199 illustrates DAC resistor strings where the various segments of a resistor string are connected together by metal contacts. When utilizing resistors of different values, the contact resistance presents a problem when attempting to scale the resistor values. For example, if the resistance for each contact is 10 ohm. Then the total resistance for a nominal 1 k resistor would be 1,020 ohm. If it were desired to make one resistor that is exactly ten times the 1 k value, then the total resistance of that resistor would be 10,020 ohm. The scaling of semiconductor resistors is thus difficult. In various DAC resistor strings, the values of resistors can be multiples of the others, and thus it is difficult to make the resistors with any degree of precision.
Even when the contacts are not directly in series with the individual resistor elements of the resistor string, the process variations in forming the contacts to the various resistor elements can adversely affect the values of the resistors. In those situations when the resistor string itself is one continuous resistor formed as a polysilicon strip or some other resistive material, or otherwise, the formation of a contact or tap overlying and in electrical contact with the polysilicon strip may affect the resistance of that part of the polysilicon underlying the contact.
It has been found that the repeatability of resistors having desired values is affected by the location of the resistors on the semiconductor material, as a function of what electrical components are formed adjacent to the resistors. Resistors formed adjacent other resistors tend to be more uniform in value than resistors formed near different components, such as transistors, capacitors, etc. Hence, it has been found that by forming dummy resistors on each lateral side of a number of active resistors, the active resistors are better matched in value. While the formation of dummy resistors adjacent the active resistors improves the resistor value matching, additional semiconductor area is required for nonactive resistor components.
The variation in resistor values as a result of semiconductor processing is realized by those skilled in the art, and as set forth in U.S. Pat. No. 5,343,199 by Sugawa. Each resistor string of the D/A converter is fabricated as two separate resistor strings, but with various nodes of one resistor string short circuited to the same voltage nodes of the other resistor string. Moreover, the voltage strings are cross-connected in a reverse manner so that the supply voltage of one end of one resistor string is the ground end of the companion resistor string. In this manner, with variations in resistance values due to process differences, the nodes are forced to the same voltage by the metal cross connects. Although additional metal cross connects are required, as well as the semiconductor area required to accommodate the metalization, the non-linear conversion error is reduced. However, when a voltage is extracted at a node of the resistor string that is not short circuited to a similar-voltage node of the companion resistor string, there can still exist a non-linear error due to the processing difference of resistors values.
It can be seen that a need exists for a DAC that utilizes current sources for isolating the DAC resistor strings, but where such current sources have a high output impedance, without substantially affecting the output rail-to-rail operation of the DAC. Another need exists for a digital-to-analog converter having a main DAC resister string and a sub-resistor string, and where the current which drives the main DAC resistor string is replicated in a specified ratio to the sub-resistor string. Another need exists for a DAC that utilizes resistors formed with a higher degree of repeatability to thereby enhance the accuracy of the conversion process.
The present invention disclosed and claimed herein, in one aspect thereof, comprises a segmented DAC including a main DAC resistor string driven by a highly accurate reference voltage buffer which drives the main DAC resistor string with a specified current. The current in the sub-DAC resistor string is a replica of the current in the main DAC resistor string. In the preferred form of the invention, the current source driving the sub-resistor string mirrors the current in the main DAC resistor string. The sub-resistor string current source operates from the top voltage rail and is formed as two transistors operating in series, thereby substantially increasing the output impedance thereof. The use of a headroom resistor in the main DAC resistor string allows the cascode current source of the sub-DAC resistor string a sufficient operational voltage range.
The bottom end of the main DAC resistor string is terminated in an offset resistance, thereby providing an intentional offset voltage. A regulated current sink is connected to the bottom end of the sub-DAC resistor string. The offset voltage allows a sufficient operational voltage range for the current sink. Although the current sink has only a single transistor in series with the sub-DAC resistor string, it is configured with negative feedback to increase the output impedance thereof.
Because the main DAC resistor string does not operate rail-to-rail, the output amplifier of the DAC is configured to produce a gain such that the output voltage of the DAC swings from substantially the reference voltage to ground. The headroom voltage and the offset voltage introduced in the D/A conversion circuits are thus negated in the output amplifier stage.
In order to make the DAC with accurate resistance values, the resistors of each string have a nominal resistance value. In this manner, the contact resistance is scaled together with the overall resistance of each resistor.
According to another aspect of the invention, the headroom resistor utilized in the main DAC resistor string also functions as a dummy resistor for compensating the street effect of the main DAC resistor string. Preferably, the headroom resistor is formed in the semiconductor material as N equal valve resistors, in close proximity to the N resistors of the main DAC resistor string.
According to a further aspect of the invention, the non-linear conversion error is reduced by forming the main DAC resistor string as two sets of resistor strings. Transistor switches are employed to cross connect similar voltage nodes of each set of main DAC resistor strings. Should the nodes be at slightly different voltages due to different resistor values resulting from semiconductor process variations, the switches will average the node voltages. Moreover, the switches are configured to select the voltage across one resistor of each set of Main DAC resistor string sets, and couple such voltage to the sub-DAC resistor string.