The present invention relates to a detection circuit for detecting a number of pulses, and more particularly to a circuit detecting the number of data pulses within a predetermined frame which are read-out from a digital equipment such as a digital audio disk player of a compact disk type.
In a digital audio system, audio signal information is recorded into a disk in a form of digital signals, and hence it is read-out from the disk by a pickup as pulse signals. In addition, each digital signal is recorded into the disk such that its pulse width is changed in accordance with the audio signal information. The changeable range of the pulse width is determined in the compact disk type such that three to eleven reference clock pulses exist in the one logic level period of the signal. The reference clock pulse is employed as a system clock of the disk player. Therefore, the data pulses read-out by the pickup have their pulse width which is not constant, but changed, and further the data rate is also varied in response to the rotation speed of the disk.
In order to reproduce audio signals from the read-out data pulse, the rotation speed of the disk should be therefore controlled such that the pulse width of each read-out data pulses is within three to eleven cycle periods of the reference clock signal. Accordingly, a data detection circuit provided for this purpose should count the reference clock signal during one logic level period of each read-out data pulse and detect that the count value is larger than 11.5 or smaller than 2.5. The detection of the count value of 11.5 or 2.5 may be substantially performed by counting clock pulses having a frequency twice as high as that of the reference clock signal and by comparing the actual count value with 23 or 5.
However, the reference clock signal has a frequency of about 5 MHz in the compact disk type, and therefore the frequency of the clock signal to be counted becomes about 10 MHz. For this reason, it is difficult to constitute such high-speed counter by insulated gate field effect transistors (FETs), and it will be composed of the TTL (transistor- transistor-logic) circuit, resulting in increase in the power consumption and the occupied area on a semiconductor integrated circuit chip. Moreover, the number of flip-flop circuits is made large in order to count the clock signals more than 23, and hence the power consumption and the occupied area are further increased.