1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device and a polishing apparatus, and more particularly to a semiconductor device manufacturing method including a processing step of removing surface roughness of a substrate, the roughness being caused during manufacturing, or eliminating a deposit on the substrate and a polishing apparatus for embodying the processing.
2. Description of the Related Art
In recent years, trends toward finer pattern and higher density designing of semiconductor devices are advancing. In association with the trends, removing particles deposited on a substrate or removing an unnecessary film during manufacturing of semiconductor devices becomes increasingly important. For example, critical particles to be removed include dust generated due to surface roughness caused by working on the bevel and the edge of a wafer serving as a substrate during manufacturing of semiconductor devices.
In the present specification, for example, as shown in FIG. 17, a portion at the end of a principal surface of a wafer 90 where the edge line of the section of the wafer 90 cut along the center thereof is curved will be referred to as a bevel B. A substantially flat portion formed between the bevel B and the principal surface of the wafer 90 will be referred to as an edge E. The width of the edge E is several mm. A portion including these bevel B and edge E will be referred to as a periphery in the present specification.
The surface roughness caused by working is generated in RIE (Reactive Ion Etching) processing of forming, for example, trenches for a trench capacitor, particularly, deep trenches on the surface of the Si wafer 90.
The processing will now be described in brief hereinbelow. First, as shown in FIG. 17, a laminated film comprising a silicon nitride film 91 and an SiO2 film 92 on the Si wafer 90 is patterned to form a hard mask HM.
Subsequently, as shown in FIG. 18, the Si wafer 90 is etched using the hard mask HM serving as a mask by an RIE method, thus forming the deep trenches 93. At this time, generally, acicular projections 94 are generated in an area corresponding to the bevel B and the edge portion E of the Si wafer 90. It is considered that a by-product generated in RIE is deposited on exposed surface of the bevel B and the edge E of the Si wafer 90, the by-product functions as a mask for etching, and the surface of the Si wafer 90 is etched.
Hitherto, under RIE processing conditions to accurately form the deep trenches 93 each having an aperture diameter of the order of submicrons and a high aspect ratio of tens, the acicular projections 94 are necessarily generated on the bevel B and the edge E.
The heights of the acicular projections 94 vary depending on locations. The maximum height thereof is substantially 10 μm. While the Si wafer 90 is transferred or processed in the manufacturing steps, the projections 94 are broken, thus generating particles mainly comprising Si. The particles result in a deterioration in yield. Therefore, it is necessary to immediately remove the acicular projections 94 during manufacturing.
Generally, the acicular projections 94 are removed by a CDE (Chemical Dry Etching) method. For example, as shown in FIG. 19, a resist 95 is applied to the principal surface of the Si wafer 90, namely, the whole device surface. After that, the resist 95 applied in an area corresponding to the bevel B and the edge E, the area having a width of several mm, is removed to expose the acicular projections 94.
The Si wafer 90 in the area which is not covered with the resist 95 is isotropically etched by the CDE method, thus removing the acicular projections 94 on the bevel B and the edge E. FIG. 20 shows the state of the surface at the bevel B and the edge E where the acicular projections 94 are removed. After that, as shown in FIG. 21, the resist 95 protecting the device surface is removed.
As mentioned above, the CDE method requires that the principal surface of the wafer 90, namely, the device surface on which the deep trenches 93 have been formed is protected by the resist 95 while the acicular projections 94 are being removed. Therefore, applying resist and removing resist, namely, two processing steps are needed. Since isotropic etching is performed, “aciculae” disappear but projections and depressions 96 corresponding to the variations in the heights of the first “aciculae” are remained (refer to FIGS. 20 and 21). Accordingly, it is very difficult to completely eliminate the surface roughness.
Dust generated by polishing is easily accumulated in this type of projections and depressions 96 during working such as CMP (Chemical Mechanical Polishing) which will be performed on and after the next processing. In some cases, the accumulated dust causes problems. Further, processing time per wafer necessary for the CDE method is generally long, for example, for five minutes or more. Disadvantageously, it results in a decrease in throughput and an increase in manufacturing cost.
In recent years, in the field of semiconductor devices, new materials such as Cu serving as a wiring material, Ru and Pt serving as capacitor electrode materials for a next-generation DRAM or FeRAM, and TaO and PZT serving as capacitor dielectric materials are introduced one after another. It is time to seriously consider about problems of contamination caused by these new materials in mass production.
Particularly, the important subject is to eliminate a film comprising such a new material which deposits on the bevel, the edge, and the rear surface of a wafer and serves as a contamination source during manufacturing of semiconductor devices. For example, when a Ru film to be used as a capacitor electrode is formed on a wafer, it is important to eliminate the Ru film deposited on the bevel, the edge, and the rear surface of the wafer.
A CVD (Chemical Vapor Deposition) method is generally used as a method for forming the Ru film. In this case, though the deposited amount of the Ru film is different depending on the configuration of the device, the Ru film is inevitably deposited on the bevel, the edge, and the rear surface of the wafer.
Even when an edge cut ring is used in a sputtering method, it is difficult to completely prevent the deposition of the Ru film on the bevel and the edge, the deposition being realized by spreading particles (Ru) generated by sputtering. Particularly, when the edge cut width is reduced without deteriorating the yield of chips formed on the periphery of the wafer, problems caused by the deposition of the Ru film become more serious.
Using any film forming method, the Ru film is deposited on the bevel, the edge, and the rear surface of the wafer after the Ru film is formed. Since this kind of Ru film deposited on the bevel and the other portions causes contamination in the subsequent processing, it is necessary to eliminate the unnecessary Ru film before the subsequent processing.
Conventionally, the Ru film deposited on the bevel and the other portions is eliminated by a wet etching method. In the wet etching method, generally, the rear surface of a Si wafer is set upward, the wafer is rotated horizontally, and chemicals are dropped on the rotating wafer. In order to properly spread chemicals on the bevel and the edge portion of the wafer, the number of revolutions of the wafer is controlled to prevent the chemicals from being spread to the device surface side over the bevel and edge portion.
However, in the case of the Ru film, the rate of elimination is about 10 nm/min, namely, it is low. Accordingly, elimination per wafer generally requires five minutes or more. That is, the elimination time is long, resulting in low throughput. Further, in addition to eliminating the Ru film put on the wafer, it is necessary to eliminate Ru diffused in the base wafer. In order to eliminate the diffused Ru, it is necessary to additionally perform wet etching using another chemicals which can etch the base wafer. Thus, the throughput is further deteriorated. In addition, there is no proper chemical which does not damage the device.