The invention relates generally to a method of forming metal lines of a semiconductor device and, more particularly, to a method of forming metal lines of a flash memory device.
Generally, semiconductor memory devices can be classified into volatile memory devices and non-volatile memory devices. Volatile memory devices, such as Dynamic Random Access Memory (DRAM) and Static Random Access Memory (SRAM), have fast data input/output, but lose their data when power is off. Meanwhile, non-volatile memory devices retain their data even when power is off.
A flash memory device is a kind of a non-volatile memory device, and is a highly-integrated memory device, which was developed by combining the advantages of Erasable Programmable Read Only Memory (EPROM) that can be programmed and erased, and Electrically Erasable Programmable Read Only Memory (EEPROM), that can be electrically programmed and erased. Here, the terminology ‘program’ refers to an operation of writing data into a memory cell, and ‘erase’ refers to an operation of deleting data written into a memory cell.
Flash memory devices can be divided into NOR type and NAND type flash memory devices according to the structure and operating condition of a cell. In the NOR type flash memory device, the drain of each memory cell transistor is coupled to a bit line, enabling program and erase operations with respect to a specific address, therefore increasing the operating speed. The NOR type flash memory device is generally used in applications requiring high-speed operation. In contrast, in the NAND type flash memory device, a plurality of memory cell transistors are connected in series, constituting one string, and one string is coupled between bit lines and a common source line. Thus, the NAND type flash memory device has a relatively small number of drain contact plugs, facilitating a high degree of integration. Accordingly, the NAND type flash memory device is generally used in applications requiring high-capacity data retention.
This NAND type flash memory device comprises a plurality of word lines formed between a source select line and a drain select line. A select line, for example, the source select line or the drain select line is formed by connecting gates of select transistors, each included in a plurality of strings. The word lines are formed by connecting gates of memory cell transistors. The select line and the word line each generally include a tunnel oxide layer, a floating gate, a dielectric layer, and a control gate. In the select line, the floating gate and the control gate are electrically connected. A junction is formed between each select line and each word line. Here, the junction between the source select lines is a source area, and the junction between the drain select lines is a drain area.
Meanwhile, an insulating layer is formed on the select line and the word lines. Metal lines, for example, bit lines are formed on the insulating layer. The metal lines are electrically connected to the junctions through contact plugs formed in the insulating layer. However, as semiconductor devices have gradually become miniaturized and highly integrated, the respective widths of the contact plug and the metal line have gradually narrowed. Accordingly, it has become increasingly important to form the contact plugs and the metal lines without defects.