The present invention relates to a semiconductor device in which gate electrodes are in contact with a plurality of regions of gate electrodes provided on a main surface of a semiconductor substrate.
As a semiconductor device having the above-described structure, a gate turn off (hereinafter referred to as "GTO") thyristor and a reverse conducting GTO thyristor which is composed of a GTO thyristor and a diode integrated on the same semiconductor substrate are known.
For example, as a gate electrode connecting structure in a GTO thyristor, a center gate structure, an intermediate ring gate structure, an outer peripheral ring gate structure, etc. are known.
FIG. 2 is a sectional view of an example of the center gate structure. In FIG. 2, on one main surface (upper surface) of a semiconductor substrate, separated cathode electrodes are provided and a gate electrode is disposed on the surface of the semiconductor substrate which is dug in such a manner as to surround all the cathode electrodes and prevent short-circuit. With the one main surface side, a cathode post 3 solely is in contact through a contact electrode plate 2 which comes into contact with only the cathode electrode plane protruding from the gate electrode plane, while an anode post 4 is in contact with the other main surface (undersurface) of the semiconductor substrate 1, both posts 3, 4 being integrally united by an insulating hermetic ring 31, thereby constituting a semiconductor device. The cathode post 3 is provided with a lead groove from the peripheral end portion toward the center, and in a hole formed at the center of the groove. One end of a gate lead 6 which is held by an insulating material 81 is in pressure contact with the gate electrode of the semiconductor substrate 1 through the hole provided at the center of the contact electrode plate 2, and the other end of the gate lead 6 is further connected to a gate lead pipe 7 so as to be lead out to the outside, thereby constituting a thyristor having a center gate structure.
FIG. 3 is a sectional view of an example of an intermediate ring gate structure. The structure of the device as a whole is similar to the structure shown in FIG. 2. The cathode post 3 is provided with an annular groove for pressure contact at a position corresponding to an intermediate portion between the center and the outer periphery of the semiconductor substrate 1. The contact electrode plate 2 is separated into a central discal portion and an outer annular portion at the groove by substantially the same separating width. An annular gate terminal 52 which is movably inserted into the groove of the cathode post 3 is brought into pressure contact with the gate electrode by an annular spring member 92 which is inserted into the bottom of the groove in contact therewith through an insulating plate 82. One end of the gate lead 6 is connected to the gate terminal 52, and the other end thereof is connected to the gate lead pipe, thereby constituting an intermediate ring gate structure.
FIG. 4 is a partially sectional view of the outer peripheral portion of an example of an outer peripheral ring gate structure. To an insulating block 32 provided on the inside of the insulating hermatic block, a conductive material 33 having a means for electrically connecting to the outside of the device is attached. One end of a spring-like gate terminal 53 is secured to the conductive material 33, and the other end thereof is brought into pressure contact with a ring gate electrode 34 on the outer periphery of the one main surface of the semiconductor substrate 1 by the action of the spring, thereby constituting an outer peripheral ring gate structure.
A reverse conducting GTO thyristor is composed of a GTO thyristor having a self arc extinguishing power and a fly-wheel diode are integrated on the same silicon wafer. This type of thyristor can reduce the size and weight of the device and produce high performance by the application of an inverter. FIG. 5 is a sectional view of the structure of an element of a reverse conducting GTO thyristor. The GTO portion 10 at the inner peripheral portion of the semiconductor substrate 1 is composed of a p emitter layer 11, an n base layer 12, a p base layer 13 and an n emitter layer 14 in the form of segments, and the diode portion 20 at the outer peripheral portion is composed of an n' layer 21, an n layer 22 and a p layer 23. The n layer 12 and the n layer 22, and the p layer 13 and the p layer 23 are connected to each other, respectively. Cathode electrodes 15 are provided on the surfaces of the n emitter layer 14 and the p layer 23, and cathode posts (not shown) are in pressure contact with the cathode electrode through contact electrode plates of molybdenum or the like, which has a thermal expansion coefficient approximate to that of silicon. Gate electrodes 16 are provided on the surfaces of the p base layer 13 which surround the segments of the n emitter layer 14. With a portion at the center of the element, a gate terminal (not shown) comes into pressure contact. An anode electrode 18 is provided on the surfaces of the p emitter layer 11 and the n' layer 21, and anode post (not shown) is in pressure contact with the anode electrode 18. A separation groove 19 is dug at the boundary of the GTO portion 10 and the diode portion 20 so as to electrically isolating the GTO portion and the diode portion from each other. It is necessary to apply a current to the gate electrodes 16 in order to turn on the GTO portion and to take a current from the gate electrodes 16 in order to turn off the GTO portions. Such a gate control is carried out through a gate electrode.
In FIG. 5, a center gate structure is shown, but the element may have an intermediate ring gate structure or an outer peripheral ring gate structure. In the case of an outer peripheral ring gate structure, the gate terminal, which is situated at the outermost periphery of the GTO portion, comes into contact with the gate electrodes on the inner side of the diode portion 20.
In a semiconductor device such as a GTO thyristor in which a large current temporarily flows on the gate electrode at the time of turn-off, it is desirable to make the contacting area of a gate electrode and a gate terminal or the like for taking out a current from the gate electrode as large as possible and connect them with the resistance lowest possible so as to reduce the transverse voltage drop which is caused when a current flows on the gate electrode as much as possible.
In a conventional gate electrode connection structure, in the case of a center gate structure shown in FIG. 2, since the gate current is only taken out of the contact portion at the end of the gate lead 6 at the center, the transverse voltage drop of the gate electrode layer between the contact portion at the end of the gate lead 6 and the outermost periphery of the semiconductor substrate 1 is limited by the thickness of the electrode layer so that the drop voltage becomes large. For example, if it is assumed the current flowing on the gate lead 6 is 100 A, the gate voltage reaches several hundred mV. As a result, it is impossible to make the gate turn-off uniform in plane, thereby involving a fear of causing turn-off breakage due to the concentration of current. In the case of an outer peripheral ring gate structure shown in FIG. 4, the contacting area of the gate electrode 34 and the gate terminal 53 is large, but the resistance produced when a current flows in the gate electrode layer is substantially the same as that in the case of a center gate structure, thereby involving a fear of causing turn-off breakage. In the case of an intermediate ring gate structure shown in FIG. 3, the annular gate terminal 52 is provided at an intermediate portion in the radial direction on the one main surface of the semiconductor substrate 1, and the contacting area with the gate electrode is considerably large. Since the resistance of the current in the gate electrode layer is as small as about 1/2 of the resistance in the case of the other structures, the transverse voltage drop of the gate electrode is reduced. However, since the annular gate electrode for bringing the annular gate terminal 51 into pressure contact is provided at an intermediate portion of the one main surface of the semiconductor substrate 1, the effective cathode area is reduced, so that the cathode current density is increased, thereby inconveniently increasing the forward voltage drop between the main electrodes.
Accordingly, it is an object of the present invention to eliminate the above-described problems in the prior art and to provide a semiconductor device provided with a gate electrode structure which is capable of reducing the transverse voltage drop of the gate electrode without reducing the effective area of a main electrode.