This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2001-149341, filed May 18, 2001, the entire contents of which are incorporated herein by reference.
1. Field of the Invention
This invention relates to a semiconductor device manufacturing method and more particularly to a stacked package formed by stacking and mounting semiconductor elements.
2. Description of the Related Art
In recent years, semiconductor devices are formed by stacking and mounting semiconductor elements in order to mount the semiconductor elements with high density. The conventional stacked semiconductor devices (stacked packages) are described in, for example, Jpn. Pat. Appln. KOKAI Publication No. 9-219490, Jpn. Pat. Appln. KOKAI Publication No. 10-135267, Jpn. Pat. Appln. KOKAI Publication No. 10-163414 and the like.
The above conventional stacked packages are completed by packaging the elements into TSOPs (Thin Small Outline Packages), TCPs (Tape Carrier Packages), BGAs (Ball Grid Arrays) or the like, then individually laminating external terminals provided on the respective packages to stack the packages and making electrical connections thereof.
That is, a method of the conventional stacked package includes a package stacking step in addition to a packaging step of packaging the elements into each package. Therefore, the manufacturing method becomes a sequential process in which the number of steps is increased by a number corresponding to the number of stacked packages and there occurs a problem of an increase in the processing cost due to usage of the above process and an increase in the cost due to usage of members such as spacers used for individually stacking the packages.
According to an aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising mounting a semiconductor element on a substrate including first connection electrodes, first interconnections electrically connected to the first connection electrodes and a first alignment mark with the semiconductor element electrically connected to the first interconnections, and positioning and stacking the substrate having the semiconductor element mounted thereon on a core substrate including second connection electrodes and second interconnections electrically connected to the second connection electrodes and having adhesive layers formed on both surfaces thereof based on recognition of the first alignment mark, and performing thermo-compression bonding at temperatures at which an adhesive agent of the adhesive layers is melted, without being cured, to temporarily fix the substrate having the semiconductor element mounted thereon on the core substrate by tackiness of the adhesive agent.
According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising mounting semiconductor elements on substrates each including first connection electrodes, first interconnections electrically connected to the first connection electrodes and an alignment mark with the semiconductor element electrically connected to the first interconnections, positioning and stacking the substrates having the semiconductor elements mounted thereon on core substrates each including second connection electrodes, second interconnections electrically connected to the second connection electrodes and a positioning pin hole for stacking and having adhesive layers formed on both surfaces thereof based on recognition of the alignment mark, and performing thermo-compression bonding at temperatures at which an adhesive agent of the adhesive layers is melted, without being cured, to temporarily fix the substrates having the semiconductor elements mounted thereon on the core substrates by tackiness of the adhesive agent, mounting a plurality of core substrates on which the substrates having the semiconductor elements mounted thereon are temporarily fixed in a stacked form on a jig plate having a pin erected thereon by using the positioning pin holes of the core substrates, and bonding the plurality of core substrates by thermal press.
According to still another aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising mounting semiconductor elements on substrates each including first connection electrodes, first interconnections electrically connected to the first connection electrodes and a first positioning pin hole with the semiconductor element electrically connected to the first interconnections, mounting the substrates having the semiconductor elements mounted thereon and a plurality of core substrates each including second connection electrodes, second interconnections electrically connected to the second connection electrodes and a second positioning pin hole for stacking and having adhesive layers formed on both surfaces thereof in a stacked form on a jig plate having a pin erected thereon by using the first and second positioning pin holes, and bonding the substrates having the semiconductor elements mounted thereon on the core substrates by thermal pressing and bonding the plurality of stacked core substrates.