Currently, computers have become a very important tool in people's daily life, and are broadly applied in various fields. Memory performance is an important technical measurement for measuring performance of a computer. With the development of memory technology, a memory is continuously upgrading; however, compared with the development of the memory, a processor develops more rapidly, and a difference between the two is gradually increasing. Improvement of the process not only brings about improvement of the performance, but also increases an energy efficiency ratio. Therefore, in a whole computer system, a difference between an energy efficiency ratio of a memory system and an energy efficiency ratio of a processor is gradually increasing. According to statistics, power consumption of the memory system accounts for 46% of power consumption of the whole computer system. It can be seen that optimizing the power consumption of the memory system is significant for improving the power consumption of the whole computer system.
The power consumption of the memory system is classified into static power consumption and dynamic power consumption in the terms of composition. The static power consumption refers to power consumption of a memory unit in an idle state, and mainly includes leakage power consumption, refresh power consumption, and the like. The dynamic power consumption refers to power consumption generated when the memory unit is accessed, and includes power consumption of a memory chip, power consumption of a row buffer, power consumption of an I/O gating, and the like.
In the prior art, a method for dynamically adjusting a DRAM (Dynamic Random Access Memory) memory chip by using a memory controller is that, a memory system formed by a whole DRAM chip is divided into two areas: a refresh area and a non-refresh area, and when a memory system switches to a low power consumption mode according to a use condition of a memory, the refresh area is refreshed normally to maintain correctness of data, and the non-refresh area is not refreshed according to a requirement of a DDR (Double Data Rate, double data rate synchronous dynamic random access storage) protocol, so as to reduce refresh power consumption, thereby reducing power consumption of the whole memory system.
In the prior art, a main measure for reducing the power consumption of the memory system is adjusting a refresh frequency, but with such a manner, reduction amplitude of the power consumption of the memory system is not large and an effect on reducing the power consumption of the memory system is not obvious.