Many applications of integrated circuits provide for the use of batteries as a source of current and consequently these circuits must be designed to operate with a very small current consumption. CMOS technology has been found to be highly advantageous for low current applications, particularly as compared to other available technologies. Digital CMOS circuits have a very low power consumption or power loss inasmuch as every logic circuit condition of a logic stage of one of the current branches complimentary to the other is always blocked and consequently no conductive connection exists in the entire integrated circuit between the terminals of the power supply. Power loss does result in this type of circuit during dynamic operation owing to the shift of parasitic circuit capacities. During actual shift operations a momentary conductive connection is established across the power supply as long as the N-type transistors and P-type transistors are jointly conductive. What is commonly termed a reactive current flows during the aboved noted condition. Additionally, circuit components which may be included in CMOS circuits may cause a reactive current to circulate as a holding current because of working point adjustments, and this also contributes to power loss of the circuit.
One manner of evaluating CMOS circuits, as well as integrated circuits employing other technologies is the amount of current consumption required by the circuit. One manner of minimizing current consumption in CMOS circuits is to match the total absolute value of the threshold voltage of complimentary transistors to the supply voltage. In the foregoing manner, the reactive current may be minimized because the two complimentary and series connected transistors are operated in the lowest range of their conductivity. There are, however, certain practical difficulties in the foregoing because of unavoidable production tolerances or variations of threshold voltages and the fact that the supply voltage of batteries employed as a source of current is subject to substantial fluctuations. On the other hand, if CMOS circuits are designed to operate with transistor threshold voltages as high as possible and a supply voltage as low as possible, the current drawn may actually amount to a multiple of the possible desired minimum current.
Because of the aforementioned unavoidable variations in threshold voltages and fluctuations of supply voltage, there may be relatively wide variations of other circuit parameters. One such parameter, for instance, is the output current of a CMOS circuit that may be employed for the control of a following circuit stage. Consequently, it is quite difficult to construct monostable or bistable circuits which exhibit exact predetermined stable circuit conditions because the switching times depend in good part upon the threshold voltages and supply voltages.
The present invention is particularly directed to the control of the supply or input voltage for integrated circuits to achieve a maximum functional safety and an independence from fluctuations of threshold voltage or supply voltage.