With recent advances in integrated circuit design, there are now as many as six to ten insulated interconnect layers overlying the semiconductor transistors for devices using the current 90 nm design rules. The next generation may employ 35 nm design rules and may have as many as 12 to 14 insulated interconnect layers. These interconnect layers can have completely different conductor patterns and are connected to one another and to the transistor layer at different locations through contact vias extending vertically between the horizontal layers. It is the formation of the contact vias with which the present invention is concerned.
Due to the large number of interconnect layers and the total electrical path length they represent, the interconnect layers account for a significant proportion if not a majority of the total power losses in the integrated circuit.
To reduce resistive power losses in the integrated circuit, the interconnect layers and the contact vias typically employ copper as the principal conductor and silicon dioxide as the insulator. Because copper tends to diffuse through the silicon dioxide insulator material, a barrier layer is placed between the copper material and the silicon dioxide material wherever the two materials interface in the integrated circuit. The barrier layer is typically formed of an underlying tantalum nitride layer contacting the silicon dioxide insulator, and overlying pure (or nearly pure) tantalum layer and, finally, a copper seed layer over the pure tantalum layer. The copper conductor is deposited on the copper seed layer. Such a barrier layer prevents migration or diffusion of copper atoms into the silicon dioxide insulator material.
In order to reduce power losses and interference by capacitive coupling between adjacent interconnect layers, it is desirable to employ an insulating material with the lowest possible dielectric constant. Silicon dioxide can be employed because it has superior mechanical properties. However, silicon dioxide has a relatively high dielectric constant (about 4.0) and is therefore not ideal. It has been found that combining silicon dioxide with a species such as boron or phosphorus produces a glassy material having a lower dielectric constant. For example, combining silicon dioxide with boron produces boron silicate glass (BSG). BSG has a dielectric constant of 3.2. Other insulator materials have been developed having even lower dielectric constants, such as insulation material sold by Applied Materials, Inc., the present assignee, under the trademarks Black Diamond I (dielectric constant of <3.0) and Black Diamond II (dielectric constant of <2.6). These materials with such low dielectric constants provide very good electrical performance with minimum capacitive coupling between interconnect layers. Unfortunately, their mechanical properties are inferior to those of silicon dioxide because these materials tend to be porous and therefore are not as hard as silicon dioxide. This is a particularly difficult problem because the insulator layer deposited over an interconnect layer tends to form a very uneven top surface and must therefore be smoothed to a plane surface by chemical mechanical polishing. While silicon dioxide is a sufficiently hard material to be relatively impervious to flaking or cracking during chemical mechanical polishing, porous materials with low dielectric constant can be susceptible to damage during chemical mechanical polishing.
Therefore, what is needed is a hard insulator material having a low dielectric constant that can reliably withstand chemical mechanical polishing. Currently available insulator materials suitable for use in multiple interconnect layers of integrated circuits are either porous and weak or else have a relatively high dielectric constant.