A regulated output circuit can be employed when a circuit communicates from a given bus and voltage source and attempts to communicate to a circuit having a different bus and voltage source. For example, a circuit on an “A” bus may utilize voltage levels of 0.9 volts to 5.5 volts. A circuit on bus “B” may operate with a supply in the range of 2.7 volts to 5.5 volts, for example. Since the circuits on bus A and B do not share a common power supply, some form of voltage level translation is necessary in order to communicate information between the respective busses. A regulated output circuit is one component of a translation circuit that enables voltage level translation between busses. A common application for using multiple busses is in a computer where multiple busses need to be isolated from one another in order to preserve parametric conditions on the respective busses (e.g., maintain maximum capacitive load for a given bus).
The typical means for coupling voltage, current, and ultimately information between busses is to regulate a desired voltage level such as a maintaining a voltage near ground (e.g., 0.5 v) on one side of the translation circuit. For example, a translation circuit that receives a voltage input from bus A and outputs voltage and current to bus B will attempt to maintain a low level condition such as 0.5 volts at all times when actively driving bus B. In order to communicate a low level signal (e.g., low logic signal) from bus A to bus B, the translation circuit enables a switch that switches a regulated output circuit to drive bus B to a low voltage level such as 0.5 volts. An error amplifier then receives feedback from the output in order to maintain or regulate the output voltage to the low level on bus B. If a high voltage level (e.g., logic 1) is to be communicated from bus A to bus B, then the translation circuit deactivates the switch operating bus B which is then pulled high by external pull-ups when the bus is not being driven. Thus, communicating from one voltage level to another is basically a sequence of driving the bus to a known low state when communicating one voltage state and releasing the bus to communicate the opposite voltage state. In repeater applications, static offsets are maintained as a valid low-level for every other component on the bus except the repeater. The requirement for bi-directional communication is that the static offset needs to allow for being externally over-driven without also interfering with the B-side bus.
Regulated output stages typically require finite time to recover when the output is forced out of regulation. Feedback from the output dictates that all internal nodes in the regulated output stage are saturated and thus, circuit recovery time is dependent on the slew rate of the amplifier circuit driving the output. This problem can be exacerbated in applications where unidirectional output stages are used to generate a static output low voltage (VOL) offset. The VOL regulation loop saturates when external circuits pull down on the bus, for example. When not actively driving the bus, an external pull-up resistor pulls the bus high as soon as the external pull-down circuit releases the bus. A “glitch” or transient can result on the bus as the VOL regulator slews to regain regulation, however. Some attempts to correct this problem include increasing bias current and reducing capacitive parasitic parameters but practical limitations exist due to desired response times for the regulated output stage. Another technique for reducing transients includes clamping methods applied at the regulated output, however clamping effectiveness is reduced when weaker output pull-down circuits are employed. Also, such clamping methods reduce available headroom for desired noise margins.