It is well known that the flip chip package is lighter, thinner, shorter, and smaller than other packages. Furthermore, the flip chip package includes a flip chip which is flip-chip mounted on a substrate via bumps so that the signal path from the flip chip to the substrate becomes shorter for high-speed applications. However, the heat generated from the flip chip becomes a serious problem in high-speed operation. Therefore, it is important to solve the heat dissipation problem in a flip chip package. R.O.C. Taiwan Patent No. 508,778 entitled “Package structure of semiconductor chip” discloses a conventional thermal-enhanced flip chip package. Referring to FIG. 1, the flip chip package 10 includes a flip chip 11, a substrate 12 and a heat sink 13. The flip chip 11 is mounted on the upper surface of the substrate 12 via a plurality of bumps 14. A plurality of solder balls 17 are placed on the bottom surface of the substrate 12 for outer electrical connection. To enhance the heat dissipation of the package 10, a heat sink 13 is attached to the top of the flip chip 11. However, in order to improve the thermal coupling effect of the heat sink 13, a thermal interface material 15 is applied between the heat sink 13 and the flip chip 11. The bond line thickness (BLT) and the volume of the thermal interface material 15 should be well-controlled so that heat can be rapidly conducted from the flip chip 11 to the heat sink 13. Then, the heat sink 13 can dissipate Heat to the outside more effectively and efficiently. Since the thickness of the thermal interface material 15 will vary with the attaching pressure of the heat sink 13, therefore, the BLT of the thermal interface material 15 should be measured first, then the volume of the thermal interface material 15 and the parameter of the attaching pressure of the heat sink 13 can be determined. According to a conventional BLT measurement method, the flip chip package 10 will go through destructive experiments because the thermal interface material 15 has been pre-heated and cured inside the heat sink 13. Afterward, the heat sink 13 is removed from the flip chip package to measure the BLT of the thermal interface material 15 and its distribution. Under this kind of destructive measurement, the sampling is very limited and very time-consuming.