For power devices, for example, a vertical Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) having a trench gate structure has been widely used. For example, in the N-channel type, when a positive bias is applied to a gate electrode, an N channel is formed in a vicinity of an interface with a gate insulating film in a P-type base layer, and electrons flow from a source layer into a drain electrode via the N channel, an N-type base layer and a drain layer, to form an on state.
In this configuration, by reducing a trench interval, a channel density increases, which makes it possible to reduce an on-resistance. However, when the trench interval is reduced, an area of the P-type base layer in contact with the source electrode between the trenches becomes smaller. This causes an increase in discharge resistance of holes at Avalanche breakdown, i.e., lower breakdown tolerance.