Conventional methods of testing an analog circuit may be performed at a module level. However, such testing may increase manufacturing costs because circuit defects are not detected until after a chip has been formed into a module (e.g., packaged). Other conventional methods of testing an analog circuit may employ additional circuitry to convert analog signals to digital signals and vice versa during a test at the wafer level. However, such additional circuitry is large and complex, and therefore, causes an increase in wafer chip size. Therefore, improved methods and apparatus for testing an analog circuit at a wafer level are desired.