The present disclosure relates generally to semiconductor devices, and more particularly to single gate oxide (SGO) input/output (I/O) buffer circuits with an improved under-drive feature.
Demands are escalating for sub-micron semiconductor devices with high density, high performance, and ultra large-scale integration. These semiconductor devices require increased speeds, high reliability, and increased manufacturing throughput. As the semiconductor device geometries continue to decrease, the conventional semiconductor technologies are challenged in forming gate oxide layers.
Conventional semiconductor devices comprise a substrate having various electrically isolated regions, called active regions, in which individual circuit components are formed. The active region typically includes source and drain regions of a transistor formed in the semiconductor substrate, spaced apart by a channel region. A gate electrode for switching the transistor is formed on the channel with a gate oxide layer isolating the gate electrode and the substrate. The quality and thickness of the gate oxide are crucial for the performance and reliability in the finished integrated circuit (IC) device.
The speed of circuit components, such as MOS transistors, is affected by the time required to charge and discharge parasitic load capacitances in a circuit. Since a lower operating voltage leads to a shorter time of charging and discharging the load capacitances, faster circuitry is typically therefore obtained. In order to reduce the operating voltage, however, the threshold voltage of the transistor must also be lowered. One way to lower the threshold voltage is to reduce the thickness of the gate oxide layer, which contributes proportionately to the body effect and hence, the threshold voltage.
The reliability of transistor is also affected by the thickness of its gate oxide. For example, if an excessive potential is applied to the gate electrode, the gate oxide breaks down and causes a short circuit, typically, between the gate electrode and the source. The potential at which the gate oxide breakdown occurs is termed the “breakdown voltage,” which is related to the thickness of the gate oxide. Since the gate oxide layer must be thick enough to prevent a breakdown, a higher operating voltage necessitates a thicker gate oxide to support a higher breakdown voltage.
Some semiconductor devices have circuit components operating at different voltages within the same IC. For example, a microprocessor has speed-critical components that are operated at lower voltages (e.g., 1.8V to 2.0V), while it may also contain less speed-critical components that operate at higher operating voltages (e.g., 3.3V to 5.0V). Transistors utilizing a low operating voltage (e.g., 1.8V) have a thinner gate oxide layer (typically 40 Angstroms), while transistors with higher operating voltages (e.g., 5V) have a thicker gate oxide layer (typically 55 Angstroms). This increase in the gate oxide thickness makes the gate oxide less susceptible to a breakdown.
Input/output (I/O) buffer circuits typically need to translate an input operating voltage to a higher or lower operating voltage. I/O buffer circuits are used when two distinct circuits having different operating voltages need to be connected. Conventional designs have utilized dual gate oxide structures or stack transistor schemes to reduce the effects of gate oxide breakdown. These conventional designs provide some measure of protection from gate oxide breakdown, but unfortunately have performance limitations (such as under-drive anomaly), which lead to additional masks, process steps, and fabrication costs.
Therefore, desirable in the art of gate oxide I/O buffer circuits are new designs that utilize a single gate oxide structure with an improved under-drive feature to increase I/O buffer circuit performance, to reduce the process steps, to reduce the fabrication costs, and to obtain higher throughput.