Typical numerically controlled oscillators generate a digitally represented sine wave output signal in response to a delta phase input signal and a sample clock signal. A delta phase input signal is usually added to an output of a phase accumulator and the resulting sum is transferred to the output of the phase accumulator on each sample clock edge. By this process, the phase accumulator output increases uniformly each sample clock cycle until the adder overflows beginning a new cycle.
The phase accumulator output value can be seen as representing the instantaneous phase of the output signal. Through appropriate selection of the delta phase input signal, the output frequency of the phase accumulator can be controlled over a wide range in a manner completely synchronous with the sample clock. By selecting the phase accumulator bit width, the frequency and phase resolution of the numerically controlled oscillator can be determined. In this manner, the output frequency has a binary relationship to the sample clock signal, ranging from zero Hertz to one-half the sample clock frequency in steps dictated by the bit width of the delta phase accumulator.
Numerically controlled oscillators may also be designed such that the output signals have a decimal fraction relationship to the sample clock signal by using binary coded decimal arithmetic in the phase adder. However, these binary and binary coded decimal numerically controlled oscillators are limited to use certain frequency relationships. In order to attempt other fractional relationships, typical numerically controlled oscillators use a sufficient number of bits in the phase accumulator width to produce a frequency error that is acceptably small for a desired application. In certain applications, however, any frequency error will eventually cause improper system operation. Therefore, it is desirable to have a numerically controlled oscillator that can generate a precise frequency relationship when required.
From the foregoing, it may be appreciated that a need has arisen for a numerically controlled oscillator that can generate a desired fractional relationship between an output and a sample clock input. A need has also arisen for a numerically controlled oscillator that is less dependent on bit width in order to obtain the desired fractional relationship.