1. Field of the Invention
The present invention relates to a printed circuit board for mounting electronic parts thereon and particularly to a printed circuit board which is suitable for three dimensional high density mounting of surface mount type chip components.
2. Description of the Related Art
A chip-type component (referred to hereinafter as chip component) of a resistor, a capacitor or a coil, etc., which is surface mount type electronic part, is soldered to the printed circuit board as follows. First, a foot print formed in a predetermined pattern on a predetermined position on the printed circuit board is coated with solder cream by a screen printing method; next, the printed circuit board having electrodes of the chip components mounted on the foot print is heated in a heating furnace so that the chip components are soldered to the foot print by melting the solder cream. An IC package sealing an IC (Integrated Circuit) chip therein with a resin mold, etc. is also soldered, in the same manner as the chip components explained above, to lead-connecting patterns on the printed circuit board via a plurality of lead wires led out of the IC package.
FIG. 1 is a plan view of a plan of a prior art high density surface mount type printed circuit board 1. A plurality of IC packages 3 are mounted in the form of a matrix upon a surface of printed circuit board 1. Each IC package denoted with the numeral 3 is sequentially indicated with suffix as 3-.sub.11, 3-.sub.12, 3-.sub.13, etc. in the row direction Xm and 3-.sub.11, 3-.sub.21, 3-.sub.31, etc. in the column direction Yn. A chip capacitor 4 is respectively mounted, as indicated by broken lines, under the center area of each IC package 3 on the surface of the printed circuit board 1 in order to absorb switching noises generated by each IC package. Each chip capacitor 4 is indicated, corresponding to suffix of IC package, 4-.sub.11, 4-.sub.12, 4-.sub.13, etc. in the row direction Xm and 4-.sub.11, 4-.sub.12, 4-.sub.13, etc. in the column direction Yn. Each IC package 3 leads out a plurality of lead-wires 3a and 3b from both side surfaces in the longitudinal direction. The lead-wires 3a, and 3b are soldered to wiring patterns on the printed circuit board 1, but these are not illustrated in FIG. 1.
Each chip capacitor 4 has a pair of electrodes, not illustrated, to be soldered to wiring patterns prepared on the surface of printed circuit board corresponding to the electrodes under the central area of each IC package.
In the parts layout of FIG. 1, soldering of IC package 3 can be visually inspected. Soldering of the chip capacitors located in the outer most row of the matrix (namely, 4-.sub.11, 4-.sub.12, 4-.sub.13 of the first row X.sub.1 and 4-.sub.31, 4-.sub.32, 4-.sub.33 of the 3rd row X.sub.3), can be visually inspected along the directions B and B' in FIG. 1. However, chip capacitors 4-.sub.21 .about.4-.sub.23 located in the second row X.sub.2 other than the outer most rows are shaded respectively by the overlap of chip capacitors or lead-wires of IC packages in the outer rows, causing a problem in that the visual inspection is no longer possible.