FIG. 1 (Prior Art) is a block diagram of a Secondary-Side Regulation (SSR) flyback power supply 1. An alternating current (AC) 110-240 volt line voltage on input terminals 2 and 3 is rectified by a full wave bridge rectifier 4 and an associated smoothing capacitor 5 so that a rectified and smoothed rough DC voltage is present between the first and second input nodes 6 and 7. The voltage on first input node 6 is also referred to as the “input line voltage” or “line input voltage” (VIN). A SSR controller integrated circuit 8 is powered by a DC voltage supplied by auxiliary winding 9 of a transformer 10 and a rectifier involving diode 11 and capacitor 12. Immediately after startup when the rectifier has not yet switched an adequate number of times to charge capacitor 12, start up power for integrated circuit 8 is received via resistor 13. Flyback converter 1 operates by repeatedly closing and opening a switch 14. Closing switch 14 causes a primary current IP to flow from node 6, through a primary winding 15 of transformer 10, through switch 14, through a current sense resistor 16, and to node 7. The flow of this primary current IP causes energy to be stored in transformer 10.
FIG. 2 (Prior Art) is a waveform diagram of an operation of the secondary side regulator of FIG. 1. The second waveform labeled IP represents the current flowing through the primary winding 15. Switch 14 is on from time T1 to time T2. Accordingly, primary current IP increases from time T1 to time T2.
Next, switch 14 is opened at time T2, and primary current IP stops flowing. The energy stored in transformer 10 is then transferred to the output of power supply 1 in the form of a pulse of current IS flowing through the secondary winding 17 of transformer 10. The bottom waveform labeled IS in FIG. 2 represents this secondary current. The pulse of secondary current IS flows from time T2 to time T3. Secondary current IS flows through secondary winding 17 and through a rectifying diode 18. Such pulses of the secondary current IS charge an output capacitor 19. Charge is maintained on output capacitor 19 such that a desired voltage VOUT is maintained across output terminals 20 and 21.
Consider a situation in which the load (not shown) coupled across output terminals 20 and 21 is a light load. Power supply 1 is only supplying a small amount of energy to the load in order to maintain the voltage VOUT regulated to its desired value. The power supply is not current limited. It therefore is in steady state operation and is operating in a constant voltage mode. Switch 14 is switched to open and close rapidly and in such a manner that the output voltage VOUT on output capacitor 19 is regulated to a substantially constant desired voltage.
Power supply 1 is said to have a “primary side” 22 and a “secondary side” 23. Power supply 1 is said to be a “secondary side regulation” power supply because its controller integrated circuit 8 responds to an optocoupler while the voltage monitoring is done via the secondary side reference amplifier 27. In a constant-voltage (CV) operational mode, the output voltage VOUT across output terminals 20 and 21 is sensed by a resistor divider involving resistors 24 and 25. The center tap 26 of the resistor divider is coupled to a terminal of a voltage reference integrated circuit 27. If the voltage on the center tap of the resistor divider is above a reference voltage, then the voltage reference integrated circuit 27 draws a current through an optocoupler 28. The current flows from first output terminal 20, through a current limiting resistor 29, and through optocoupler 28, through voltage reference 27, and to second output terminal 21. When this current flows, the optocoupler causes a corresponding current to be drawn out of a feedback terminal FB 30 of the controller integrated circuit 8. Current 30 is an error current that is indicative of the voltage level on output terminals 20 and 21. Controller 8 uses the detected magnitude of error current 30 to control the on/off duty cycle of switch 8 so as to regulate output voltage VOUT.
The output current IOUT is related to the peak of the primary current IP that is switched through the primary winding 15 of transformer 10. The magnitude of current IP is detected by the sense resistor 16 in the primary current path. Under high loading conditions, if the IOUT output current through output terminals 20 and 21 would exceed a specified current, then the power supply is made to operate in a constant current (CC) mode. Controller 8 controls the on/off duty cycle of switch 14 to limit the peak of primary current IP to an amount that corresponds to the specified maximum output current IOUT. The secondary side regulator (SSR) power supply 1 of FIG. 1 operates satisfactorily well in many applications, but it can be undesirably expensive in ultra low cost applications. Optocoupler 28 and voltage reference 24 are relatively expensive electronic components.
FIG. 3 (Prior Art) is a block diagram of another type of power supply referred to here as a Primary-Side Regulation (PSR) flyback power supply 31. Full wave bridge rectifier 32 and associated capacitor 33 provide a rough DC voltage as in the SSR example of FIG. 1. As in the SSR example of FIG. 1, PSR power supply 31 operates by repeatedly closing and opening a switch. In the illustrated example, the switch is a bipolar transistor 34. Closing switch 34 causes a primary current IP to flow from node 35, through primary winding 36 of transformer 37, through switch 34, into terminal 38 of a PSR CC/CV controller integrated circuit 39, through another switch (not shown) inside the PSR CC/CV controller integrated circuit 39, and from the ground terminal 40 of the PSR CC/CV controller integrated circuit 39 to ground node 41. When switch 34 is closed, the current IP that flows through primary winding 36 causes energy to be stored in transformer 37. When switch 34 is opened, the energy is transferred to the output of the power supply in the form of a pulse of secondary current IS that flows through a secondary winding 42 of transformer 37 and through a diode 43. An output capacitor 44 is connected across output terminals 45 and 46 of the power supply. Pulses of secondary current IS charges output capacitor 44. When the power supply is in steady state operation in the constant voltage (CV) mode, switch 34 is switched to open and close rapidly and in such a manner that the output voltage VOUT on capacitor 44 remains substantially constant at a desired regulated output voltage VOUT. The magnitude of output voltage VOUT is related to the voltage VAUX across an auxiliary winding 47. VAUX is divided by a voltage divider including resistors 48 and 49 so that the voltage on the voltage divider tap 50 is sensed on an FB terminal 51 of PSR CC/CV controller integrated circuit 39. PSR CC/CV controller integrated circuit 39 has an internal reference voltage generator that generates an internal reference voltage. Controller integrated circuit 39 regulates VOUT to have the desired regulated output voltage by keeping the voltage on FB terminal 51 equal to the internal reference voltage. In one advantageous aspect, no expensive optocoupler or secondary side voltage reference is required.
The magnitude of the primary current IP is detected by detecting the voltage dropped across a component (not shown) inside PSR CC/CV controller integrated circuit 39. This voltage, which is the product of the IP current flow and the resistance of the component, is sensed and is amplified by a current sense amplifier inside PSR CC/CV controller integrated circuit 39. If the sensed voltage drop corresponds to an output current IOUT that exceeds a specified current limit value, then the power supply is made to operate in a constant-current (CC) operating mode. In the CC mode, the output current IOUT is limited to a desired regulated output current by keeping the peak voltage detected by the current sense amplifier equal to a reference voltage value VILIM.
FIG. 4 (Prior Art) is a waveform that illustrates an operation of PSR power supply 31 of FIG. 3 under light loading conditions. Each time switch 34 is switched on and off in a switching cycle, an amount of energy is transferred to the PSR output. In the waveform of FIG. 4, switch 34 is on from time T1 to time T2. As explained above, energy builds in the magnetic field in the transformer as this primary current IP flows. The primary current IP rises at a substantially fixed rate. When switch 34 is opened at time T2, the magnetic field collapses and energy from the transformer is output in the form of a pulse of secondary current IS. Starting at time T2, the magnitude of the secondary current IS decreases as illustrated.
The VAUX on auxiliary winding 47 is related to VOUT in a known way during the off-time of switch 34, provided that the voltage drop across diode 43 is known. The voltage across diode 43 is known if the diode is forward biased. Accordingly, circuitry inside PSR regulator integrated circuit 39 samples the error voltage on FB terminal 51 at a time T3, shortly before secondary current IS stops flowing. Because only a small amount of energy is draining from the power supply output due to the light loading condition, and because proper regulation requires diode 43 to be forward biased during sampling, the peaks of the IP current pulses have a minimum value IPPEAKMIN. If the loading on the power supply decreases such that the energy transferred to the load due to IP current pulses of this IPPEAKMIN magnitude is too large, then the periods of the switching cycles are made to increase as loading decreases further. One such period 52 is illustrated in FIG. 4 as extending from time T1 to time T6. The IP current pulse is at its minimum magnitude. In some exemplary PSR power supplies, for low loads the period of the switching cycle may be long such as, for example, several milliseconds or more. Such a power supply generally has poor low-power standby mode transient response. If the load on the power supply output were suddenly to increase, and the next sample time may be a substantial amount of time in the future. The controller 39 may not therefore react to the increased loading condition quickly enough, and the output voltage VOUT on the output terminals 45 and 46 may momentarily fall out of regulation.