1. Field of Invention
This invention relates to a bumping process. More particularly, the present invention is related to a bumping process for ensuring the reliability of bumps and the integrity of the dielectric layer covering the redistributed layer of the bumped wafer.
2. Related Art
In this information explosion age, integrated circuits products are used almost everywhere in our daily life. As fabricating technique continue to improve, electronic products having powerful functions, personalized performance and a higher degree of complexity are produced. Nowadays, most electronic products are relatively light and have a compact body. Hence, in semiconductor production, various types of high-density semiconductor packages have been developed. Flip chip is one of the most commonly used techniques for forming an integrated circuits package. Moreover, compared with a wire-bonding package or a tape automated bonding (TAB) package, a flip-chip package uses a shorter electrical path on average and has a better overall electrical performance. In a flip-chip package, the bonding pads on a chip and the contacts on a substrate are connected together through a plurality of bumps formed by the method of bumping process. Accordingly, the technology of bumping process becomes more and more important in the advanced packaging fields.
As mentioned above, in a conventional bumping process, a stencil or a photosensitive film, such as a photo-resist layer, having a plurality of openings that exposes the bonding pads is formed over the active surface of the chip (or wafer) to serve as a mask. Thereafter, a plating process or a printing process is carried out to fill solder material into the openings over the bonding pads. The stencil or the photosensitive film is then removed to have the solder layer exposed over various bonding pads. After a reflow process, the solder layers solidify into a plurality of bumps and each bump has a spherical profile on the corresponding bonding pad.
Referring to FIG. 1A to FIG. 1G, which illustrate magnified cross-sectional views of the bump of a wafer showing the steps for producing a bump according to a conventional method. First, as shown in FIG. 1A, a wafer 100 having an active surface 101 with a plurality of bonding pads 102 (only one is shown) and a passivation layer 104 thereon is provided. The passivation layer 104 are positioned over the active surface 101 and exposes the bonding pads 102 through passivation openings 104a (only one is shown) formed in the passivation layer 104.
Next, as shown in FIG. 1B, a first dielectric layer 105 is formed over the passivation layer 104 and covers a portion of each bonding pad 102 to leave one of bonding pads 102 exposed out of the first dielectric layer 105 through a first opening 105a and have a portion of passivation layer 104 exposed out of the first dielectric layer 105 through a second opening 105b. 
Next, a redistributed layer 106 is formed over the first dielectric layer 105, the bonding pad 102 and the passivation layer 104 exposed out of the first dielectric layer 105, wherein the portion of the redistributed layer 106 directly connecting the passivation layer 104 serves as a bump pad 106a. Generally, the redistributed layer 106 is formed by the following steps. Firstly, a first electrically conductive layer is formed over the first dielectric layer. Next, a photo-resist layer is formed on and partially covers the first electrically conductive layer. Then, a photolithographic process and an etching process are performed to remove the portion of the first electrically conductive layer not covered by the photo-resist layer to form a patterned first electrically conductive layer serving as the redistributed layer as mentioned above. Therein, the bump pad is electrically connected to the bonding pad through said patterned first electrically conductive layer.
Then, referring to FIG. 1D, a patterned second electrically conductive layer 107 is formed over the redistributed pad 106a by the steps of disposing photo-resist layer, performing a photolithographic process, and performing an etching process and serves as a transition layer or an under bump metallurgy layer located over the bump pad 106a. 
Afterwards, referring to FIG. 1E, a second dielectric layer 108 is formed over the patterned first electrically conductive layer 106 with a third opening 108a exposing the portion of the patterned second electrically conductive layer 107, which is located over the bump pad 106a. 
Next, referring to FIG. 1F, a photo-resist layer 109 is formed over the second dielectric layer 108 with a fourth opening 109a exposing the portion of the patterned second electrically conductive layer 107 located over the bump pad 106a. Then, a solder material is filled in the fourth opening 109a through a screen-printing method to form a bump 110.
Finally, the bump 110 is reflowed to be fixed on the patterned second electrically conductive layer 107 over the bump pad 106a securely and shaped into a solder ball 112; and the second dielectric layer 108 is removed in sequence.
However, in the aforementioned conventional bumping process, the solder material is a mixture of solder powder and flux, and the second dielectric layer 108 is usually made of a polymer material, such as polyimide (PI) and Benzocyclobutene (BCB). The flux within the solder material will react with the polymer material to produce water and carbon dioxide or some other gases, so the gases including water and carbon dioxide inside the bump 126 will form air bubbles and said bubbles will stay in the reflowed bump, after the reflow process is performed as shown in FIG. 1G. Hence, the mechanical strength of the bump will be lowered to reduce the reliability of the bump.
Furthermore, the photo-resist layer 109 is typically removed by etching with an etchant. The etchant not only etches away the photo-resist layer 109, but also attach the second dielectric layer 108 made of polymer material underneath the photo-resist layer 109 so that a portion of the second dielectric layer 108 will be removed or damaged. Any loss of integrity of the polymer layer 108 is likely to compromise the protective capacity on the wafer 100.
Therefore, providing another method for forming bumps to solve the mentioned-above disadvantages is the most important task in this invention.