As functionality requirements for integrated circuits (ICs) grow, more and more functional blocks are desired to be integrated into a single IC. System in package (SiP) provides a solution for this demand. In an IC formed with SiP technology, dice of various functions are encapsulated in a single package; these dice are connected with die to die interconnections inside the package for signal interchange, so their functions can be integrated to act like a single chip IC.
Since the die to die interconnections are encapsulated in package with no direct path for ATE (automatic test equipment) probing, it is difficult to test state of each die to die interconnection, e.g., whether the interconnection is well connected. A prior art of testing interconnection involves boundary scan methodology. Boundary scan are designed to test by logic functionality, i.e., test patterns are fed into circuits and resultant logic outputs are scanned out to decide whether the circuits operate normally. However, boundary scan does not apply to SiP very well, because it requires that all dice in SiP must be equipped with circuits that support boundary scan. Also it requires proper test patterns, which are usually difficult and costly to be generated or obtained.