The present disclosure relates to semiconductor processing methods, and particularly to methods for anisotropically etching a high aspect ratio trench in a semiconductor substrate while minimizing an undercut, and structures for effecting the same.
High aspect ratio deep silicon etch techniques are a key enabling technology for implementing through silicon via structures and three-dimensional integration of multiple semiconductor substrates. State of the art deep silicon etch utilizes a time modulated etch process, which is typically referred to as a “Bosch” process.
The Bosch process employs alternating cycles of etching employing a SF6 gas and polymer deposition employing a passivation gas, which is a fluorocarbon gas that does not include hydrogen. The Bosch process provides a reasonable level of anisotropy required for forming high aspect ratio structures. However, the Bosch process, as known in the art, has several limitations. One of such limitations is control of etch profile. Specifically, the cyclical nature of the Bosch process results in sidewall scalloping and undercutting of the etched structures.
To mitigate sidewall scalloping and undercutting of an etch mask (which is a hard mask), increased amounts of the passivation gas may be employed. However, increasing the amount of the passivation gas supplied into the process chamber to reduce sidewall scalloping and undercutting significantly reduces the etch rate of the process, thereby severely limiting the throughput of the process. Undercutting of the hard mask results in formation of voids in a through substrate via that is subsequently formed by filling the trench with a conductive material. A large undercut results in a large void within the through substrate via structure, and is a reliability concern for a three-dimensional semiconductor stack having vertical electrical connections through the through substrate via structures.