Recent years have seen increased high performance in electronic devices such as mobile information devices and information appliances following the development of digital technology. As such, there is an increasing demand for higher-capacity, reduced writing power consumption, increased speed during writing and reading, and extended operational life of nonvolatile storage elements.
In view of these demands, it is considered that there is a limit to the miniaturization of flash memories using existing floating gates. On the other hand, in the case of variable resistance nonvolatile storage elements using a variable resistance layer as a material for a storage unit, there are expectations for further miniaturization, increased speed, reduced power consumption, and so on, since configuration is possible using storage elements having a simple structure in which the variable resistance layer is sandwiched between a lower electrode and an upper electrode.
As an example of such a nonvolatile storage device using variable resistance elements, the cross-point nonvolatile storage device has been proposed (for example, PTL 1). This nonvolatile storage device includes memory cells (variable resistance elements) provided in a matrix to correspond to cross-points between word lines that are arranged to be parallel to each other and bit lines which are arranged so as to cross the respective word lines. Each memory cell is provided with a variable resistance layer whose resistance value changes according to an electrical signal provided between the word line and the bit line.
In the case of such a cross-point nonvolatile storage device, since a transistor does not need to be provided to each memory cell, there is the advantage of allowing the implementation of high-density placement of cells.
[Citation List]
[Patent Literature]
[PTL 1] Japanese Unexamined Patent Application Publication No. 2003-68984