This invention relates to the field of data processing systems. More particularly, this invention relates to the field of data processing systems having a plurality of execution mechanism for executing program instructions and between which a selection may be made as to which execution mechanism is active to execute the stream of program instructions at a given time.
It is known to provide data processing systems, such as those employing the techniques of the big.LITTLE processors designed by ARM Limited of Cambridge, England which incorporate multiple execution mechanisms among which an active execution mechanism is selected. These processors typically include a low performance and low power processor core together with a high performance and high power processor core. When the processing workload is such that a high performance is not required, then the processing is switched so as to be performed by the more energy efficient low power processor core. Conversely, when the processing workload is such that high performance is necessary, then the workload is switched to the high performance processor core. The granularity with which the switching is performed in such systems is large as it can take many hundreds and thousands of processing cycles to move the processor state between the small lower powered processor core and the large high performance processor core.
While the above systems may be used with advantage, it has been noted that in many real life processing loads the changes between a requirement for high performance versus low power occur at a finer level of granularity than may be dealt with in a system in which when one of the cores shut down, the entire processor state is transferred to the other processor core and then that other processor core started. This restricts the benefit which can be achieved.