Integrated circuits such as programmable integrated circuits often contain volatile memory elements in the form of static random access memory (SRAM) cells. In programmable integrated circuits, SRAM cells may serve as configuration random access memory (CRAM) cells. Programmable integrated circuits are a type of integrated circuit that can be programmed by a user to implement a desired custom logic function. CRAM cells are used to store configuration data supplied by the user. Once loaded, CRAM cells supply control signals to transistors to configure the transistors to implement the desired logic function.
Volatile memory elements such as SRAM and CRAM cells are typically formed using a pair of cross-coupled inverters. In each memory cell, the pair of cross-coupled inverters may be connected to an address transistor that is turned on when data is being read from or written into the memory cell. When no data is being read from or written into the memory cell, the address transistor is turned off to isolate the memory cell.
There is a trend with each successive generation of integrated circuit technology to scale transistors towards smaller sizes, lower threshold voltages, and lower power supply voltages. Lower power supply voltages and smaller devices may lead to decreased read/write margins for volatile memory elements. This can pose challenges for reliable device operation.
Moreover, smaller devices tend to suffer more from process, voltage, and temperature variations (PVT variations). Operating the memory elements at lower power supply voltages can further exacerbate the amount of variation experienced by the memory elements, resulting in reduced memory yield.
It is within this context that the embodiments described herein arise.