Testing, test equipment, and associated support personnel are major factors in the cost of all digital electronic components, equipment, and systems. These costs can vary from as low as twenty percent of the purchase price of a component up to three hundred percent or more of the price of a system during its operational lifetime. In addition to these substantial costs, it is very difficult to recruit, train and maintain a skilled and knowledgeable testing work force. These needs are becoming more critical as digital electronic systems are becoming an essential part of our society. Digital systems such as telephones, computers, and control networks must be maintained with a minimum of down time. New requirements are placing greater emphasis on the need for fault-free systems which can maintain their function and reliability at all times. Self-testing and automatic repair, therefore, are rapidly becoming an important objective of our advanced digital system designs.
The need for improved testing methodologies has been recognized for many years. As a result, a number of engineering approaches have been developed to alleviate or minimize these problems with varying degrees of success. Naturally, the cost effectiveness of different techniques will vary with the criticality and importance of the application, but satisfactory overall solutions have not been developed to date. The goals for testing complex digital circuits, equipment, and systems include:
1. a desire to test every active device (i.e. transistors, diodes, etc.) individually in its active (on) and inactive (off) state;
2. a desire to test the operation of inactive devices (i.e. resistors, capacitors, etc.);
3. a desire to test that all interconnecting wires are without shorts or opens;
4. a desire to test circuits in all of their logic states (ands, ors, nors, etc.); and
5. a desire to test complex operations at normal operational speeds (clock rates) to detect delay faults.
The effectiveness of a test is normally measured in a ratio of the number of tests performed compared to the total available and is given as a percent. A standard methodology in making these calculations is normally not observed, but current goals for testing large scale integrated circuits are to reach a test effectiveness of 95 percent or better. Naturally, the goal for all critical systems is to reach 100 percent or as close to it as possible. Other desirable features are:
1. minimizing the need for development and deployment of special test equipment;
2. providing low complexity built-in-test equipment (BITE);
3. the ability to detect multiple faults including any faults in the added test logic; and
4. performing the testing without disassembly of the equipment (i.e. in situ).
Currently, all components and assemblies are tested individually during manufacture. Then, as they are assembled, they are tested as equipment, sub-systems, and systems. Unfortunately, as the system complexity increases, the ability to test for faults is reduced dramatically. The lack of testability in an operational configuration requires disassembly for testing with special testers, a very undesirable feature of current systems. Accordingly, the prime thrust of the electronics industry is to develop improved test procedures.
Conventional methods for testing separate digital components or assemblies utilize the measurement of their electrical characteristics (output voltages, currents, etc.) against specified values plus functional analysis of the systems logic by exercising the unit with digital test patterns. These digital test patterns are normally provided as inputs and as check patterns to test against the outputs. This logic test procedure is expensive and begins to break down as the functional complexity of the circuit increases compared to the number of input/output lines. This is recognized by the industry as a major unsolved problem currently associated with the testing of Large Scale (LSI) and Very Large Scale Integrated (VLSI) circuits.
Ever since the inception of digital electronics, practical methods of providing built-in-test equipment (BITE) have also been proposed and evaluated with limited success. Basically, the levels of fault analysis of these systems have been relatively poor compared to the additional system complexity recuired to carry them through to a successful completion.