(1) Field of the Invention
The present invention relates to a method of manufacturing integrated circuits and other electronic devices. More particularly, the invention relates to an improved process for photoresist patterning in the manufacture of integrated circuits and other electronic devices.
(2) Description of the Prior Art
The manufacture of integrated circuits requires an accurate and precise method to form patterns on wafers to delineate the areas for subsequent doping, isolation, interconnections, etc. The technology involved in the generation of these patterns is known as microlithography and in general involves the following steps: (a) a mask or reticle is made with the required information, (b) a thin layer of a photoresist is coated, as by spin coating onto the wafer, (c) the photoresist is exposed through the mask using the appropriate radiation, such as ultraviolet light, E beam, X-ray, or the like and (d) a relief mask is formed using a suitable solvent called the developer.
The development of photoresist patterns in applications is especially suitable for lithographic definition of very small features. These techniques, in general, employ a top imaging layer, an intermediate layer to be used as a mask, and a bottom planerizing layer. These schemes, however, increase process complexity and expense.
Surface-sensitive processes, where only the surface of the resist needs to be exposed, offer the performance advantages of multilayer schemes with the simplicity of single layer processing. One of the best known processes is the so-called "Desire" process. This process consists in selectively incorporating silicon-containing species in the exposed areas of the photoresist from the gas phase using a silylating agent such as hexamethyldislazane amine, HMDS. In an oxygen plasma, the regions that have incorporated silicon, turn into silicon dioxide. This protects the underlying photoresist from the oxygen plasma, whereas the unexposed regions are etched away in the plasma, with the end result that a positive relief image is formed.
Some of the other dominant schemes are described as follows:
In the bilayer process, resist on polymethylemethacrylate (PMMA) is accomplished by spinning PMMA and baking to drive off the solvent. Resist is spun and baked, then exposed and developed. The PMMA is exposed to ultraviolet light where the resist has to be removed. The PMMA is then developed. The advantages of this technique are the high resolution and good linewidth control of the resist layer, because it is on a planerized antireflective layer. The disadvantages are the poor thermal stability of the PMMA, interfacial mixing of the resist and PMMA, linewidth measurement, difficulty of rework, and inability to do in-line with a stepper.
In the trilayer process, resist on glass on polymer is accomplished by spinning a planerizing antireflective polymer onto the substrate. Then Spin-On-Glass (SOG) is spun or another inorganic layer is sputtered onto the antireflective polymer layer. Next resist is spun on the inorganic layer, exposed and developed. The inorganic layer is etched and then used as a mask for etching the planerizing polymer. The advantages of this technique are the same as the bilayer technique plus good thermal stability of the planerizing substrate and no interfacial mixing. The disadvantages are high defect density, high cost, high cycle time, need for develop etch, and inability to do in-line with stepper.
In the "Promis" or "Desire" process, surface imaging dry develop is accomplished by spinning photoresist. The resist is exposed, baked, and put in a silane (HMDS or other) atmosphere. The silane diffuses into the exposed resist and reacts with the phenol group. This incorporates silicon into the exposed area. The resist is then developed by putting the wafer through reactive ion oxygen etching. The silicon acts as an etch mask. The advantages of this process are extremely high resolution and depth of focus, low cost and short lithography cycle time. The disadvantages are (1) difficult development, because there is no pattern as yet and (2) one cannot know if the pattern is a good one and whether it is worthwhile to proceed with further processing, (3) poor linewidth control, due to softbake sensitivity and non-uniform silicon layer, (4) swelling (overlay control), and (5) need for develop etch.
Workers in the field have published actively and patents of general interest to the present invention include Reichmanis et al U.S. Pat. No. 4,481,049 "Bilevel Resist"; Grieco et al U.S. Pat. No. 4,532,005 "Device Lithography Using Multi-Level Resist Systems"; Hult et al U.S. Pat. No. 4,551,418 "Process for Preparing Negative Relief Images with Catonic Photopolymerization"; Ito et al U.S. Pat. No. 4,552,833 "Radiation Sensitive and Oxygen Plasma Developable Resist"; Namatsu et al U.S. Pat. No. 4,738,916 "Intermediate Layer Material of Three-Layer Resist System"; Mimura et al U.S. Pat. No. 4,751,170 "Silylation Method onto Surface of Polymer Membrane and Pattern Formation Process by the Utilization of Silylation Method"; Allen et al U.S. Pat. No. 4,810,601 "Top Imaged Resists"; Maheras et al U.S. Pat. No. 4,859,573 "Multiple Photoresist Layer Process Using Selective Hardening"; and Garza et al U.S. Pat. No. 4,882,008 "Dry Development of Photoresist".