This invention relates to programmable logic devices (“PLDs”) and other integrated circuits of that general type (all generically referred to for convenience as PLDs). More particularly, the invention relates to high-speed serial data transmitter circuitry for inclusion on PLDs.
PLDs are intended to be relatively general-purpose devices. A PLD can be programmed (configured) and/or otherwise controlled to meet any need within the range of needs that the PLD is designed to support. A PLD may be equipped with high-speed serial data communication circuitry, whereby the PLD can transmit serial data to and/or receive serial data from circuitry that is external to the PLD. In that case, it is desirable for the high-speed serial data communication circuitry of the PLD to be able to support various communication protocols that various users of the PLD product may wish to employ.
In the case of high-speed serial data transmitter circuitry on a PLD, one of the tasks that such circuitry typically needs to perform is serialization of data from the parallel form in which it is typically generated and/or handled in the core logic circuitry of the PLD to the serial form in which the transmitter transmits it off the PLD. This invention provides serializer circuitry that can perform this task for a number of different communication protocols and over a wide range of possible data rates. An illustrative range of data rates that circuitry in accordance with this invention can support is 622 Mbps (mega-bits per second) to 6.5 Gbps (giga-bits per second). This range is only an example, however, and it will be understood that other embodiments of the invention can support other data rate ranges if desired.