1. Field Of The Invention
This invention relates to integrated circuits and, more particularly to an architecture and device for testing mixed analog and digital VLSI circuits.
2. Description Of The Related Art
The advent of Application Specific Integrated Circuit (ASIC) chips has enabled system designers to put an entire printed circuit board, and increasingly more electronic circuitry, into one chip. This type of customization began with digital circuits only. Today, however, analog circuits also are offered by ASIC vendors as part of their ASIC libraries. This move to combine analog and digital technology reflects the pressure to integrate electronic functions into real-world applications, such as automobiles, telephones, and other consumer products which typically are analog-based. Previously, such applications were handled by discrete analog circuits which received signals from sensors and then communicated an output signal to separate digital circuitry through analog/digital converters for further processing.
For digital circuitry to interface effectively with analog circuitry in present-day applications, the digital and analog circuits must be merged on a single silicon chip. However, combining analog and digital circuitry on a single silicon chip raises unique problems, especially when the circuits are to be tested. For example, the testing philosophies of analog and digital circuits are entirely different. Analog circuits produce continuous signals having various magnitudes, and they are tested not only by sensing the existence of a signal, but its magnitude, as well. On the other hand, digital circuits produce signals which are binary, and they are tested by testing the binary response of a circuit when a given combination of binary signals are applied to the inputs of the circuit. With digital circuits, the exact magnitude of each signal is relatively unimportant, as long as it is within a given set of lower and upper limits. Nonetheless, both testing philosophies must be accommodated when digital and analog circuits are combined on one chip.
Testing is further complicated by the fact that gate-to-pin ratios increase as technology advances. Since it is not feasible or practical to bring all of the circuit nodes which should be tested out to the package pins, problems of controllability and observability arise. "Controllability" in this context refers to the ability to apply a test stimulus to a circuit node. "Observability" refers to the ability to observe the circuit's response to a test condition. Since some outputs may not change states in response to a test stimulus, it is desirable to access some intermediate node in the circuit which indicates some kind of response when a test input signal is applied. If this is not possible, the chips may be untestable or, at least, are very difficult to test.
The use of analog circuitry in the chip also raises issues of completeness in testing. Since analog signals are continuous and are typically tested by sensing a signal level within the circuit, an analog circuit may have innumerable parameters to be tested. Testing of all parameters either is not possible or is excessive in terms of additional pin requirements and testing time. Consequently, certain parameters, of necessity, are not tested.
Another problem with testing mixed analog/digital circuitry arises from circuit interactions. For example, an operational amplifier (op amp) is an unconnected circuit with no feedback or gainsetting (feedforward) resistors when purchased as a standard product. In an ASIC chip, however, an op amp is not an unconnected circuit. It is surrounded by feedback and gainsetting resistors, or switches and capacitors, thus complicating the testing of certain parameters. Testing of the analog circuit also may be interfered with by switching transients caused by digital signals. These switching transients induce interference in the analog circuit.
Because of the foregoing considerations, testing methods frequently are implemented in an ad hoc fashion by specialists. Consequently, the testing techniques employed cannot be followed by non-specialists, cannot be automated, may not provide good testability, and do not lend themselves to fault-grading.