The invention relates generally to data transmission systems and, more particularly, to differential transmission line drivers.
FIG. 1 illustrates an example of a conventional low voltage differential driver for driving a differential data transmission line. The example of FIG. 1 is a current mode driver wherein the polarity of the differential output voltage, y-z, is generated by the direction of current flowing through a load resistor Rload of a drive stage 13. The direction of the current flow is controlled by two sets of nMOS (see M1-M4) switches in the drive stage 13, which switches are driven by a predrive stage illustrated at 11. In the illustrated example, if the input signal, in, received by the predrive stage 11 is high, then the signal pos is driven high by operation of predrive switches P2 and M6, and the signal neg is driven low by operation of the predrive switches P1 and M5. Consequently, the drive switches M1 and M4 are turned on and the drive switches M2 and M3 are turned off, so current flows through the load resistor Rload from node y to node z. When the input signal to predrive stage 11 is low, then the signal neg is driven high and the signal pos is driven low, so current flows through the load resistor from node z to node y.
It is well known that electromagnetic interference (EMI) and switching noise in data transmissions can be reduced by slowing down rise and fall times and thereby eliminating fast, noisy transitions. Reflections within a transmission line will interfere with the transmitted signal if the time for the reflection to return to the beginning of the transmission line exceeds the transition time. This reflection time is dependent on the length of the transmission line.
It is therefore desirable to provide for a transmission signal with a longer transition time, because a longer transition time would permit a longer length transmission line.
It can therefore be seen that slew rate control circuitry is often beneficial in data transmission systems, particularly in systems which have relatively long transmission lines. Although output slew rate control has been addressed with respect to the rise and fall times of single-ended buffers, such single-ended techniques do not address the unique characteristics of differential drivers such as illustrated in the example of FIG. 1.
It is therefore desirable to provide output slew rate control for a differential transmission line driver.
The present invention recognizes that, in a current mode differential driver such as the example shown in FIG. 1, the operation of the set of switches M1, M4 interacts with the operation of the set of switches M2, M3 during transitions of the differential output. Accordingly, the present invention further recognizes that these interactions between the operations of the sets of drive switches should be taken into consideration when applying output slew rate control to a differential driver. In this regard, the invention recognizes that, for example, an external capacitor coupled between the outputs y and z of FIG. 1 will reduce the output slew rate of the differential driver without affecting the switching characteristics of the switches M1-M4. However, a capacitor as large as 30 pf may be required to produce transition times greater than 1 ns. The area needed for this capacitance can become disadvantageously large, particularly if a multichannel device is implemented. Furthermore, many conventional data transmission standards, for example LVDS, require the driver to have a low output capacitance.
It is therefore desirable to provide output slew rate control for a differential line driver without increasing the output capacitance of the driver.
According to the invention, the output slew rate of a differential driver can be limited by suitably controlling signal slew rates at the control inputs of the drive switches that control current flow through the load impedance of the differential driver. This advantageously reduces EMI and switching noise, and permits use of longer transmission lines, without increasing the output capacitance of the differential driver.