1. Technical Field
The present invention relates to a semiconductor device and a method of manufacturing the same.
2. Related Art
As a conventional method of manufacturing a semiconductor device, there is a method disclosed in Japanese Laid-Open patent publication No. 2002-343904 (patent document 1), for example. This document discloses a method of manufacturing a multiple-chip type semiconductor device in which a plurality of semiconductor chips are stacked.
According to the manufacturing method disclosed in the patent document 1, first, a printed substrate is prepared in which an electrode post is formed on one surface, and a connection electrode is formed on the other surface. Next, a semiconductor chip is mounted in a face-down manner on the surface of the printed substrate on which the electrode post is formed. Subsequently, after the electrode post and the semiconductor chip are subjected to resin molding, the resin-molded surface side is ground until the electrode post is exposed.
A plurality of the printed substrates obtained in this manner and having semiconductor chips mounted thereon are prepared and stacked onto one another to produce a multiple-chip type semiconductor device. At this time, connection between adjacent printed substrates is established by connection of an electrode post of one substrate to the connection electrode of the other.
According to Japanese Laid-Open patent publication No. 2005-109486 (patent document 2), first, after a contact elevation is formed on a substrate, a re-interconnect is formed on the substrate and on the contact elevation. Next, a semiconductor chip is mounted in a flip-chip manner on the substrate. Subsequently, the contact elevation and the semiconductor chip are sealed with resin. At this time, the sealing with resin is carried out so that the tip end of the contact elevation on which the re-interconnect has been formed will be exposed to the surface of the sealing resin. By repeating the steps from formation of the contact elevation to sealing with resin, a multiple-chip type semiconductor device is produced.
According to the manufacturing method disclosed in Japanese Laid-Open patent publication No. 2004-186422 (patent document 3), first, after an interconnect pattern is formed on an interconnect substrate, a connection terminal of a semiconductor chip is connected in a flip-chip manner to the interconnect pattern. Next, an insulating interlayer is formed so as to cover the entirety of the side surface and the back surface of the semiconductor chip. Subsequently, a via hole is formed that penetrates the insulating interlayer to reach the element-forming surface of the semiconductor chip. Thereafter, a metal plug is formed so as to fill the via hole.
By repeating the steps from formation of the interconnect pattern to formation of the metal plug, a multiple-chip type semiconductor device is produced. Here, via the above-described metal plug, the connection terminal of the semiconductor chip and the interconnect pattern above the semiconductor chip are electrically connected with each other.
According to the manufacturing method disclosed in Japanese Laid-Open patent publication No. H4-356956 (patent document 4), first, a semiconductor substrate in which a through hole has been formed is prepared. Next, an insulating layer and an adhesive metal layer are sequentially stacked on the wall surface of the through hole. Subsequently, a metal plug is formed so as to fill the through hole. At this time, the metal plug is formed so as to protrude from the through hole.
A plurality of semiconductor chips obtained in this manner are prepared and stacked on one another to produce a multiple-chip type semiconductor device. At this time, connection between adjacent semiconductor chips is established via the above-described protruding metal plug.