The invention relates to a semiconductor optoelectronic switch and a method of driving the same.
The value and importance of developments of optical or optoelectronical devices are on the increase in recent years due to suitable properties of lights such as a small interference or its transmission in space. Such properties of lights allow high density data and information transmissions to be realized. It is then expected that utilization of such properties of lights permits high speed and large capacity information processing.
Optoelectronic switches having a double heterostructure have been proposed as one of optoelectronic switches utilizing the above properties of light. Usage of optoelectronic devices having excellent performances due to the above-described properties of light requires an integration of the devices into two-dimensional arrays and light input/output operations in the vertical direction. Also the optoelectronic switches are, therefore, required to be integrated into the two-dimensional arrays. To realize the above matter, an optoelectronic switch having a pnpn double heterostructure has been proposed by K. Kasahara et al. in Applied Physics Letters 52(9), 29 February 1988 as entitled "Double heterostructure optoelectronic switch as a dynamic memory with low-power consumption".
The pnpn double heterostructure optoelectronic switch has the following structure which may be regarded as a thyristor. With reference to FIG. 1, epitaxial layers are grown on a semi-insulating GaAs substrate by a molecular beam epitaxy. An n-GaAs buffer layer having a thickness of 0.5 micrometers and a dopant concentration of 2.times.10.sup.18 cm.sub.-3 is formed on the GaAs substrate. An n-Al.sub.0.4 Ga.sub.0.6 As layer having a thickness of 1 micrometer and a dopant concentration of 5.times.10.sup.17 cm.sup.-3 is formed on the buffer layer. A p-GaAs layer having a thickness of 50 angstroms and a dopant concentration of 2.times.10.sup.19 cm.sup.-3 is formed on the n-Al.sub.0.4 Ga.sub.0.6 As layer. An n-GaAs active layer having a thickness of 1 micrometers and a dopant concentration of 1.times.10.sup.17 cm.sup.-3 is formed on the p-GaAs layer. A p-Al.sub.0.4 Ga.sub.0.6 As layer having a thickness of 0.5 micrometers and a dopant concentration of 5.times.10.sup.18 cm.sup.-3 is formed on the active layer. A p-GaAs contact layer having a thickness of 0.15 micrometers and a dopant concentration of 1.times.10.sup.18 cm.sup.-3 is formed on the p-Al.sub.0.4 Ga.sub.0.6 As layer. An anode and a cathode are provided on the p-GaAs contact layer and on the n-GaAs buffer layer respectively. An n-gate is provided on the n-GaAs layer. A p-diffusion region is formed in the n-GaAs layer so as to reach the p-GaAs layer formed thereunder. A p-gate is provided on the p-diffusion region through which the p-gate is connected to the p-GaAs layer. Namely, the anode and cathode are provided at opposite ends of the pnpn structure so that the thyristor is forward-biased.
The optoelectronic switch has the following characteristics. The optoelectronic switch is sensitive to light for a subsequent switch operation. The optoelectronic switch has a window through which light is injected. When the switch forward-biased through the anode and the cathode receives light, the semiconductor layer has a light energy absorption thereby carries or electron-hole pairs are generated. The forward bias makes the carriers become a current flow. This results in the switch exhibiting a switching operation from the OFF state to the ON state. It would of course be desirable that the switch exhibits as high speed performance as is possible. The high speed performance depends not only upon the semiconductor heterostructure but also its turn-off characteristic. The turn-off characteristic is associated with the time needed for a reset operation or a switching operation from the ON state to the OFF state. Needless to say, it would be desirable that the time for the turn-off operation be as short as possible. A completion of the reset operation requires almost all carriers to be extracted, and thus excess carriers stored during the ON state to be extracted from the switch. The optoelectronic switch needs a relatively long time for the reset operation due to such a structure thereof as to have the excess carriers remain therein. To settle the above problem, the p-gate and the n-gate serve as dual extractor electrodes which promote the extraction of the excess carriers accumulated during the 0N state from the switch for a completion of a subsequent high speed reset operation. Such high speed reset operation is desirable for a high speed switching operation.
The optoelectronic switch, however, has not only the above advantage in the high speed reset operation, but also the following disadvantages. The four-electrode structure of the anode, the cathode and the dual extract electrodes is unsuitable for the integration thereof into the two-dimensional arrays. For the integration of the devices into the two-dimensional arrays, it would be undesirable to provide the four electrodes to the switch due to a complication of fabrication processes which further provides a complication of driver circuits. This results in less uniformity or more variation of the properties of the switch which provides a low yield to the fabrication thereof.
It would therefore be required to provide a novel optoelectronic switch which not only possesses excellent performances such as high speed switching performance but also has a suitable structure for the integration thereof into the two-dimension arrays.