Modern electronic systems typically include a data storage device such as a dynamic random access memory (DRAM), static random access memory (SRAM) or other conventional memory device. The memory device stores data in vast arrays of memory cells. Each cell conventionally stores a single bit of data (a logical "1" or a logical "0") and can be individually accessed or addressed.
Electronic systems, e.g., computers, conventionally store data during operation in the memory device. As these systems become more sophisticated, they require more and more memory capacity to keep pace with the increasing complexity of software based applications that run on the systems. Thus, as the technology relating to memory devices has evolved, designers have tried to increase the density of memory cells in the memory device by decreasing the size of the memory cells. This allows a larger number of memory cells to be fabricated without substantially increasing the size of the semiconductor wafer that houses the memory device.
Static random access memory or "SRAM" is one type of memory device that is used with electronic systems, e.g., computers. Conventionally, an SRAM device includes an array of addressable memory cells. Each cell includes a four transistor flip-flop and access transistors that are coupled to input/output nodes of the flip-flop. Data is written to the memory cell by applying a high or low logic level to one of the input/output nodes of the flip-flop through one of the access transistors. When the logic level is removed from the access transistor, the flip-flop retains this logic level at the input/output node. Data is read out from the flip-flop by turning on the access transistor.
Some researchers have proposed an SRAM cell structure that is based on the reverse base current effect of a bipolar junction transistor. This is a two transistor cell with a bipolar junction storage transistor and a field effect transistor acting as a switch to pass voltages in and out of the cell. Essentially, this structure is capable of storing data because, when a sufficient voltage is maintained between the collector and the emitter of the bipolar junction transistor, the base current of the transistor is zero for two distinct voltages applied to its base. Typically, the bipolar junction transistor does not conduct any base current in this configuration when the base voltage is either zero volts or 0.6 volts. This allows the transistor to store two different logic states; both at essentially no current. The voltage stored on the base of the bipolar junction transistor is read using techniques similar to conventional DRAM devices.
Unfortunately, the researchers have not contemplated how to reduce the size of these cells so as to increase the density of cells of an SRAM array even further.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for an SRAM cell with reduced surface area.