Recently, as an element for a head of a magnetic recording medium used in a hard disk drive, floppy disk drive or the like, a magnetoresistive element (hereinafter, referred to as "MR (magnetoresistive) element") has been used widely. In the head using the MR element (hereinafter, referred to as "MR head"), since a reproduction output is stronger than that of a conventional head using a thin film element, the surface recording density of the magnetic recording medium can be improved greatly. Here, in the following description, the MR element means an element which shows a magnetoresistive effect where resistance changes due to application of an external magnetic field. The MR element includes a GMR (giant magnetoresistive) element or a TMR (tunneling magnetoresistive) element, for example.
FIG. 9 is a circuit diagram showing a conventional signal amplifying circuit of the MR element. The signal amplifying circuit shown in FIG. 9 functions as an output detection circuit of the MR element, namely, a read amplifying circuit. In FIG. 9, both terminals T1 and T2 of the MR element MR are connected respectively with input terminals in1 and in2 of a differential amplifying circuit DA1. The terminal T1 of the MR element MR is connected with a resistance R11 in series, and the terminal T2 is connected with an electric current source CS1 again in series. The constant electric current source CS1 discharges a bias electric current Ib from a power source line Vcc at high potential to a power source line Vee at low potential. Therefore, the bias electric current Ib flows in the MR element MR, and thus the MR element MR generates an electric potential difference which is in proportion to a difference in resistance at the terminals T1 and T2.
The differential amplifying circuit DA1 has transistors TR1 and TR2 which compose a differential pair. The collectors of these transistors TR1 and TR2 are connected with collector resistances RC1 and RC2 having a same resistance value Rc. These resistances RC1 and RC2 are connected with the power source line Vcc. Moreover, emitters of the transistors TR1 and TR2 are connected with each other through a capacitor C1, and the emitters of the transistors TR1 and TR2 are connected respectively with electric current sources CS2 and CS2' in series. The electric current sources CS2 and CS2' are connected with the power source line Vee. Bases of the transistors TR1 and TR2 function as input terminals in1 and in2. Collector terminals of the transistors TR1 and TR2 are also connected respectively with output terminals out1 and out2. The emitters of the transistors TR1 and TR2 composing the differential pair are connected with each other by the capacitor C1 in order to cancel a DC potential difference between the terminals T1 and T2 of the MR element MR to be inputted into the differential amplifying circuit DA1.
In this signal amplifying circuit, the resistance value of the MR element MR in which the bias electric current Ib flows changes according to a magnetic signal from the outside, and thus a potential difference between the terminals T1 and T2 of the MR element MR changes Only an AC portion of the changed potential difference is amplified by the differential amplifying circuit DA1 so as to be outputted as a potential difference between the output terminals out1 and out2, namely, an output voltage.
Incidentally, since an input signal from the MR element MR is a weak input signal of less than 1 mvpp, the differential amplifying circuit DA1 should physically be provided in a vicinity of the MR element MR, and hence it is usual to form an integrated circuit.
However, a capacitance of the capacitor C1 which is realized on one semiconductor chip is maximum about several nF.
Since a cut-off frequency f of a low frequency becomes high, i.e., several tens MHz in such a capacitor C1 having such a small capacitance, a capacitance of an external capacitor should be used. As a result, integration of the signal amplifying circuit of the MR element is hindered, and thus promotion of miniaturization and light weight is prevented.
The cut-off frequency f will be described below concretely with reference to FIG. 10. When a base electric current is ignored, a gain Av of the differential amplifying circuit DA1 shown in FIG. 10 becomes: EQU Av=Rc/re=Rc.multidot.Ie/V.sub.T.
Here, "re" is an emitter resistance of the transistors TR1 and TR2, and "V.sub.T " is thermal voltage defined as follows: EQU V.sub.T =kT/q.about.26 mV at 300 K.
where,
q=electric charge, PA1 k=Boltzman's constant, PA1 T=temperature (in K).
In FIG. 9, since the capacitor C1 is connected with the emitter resistances of the transistors TR1 and TR2 in series, when electric currents which flow in the constant electric current sources CS2 and CS2' are Ie as shown in FIG. 9, EQU Av=Rc/(re+1/2j.omega.C)=Rc/(V.sub.T /Ie+1/2j.omega.C).
Here, "C" is a capacitance of the capacitor C1. Accordingly, the cut-off frequency f becomes: EQU f=Ie/(4.pi.V.sub.T.multidot.C).
When Ie=10 mA and C=5 nF, the cut-off frequency f becomes: EQU f=10 mA/(4.times.3.14.times.26 mV.times.5 nF)=6.1 MHz,
and thus it can be understood that the cut-off frequency f is high.