1. Field of the Invention
The present invention generally relates to data processing and, more particularly, to a data processing apparatus whose plurality of processing units are connected to a ring-shaped bus, a data processing method for use therewith, and a program.
2. Description of the Related Art
Japanese Patent No. 2734246 discusses a conventional method for dividing (grouping), in order to implement high-speed pipeline processing, a sequence of data processing-operations to be performed as pipeline processing into groups, allocating the groups to a plurality of modules, respectively, and connecting the plurality of modules with a bus in the order of processing flow.
However, when a processing order in which processing-operations A, B and C of pipeline processing are performed by the modules (it is assumed that the processing-operations A, B, and C are assigned to the modules without overlap) is changed from A→B→C to A→C→B, it is difficult to change the processing order of the modules connected with a physical bus in such a manner.
Image processing can efficiently be implemented, as follows, by changing the processing order in which a series of processing-operations is performed. For example, when an image is output to an output apparatus, if the number of pixels of an input image is larger than that of pixels of an image output to the output apparatus, it is efficient to perform the processing after the number of pixels of an image to be processed is reduced in an upstream step as close as possible to a start of the processing. On the other hand, if the number of pixels of an input image is smaller than that of pixels of an image output to the output apparatus, it is advisable that the processing is performed in a state, in which the number of pixels of an image to be processed is small, without performing a resolution conversion and that the number of pixels of the image to be processed is increased by a resolution conversion in a downstream step just before an output of the image.
In a case where processing is performed on an input image by converting a certain space such as an input device space into a standard space such as a Commission Internationale de l'Eclairage L*a*b* (CIELAB) color space and where after the processing, the standard space is converted into another space such as an output device space to obtain an output image, a processing order, in which processing-operations such as a one-dimensional look-up table (LUT), a matrix operation, and a three-dimensional LUT, are performed by a space conversion unit at an output side, is reverse to that in which the processing-operations are performed by a space conversion unit at an input side. More specifically, if the processing order can be changed, the same processing modules can be shared by the space conversion units respectively provided at the input side and the output side.
Japanese Patent Nos. 2522952 and 2834210 discuss methods for making the processing order as variable by connecting processing circuits with a ring-shaped bus (hereinafter referred to simply as a “ring bus”).
However, in a plurality of processing circuits that are connected to a ring bus as hardware and have a fixed processing function, it is difficult to suppress an increase in amount of traffic of the ring bus without stagnating a flow of packets flowing through the ring bus.