# Path: pym2149/clock.py
# class ClockInfo:
#     def _shapescale(cls, shape):
#     def __init__(self, config, platform, ymfile = None):
#     def _toneperiodclampor0(self, outrate):
#     def _convert(self, freqorperiod, scale):
#     def toneperiod(self, freq):
#     def noiseperiod(self, freq):
#     def envperiod(self, freq, shape):
#     def tonefreq(self, period):
#     def envfreq(self, period, shape):
# 
# Path: pym2149/dac.py
# class DigiDrumEffect:
#     'Like SinusEffect but in addition toneflagreg and noiseflagreg are virtual and we ignore them.'
# 
#     def __init__(self, sample5shape):
#         self.sample5shape = sample5shape
# 
#     def getshape(self, fixedreg):
#         return self.sample5shape
# 
#     def putlevel5(self, node):
#         node.blockbuf.copybuf(node.chain(node.rtone))
# 
# class NullEffect:
#     'All registers are non-virtual and write directly to chip, the timer does not interfere.'
# 
#     def putlevel5(self, node):
#         node.blockbuf.copybuf(node.chain(node.signal))
#         if node.levelmodereg.value:
#             node.blockbuf.mulbuf(node.chain(node.env))
#         else:
#             # According to block diagram, the level is already 5-bit when combining with binary signal:
#             node.blockbuf.mul(level4to5(node.fixedreg.value))
# 
# class PWMEffect(FixedLevelEffect):
#     'Interrupt setup/routine alternates fixed level between fixedreg and zero.'
# 
#     level4toshape = level4totone5shape
# 
# class SinusEffect(FixedLevelEffect):
#     'Interrupt setup/routine sets fixed level to sample value as scaled by fixedreg.'
# 
#     level4toshape = level4tosinus5shape
# 
# Path: pym2149/iface.py
# class Config(lurlene.iface.Config): pass
# 
# class YMFile(Prerecorded): pass
# 
# Path: pym2149/shapes.py
# def makesample5shape(data, signed, is4bit):
#     if is4bit:
#         data4 = data
#     else:
#         if signed:
#             data = [(d + 0x80) & 0xff for d in data]
#         d0 = min(data)
#         data4 = (_amptolevel4(((d - d0) + .5) / 0x100) for d in data)
#     return Shape.level4to5(data4, len(data) - 1)
# 
# Path: pym2149/ym2149.py
# class PhysicalRegisters:
# 
#     supportedchannels = 3
#     timers = property(lambda self: self.logical.timers)
#     levelbase = 0x8
# 
#     @types(Config, LogicalRegisters)
#     def __init__(self, config, logical):
#         # XXX: Add reverse wiring?
#         # Like the real thing we have 16 registers, this impl ignores the last 2:
#         self.R = tuple(Reg() for _ in range(16)) # Assume all incoming values are in [0, 255].
#         # We only have registers for the authentic number of channels:
#         for c in range(min(self.supportedchannels, config.chipchannels)):
#             logical.toneperiods[c].link(TP, self.R[c * 2], self.R[c * 2 + 1])
#             logical.toneflags[c].link(MixerFlag(c), self.R[0x7])
#             logical.noiseflags[c].link(MixerFlag(self.supportedchannels + c), self.R[0x7])
#             logical.fixedlevels[c].link(lambda l: l & 0x0f, self.R[self.levelbase + c])
#             logical.levelmodes[c].link(getlevelmode, self.R[self.levelbase + c])
#         logical.noiseperiod.link(NP, self.R[0x6])
#         logical.envperiod.link(EP, self.R[0xB], self.R[0xC])
#         logical.envshape.link(lambda s: s & 0x0f, self.R[0xD])
#         for r in self.R:
#             r.value = 0
#         self.logical = logical


from .clock import stclock
from .dac import DigiDrumEffect, NullEffect, PWMEffect, SinusEffect
from .iface import Config, YMFile
from .shapes import makesample5shape
from .ym2149 import PhysicalRegisters
from contextlib import contextmanager
from diapyr import types
from diapyr.util import singleton
            from lagoon import lha
import logging, os, shutil, struct, sys, tempfile
            chan = ((self.data[0x1] & 0x30) >> 4) - 1
            tcr = (self.data[0x6] & 0xe0) >> 5
            tdr = self.data[0xE]
            yield chan, tcr, tdr, PWMEffect, FramesTTL(1)
        if self.data[0x3] & 0x30:
            chan = ((self.data[0x3] & 0x30) >> 4) - 1
            sample = self.flags.samples[self.data[0x8 + chan] & 0x1f]
            tcr = (self.data[0x8] & 0xe0) >> 5
            tdr = self.data[0xF]
            yield chan, tcr, tdr, DigiDrumEffect(sample), SampleTTL(chip.timers[chan].repeat)

class Frame6(Frame56):

    def updatetimers(self, chip):
        for r, rr, rrr in [0x1, 0x6, 0xE], [0x3, 0x8, 0xF]:
            if self.data[r] & 0x30:
                chan = ((self.data[r] & 0x30) >> 4) - 1
                fx = self.data[r] & 0xc0
                if 0x00 == fx:
                    tcr = (self.data[rr] & 0xe0) >> 5
                    tdr = self.data[rrr]
                    yield chan, tcr, tdr, PWMEffect, FramesTTL(1)
                if 0x40 == fx:
                    sample = self.flags.samples[self.data[0x8 + chan] & 0x1f]
                    tcr = (self.data[rr] & 0xe0) >> 5
                    tdr = self.data[rrr]
                    yield chan, tcr, tdr, DigiDrumEffect(sample), SampleTTL(chip.timers[chan].repeat)
                if 0x80 == fx:
                    tcr = (self.data[rr] & 0xe0) >> 5
                    tdr = self.data[rrr]

# Path: pym2149/clock.py
# class ClockInfo:
#     def _shapescale(cls, shape):
#     def __init__(self, config, platform, ymfile = None):
#     def _toneperiodclampor0(self, outrate):
#     def _convert(self, freqorperiod, scale):
#     def toneperiod(self, freq):
#     def noiseperiod(self, freq):
#     def envperiod(self, freq, shape):
#     def tonefreq(self, period):
#     def envfreq(self, period, shape):
# 
# Path: pym2149/dac.py
# class DigiDrumEffect:
#     'Like SinusEffect but in addition toneflagreg and noiseflagreg are virtual and we ignore them.'
# 
#     def __init__(self, sample5shape):
#         self.sample5shape = sample5shape
# 
#     def getshape(self, fixedreg):
#         return self.sample5shape
# 
#     def putlevel5(self, node):
#         node.blockbuf.copybuf(node.chain(node.rtone))
# 
# class NullEffect:
#     'All registers are non-virtual and write directly to chip, the timer does not interfere.'
# 
#     def putlevel5(self, node):
#         node.blockbuf.copybuf(node.chain(node.signal))
#         if node.levelmodereg.value:
#             node.blockbuf.mulbuf(node.chain(node.env))
#         else:
#             # According to block diagram, the level is already 5-bit when combining with binary signal:
#             node.blockbuf.mul(level4to5(node.fixedreg.value))
# 
# class PWMEffect(FixedLevelEffect):
#     'Interrupt setup/routine alternates fixed level between fixedreg and zero.'
# 
#     level4toshape = level4totone5shape
# 
# class SinusEffect(FixedLevelEffect):
#     'Interrupt setup/routine sets fixed level to sample value as scaled by fixedreg.'
# 
#     level4toshape = level4tosinus5shape
# 
# Path: pym2149/iface.py
# class Config(lurlene.iface.Config): pass
# 
# class YMFile(Prerecorded): pass
# 
# Path: pym2149/shapes.py
# def makesample5shape(data, signed, is4bit):
#     if is4bit:
#         data4 = data
#     else:
#         if signed:
#             data = [(d + 0x80) & 0xff for d in data]
#         d0 = min(data)
#         data4 = (_amptolevel4(((d - d0) + .5) / 0x100) for d in data)
#     return Shape.level4to5(data4, len(data) - 1)
# 
# Path: pym2149/ym2149.py
# class PhysicalRegisters:
# 
#     supportedchannels = 3
#     timers = property(lambda self: self.logical.timers)
#     levelbase = 0x8
# 
#     @types(Config, LogicalRegisters)
#     def __init__(self, config, logical):
#         # XXX: Add reverse wiring?
#         # Like the real thing we have 16 registers, this impl ignores the last 2:
#         self.R = tuple(Reg() for _ in range(16)) # Assume all incoming values are in [0, 255].
#         # We only have registers for the authentic number of channels:
#         for c in range(min(self.supportedchannels, config.chipchannels)):
#             logical.toneperiods[c].link(TP, self.R[c * 2], self.R[c * 2 + 1])
#             logical.toneflags[c].link(MixerFlag(c), self.R[0x7])
#             logical.noiseflags[c].link(MixerFlag(self.supportedchannels + c), self.R[0x7])
#             logical.fixedlevels[c].link(lambda l: l & 0x0f, self.R[self.levelbase + c])
#             logical.levelmodes[c].link(getlevelmode, self.R[self.levelbase + c])
#         logical.noiseperiod.link(NP, self.R[0x6])
#         logical.envperiod.link(EP, self.R[0xB], self.R[0xC])
#         logical.envshape.link(lambda s: s & 0x0f, self.R[0xD])
#         for r in self.R:
#             r.value = 0
#         self.logical = logical


# Path: pym2149/ymformat.py
from .clock import stclock
from .dac import DigiDrumEffect, NullEffect, PWMEffect, SinusEffect
from .iface import Config, YMFile
from .shapes import makesample5shape
from .ym2149 import PhysicalRegisters
from contextlib import contextmanager
from diapyr import types
from diapyr.util import singleton
            from lagoon import lha
import logging, os, shutil, struct, sys, tempfile

            chan = ((self.data[0x1] & 0x30) >> 4) - 1
            tcr = (self.data[0x6] & 0xe0) >> 5
            tdr = self.data[0xE]
            yield chan, tcr, tdr, PWMEffect, FramesTTL(1)
        if self.data[0x3] & 0x30:
            chan = ((self.data[0x3] & 0x30) >> 4) - 1
            sample = self.flags.samples[self.data[0x8 + chan] & 0x1f]
            tcr = (self.data[0x8] & 0xe0) >> 5
            tdr = self.data[0xF]
            yield chan, tcr, tdr, DigiDrumEffect(sample), SampleTTL(chip.timers[chan].repeat)

class Frame6(Frame56):

    def updatetimers(self, chip):
        for r, rr, rrr in [0x1, 0x6, 0xE], [0x3, 0x8, 0xF]:
            if self.data[r] & 0x30:
                chan = ((self.data[r] & 0x30) >> 4) - 1
                fx = self.data[r] & 0xc0
                if 0x00 == fx:
                    tcr = (self.data[rr] & 0xe0) >> 5
                    tdr = self.data[rrr]
                    yield chan, tcr, tdr, PWMEffect, FramesTTL(1)
                if 0x40 == fx:
                    sample = self.flags.samples[self.data[0x8 + chan] & 0x1f]
                    tcr = (self.data[rr] & 0xe0) >> 5
                    tdr = self.data[rrr]
                    yield chan, tcr, tdr, DigiDrumEffect(sample), SampleTTL(chip.timers[chan].repeat)
                if 0x80 == fx:
                    tcr = (self.data[rr] & 0xe0) >> 5
                    tdr = self.data[rrr]

                    yield chan, tcr, tdr, SinusEffect, FramesTTL(1)