# Path: luz_asm_sim/lib/simlib/peripheral/peripheral.py
# class Peripheral(object):
#     """ An abstract memory-mapped perhipheral interface.
#         Memory-mapped peripherals are accessed through memory
#         reads and writes.
# 
#         The address given to reads and writes is relative to the
#         peripheral's memory map.
#         Width is 1, 2, 4 for byte, halfword and word accesses.
#     """
#     def read_mem(self, addr, width):
#         raise NotImplementedError()
# 
#     def write_mem(self, addr, width, data):
#         raise NotImplementedError()
# 
# Path: luz_asm_sim/lib/commonlib/portability.py
# def printme(s):
#     # This function exists because I was initially developing Luz on Python 2.5
#     sys.stdout.write(str(s))


from .peripheral import Peripheral
from ...commonlib.portability import printme
# Luz micro-controller simulator
# Eli Bendersky (C) 2008-2010


class DebugQueue(Peripheral):
    """ Public attributes:

            items:
                A list of words written to the queue in FIFO order
    """
    def __init__(self, debug_print=False):
        self.debug_print = debug_print
        self.reset()

    def reset(self):
        self.items = []

    def read_mem(self, addr, width):
        """ This peripheral is write-only.
            Reads are ignored.
        """
        pass

    def write_mem(self, addr, width, data):
        """ Only the correct address is mapped to this peripheral,
            and we don't care about width...
        """
        self.items.append(data)

        if self.debug_print:

# Path: luz_asm_sim/lib/simlib/peripheral/peripheral.py
# class Peripheral(object):
#     """ An abstract memory-mapped perhipheral interface.
#         Memory-mapped peripherals are accessed through memory
#         reads and writes.
# 
#         The address given to reads and writes is relative to the
#         peripheral's memory map.
#         Width is 1, 2, 4 for byte, halfword and word accesses.
#     """
#     def read_mem(self, addr, width):
#         raise NotImplementedError()
# 
#     def write_mem(self, addr, width, data):
#         raise NotImplementedError()
# 
# Path: luz_asm_sim/lib/commonlib/portability.py
# def printme(s):
#     # This function exists because I was initially developing Luz on Python 2.5
#     sys.stdout.write(str(s))


# Path: luz_asm_sim/lib/simlib/peripheral/debugqueue.py
from .peripheral import Peripheral
from ...commonlib.portability import printme

# Luz micro-controller simulator
# Eli Bendersky (C) 2008-2010


class DebugQueue(Peripheral):
    """ Public attributes:

            items:
                A list of words written to the queue in FIFO order
    """
    def __init__(self, debug_print=False):
        self.debug_print = debug_print
        self.reset()

    def reset(self):
        self.items = []

    def read_mem(self, addr, width):
        """ This peripheral is write-only.
            Reads are ignored.
        """
        pass

    def write_mem(self, addr, width, data):
        """ Only the correct address is mapped to this peripheral,
            and we don't care about width...
        """
        self.items.append(data)

        if self.debug_print:

            printme('DebugQueue: 0x%X\n' % data)