# Path: src/uio/ti/eirq.py
# class EIrq( ctypes.Structure ):
#     _fields_ = [
#             ("enabled", ushort),    #rw
#             ("pending", ushort),    #r-
#             ("_clear",  ushort),    #-c
#             ("_set",    ushort),    #-s
#         ]
# 
#     def clear( self, bits, *, eoi=False ):
#         if eoi:
#             bits |= 1
#         self._clear = bits
#         self._clear  # ocp barrier
#         if bits & 1 and hasattr( self, 'uio' ):
#             self.uio.irq_enable()
# 
#     def set( self, bits ):
#         self._set = bits
# 
#     def enable( self, bits ):
#         self.enabled |= bits
#         if hasattr( self, 'uio' ):
#             self.uio.irq_enable()
# 
#     def disable( self, bits ):
#         self.enabled &= ~bits
# 
#     @property
#     def active( self ):
#         return self.enabled & self.pending
# 
#     def recv( self ):
#         if hasattr( self, 'uio' ):
#             self.uio.irq_recv()
#         events = self.active
#         self.clear( events, eoi=True )
#         return events
# 
#     def reset( self ):
#         self.enabled = 0
#         self.clear( 0xffff )


from uio.utils import fix_ctypes_struct, cached_getter
from ctypes import c_uint8 as u8, c_uint16 as u16, c_uint32 as u32
from .eirq import EIrq
import ctypes

ctr_t = u32    # counter value

class Pwm( ctypes.Structure ):
    # pwm mode:
    #   output high while 0 <= counter < compare
    #   output low  while compare <= counter <= maximum
    # counter wraps to 0 after maximum (period = maximum + 1).
    # 100% duty cycle if compare > maximum,
    #   cannot be attained if maximum == 0xffffffff.
    # output can be inverted via config register.
    _fields_ = [
            ("maximum",     ctr_t),     #r>  write also sets ld_maximum
            ("compare",     ctr_t),     #r>  write also sets ld_compare

# Path: src/uio/ti/eirq.py
# class EIrq( ctypes.Structure ):
#     _fields_ = [
#             ("enabled", ushort),    #rw
#             ("pending", ushort),    #r-
#             ("_clear",  ushort),    #-c
#             ("_set",    ushort),    #-s
#         ]
# 
#     def clear( self, bits, *, eoi=False ):
#         if eoi:
#             bits |= 1
#         self._clear = bits
#         self._clear  # ocp barrier
#         if bits & 1 and hasattr( self, 'uio' ):
#             self.uio.irq_enable()
# 
#     def set( self, bits ):
#         self._set = bits
# 
#     def enable( self, bits ):
#         self.enabled |= bits
#         if hasattr( self, 'uio' ):
#             self.uio.irq_enable()
# 
#     def disable( self, bits ):
#         self.enabled &= ~bits
# 
#     @property
#     def active( self ):
#         return self.enabled & self.pending
# 
#     def recv( self ):
#         if hasattr( self, 'uio' ):
#             self.uio.irq_recv()
#         events = self.active
#         self.clear( events, eoi=True )
#         return events
# 
#     def reset( self ):
#         self.enabled = 0
#         self.clear( 0xffff )


# Path: src/uio/ti/ecap.py
from uio.utils import fix_ctypes_struct, cached_getter
from ctypes import c_uint8 as u8, c_uint16 as u16, c_uint32 as u32
from .eirq import EIrq
import ctypes


ctr_t = u32    # counter value

class Pwm( ctypes.Structure ):
    # pwm mode:
    #   output high while 0 <= counter < compare
    #   output low  while compare <= counter <= maximum
    # counter wraps to 0 after maximum (period = maximum + 1).
    # 100% duty cycle if compare > maximum,
    #   cannot be attained if maximum == 0xffffffff.
    # output can be inverted via config register.
    _fields_ = [
            ("maximum",     ctr_t),     #r>  write also sets ld_maximum
            ("compare",     ctr_t),     #r>  write also sets ld_compare

            ("ld_maximum",  ctr_t),     #rw  loaded into maximum on counter wrap