ldilov
/

stablelm-tuned-alpha-7b-4bit-128g-descact-sym-true-sequential

SFconvertbot commited on Nov 28, 2023

Commit

62ca088

•

1 Parent(s): f0d8eee

Adding `safetensors` variant of this model (#2)

- Adding `safetensors` variant of this model (b66c8e2f91c199f042d8c5e40616c7bf89d29d69)

Co-authored-by: Safetensors convertbot <[email protected]>

Files changed (1) hide show

model.safetensors ADDED Viewed

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