I am using Xilinx and trying to compile this code.
I am getting this error:
**ERROR:HDLParsers:808 - "C:/Users/Dell/digi/sm.vhd" Line xx. and can not have such operands in this context.**
[code is here](http://pastebin.com/JSmaE5dj)
['https://Stackoverflow.com/questions/13216224', 'https://Stackoverflow.com', 'https://Stackoverflow.com/users/1416136/']
The problem is you are mixing bit and std\_logic types. You should generally pick one or the other (no using both in the same file unless you *REALLY* know why you need to), most new work is usually done using std\_logic. To fix the problem you need to make everything consistent...either change your inputs to bit types, as you did, or change your internal declared signals to std\_logic:

```
signal Q1, Q2, Q3: std_logic;

```
Changing the declaration of ports from

```
port(X1,X2,CLK: in STD_LOGIC;

```

to

```
port(X1,X2,CLK: in bit;

```

made it work.
[Difference between the two](http://vhdlguru.blogspot.in/2010/03/what-is-difference-between-stdlogic-and.html)