<commit_before>// addr_trans_controller.cc
// Copyright (c) 2014 <NAME> <<EMAIL>>

#include "addr_trans_controller.h"
#include <vector>

using namespace std;

// Space partition (low -> high):
// phy_limit || NVM buffer || DRAM buffer
AddrTransController::AddrTransController(
    uint64_t phy_range, uint64_t dram_size,
    int att_len, int block_bits, int page_bits, MemStore* ms):

    att_(att_len, block_bits), nvm_buffer_(2 * att_len, block_bits),
    dram_buffer_(att_len, block_bits),
    migrator_(block_bits, page_bits, dram_size >> page_bits),
    phy_range_(phy_range), dram_size_(dram_size) {

  assert(phy_range >= dram_size);
  mem_store_ = ms;
  in_checkpointing_ = false;

  nvm_buffer_.set_addr_base(phy_range_);
  dram_buffer_.set_addr_base(nvm_buffer_.addr_base() + nvm_buffer_.Size());
}

Addr AddrTransController::LoadAddr(Addr phy_addr) {
  assert(phy_addr < phy_range_);
  Tag phy_tag = att_.ToTag(phy_addr);

  PTTEntry* page = migrator_.LookupPage(phy_addr, Profiler::Null);
  if (!page) { // NVM
    int index = ATTLookup(att_, phy_tag).first;
    mem_store_->OnNVMRead(phy_addr, att_.block_size());
    if (index == -EINVAL) return phy_addr; // direct mapping

    const ATTEntry& entry = att_.At(index);
    Addr mach_addr = att_.Translate(phy_addr, entry.mach_base);
    att_.AddBlockRead(index);
    return mach_addr;
  } else { // DRAM
    Addr mach_addr = migrator_.Translate(phy_addr, page->mach_base);
    migrator_.AddDRAMPageRead(*page);
    mem_store_->OnDRAMRead(mach_addr, att_.block_size());
    return mach_addr;
  }
}

Addr AddrTransController::DRAMStore(Addr phy_addr, int size) {
  int index = ATTLookup(att_, att_.ToTag(phy_addr)).first;<commit_msg>Fix bug: LoadAddr() should first check ATT even in the case of access on a DRAM page.<commit_after>// addr_trans_controller.cc
// Copyright (c) 2014 <NAME> <<EMAIL>>

#include "addr_trans_controller.h"
#include <vector>

using namespace std;

// Space partition (low -> high):
// phy_limit || NVM buffer || DRAM buffer
AddrTransController::AddrTransController(
    uint64_t phy_range, uint64_t dram_size,
    int att_len, int block_bits, int page_bits, MemStore* ms):

    att_(att_len, block_bits), nvm_buffer_(2 * att_len, block_bits),
    dram_buffer_(att_len, block_bits),
    migrator_(block_bits, page_bits, dram_size >> page_bits),
    phy_range_(phy_range), dram_size_(dram_size) {

  assert(phy_range >= dram_size);
  mem_store_ = ms;
  in_checkpointing_ = false;

  nvm_buffer_.set_addr_base(phy_range_);
  dram_buffer_.set_addr_base(nvm_buffer_.addr_base() + nvm_buffer_.Size());
}

Addr AddrTransController::LoadAddr(Addr phy_addr) {
  int index = ATTLookup(att_, att_.ToTag(phy_addr)).first;
  if (index != -EINVAL) {
    const ATTEntry& entry = att_.At(index);
    att_.AddBlockRead(index);
    return att_.Translate(phy_addr, entry.mach_base);
  } else {
    PTTEntry* page = migrator_.LookupPage(phy_addr, Profiler::Null);
    if (page) {
      migrator_.AddDRAMPageRead(*page);
      return migrator_.Translate(phy_addr, page->mach_base);
    } else {
      return phy_addr;
    }
  }
}

Addr AddrTransController::DRAMStore(Addr phy_addr, int size) {
  int index = ATTLookup(att_, att_.ToTag(phy_addr)).first;
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