<commit_before>from hwt.code import log2ceil, isPow2
from hwt.hdl.constants import READ, WRITE
from hwt.synthesizer.unit import Unit
from typing import List, Tuple, Set, Union


class AUTO_ADDR():
    """constant which means that address should be picked automatically"""
    pass


"""
:note: ACCESS_* belongs into feature set in master/slave specification
:var ACCESS_R: constant which specifies access to read only
:var ACCESS_W: constant which specifies access to write only
:var ACCESS_RW: constant which specifies access to read and write
"""
ACCESS_R = {READ}
ACCESS_W = {WRITE}
ACCESS_RW = {READ, WRITE}


class BusInterconnect(Unit):
    """
    Abstract class of bus interconnects

    :ivar m: HObjList of master interfaces
    :ivar s: HObjList of slave interfaces
    """

    def __init__(self,
                 masters: List[Tuple[int, Set]],
                 slaves: List[Tuple[Union[int, AUTO_ADDR], int, Set]]):
        """
        :param masters: list of tuples (offset, features) for each master
        :param slaves: list of tuples (offset, size, features) for each slave
        :note: features can be found on definition of this class
        """
        self._masters = masters

        _slaves = []
        maxAddr = 0
        for offset, size, features in slaves:
            if not isPow2(size):
                raise AssertionError(
                    "Size which is not power of 2 is suboptimal for interconnects")
            if offset == AUTO_ADDR:
                offset = maxAddr
                isAligned = (offset % size) == 0
                if not isAligned:
                    offset = ((offset // size) + 1) * size
            else:
                isAligned = (offset % size) == 0
                if not isAligned:
                    raise AssertionError("Offset which is not aligned to size is suboptimal")<commit_msg>codestyle, doc: BusInterconnect<commit_after>from typing import List, Tuple, Set, Union

from hwt.code import log2ceil, isPow2
from hwt.hdl.constants import READ, WRITE
from hwt.synthesizer.unit import Unit


class AUTO_ADDR():
    """constant which means that address should be picked automatically"""
    pass


"""
:note: ACCESS_* belongs into feature set in master/slave specification
:var ACCESS_R: constant which specifies access to read only
:var ACCESS_W: constant which specifies access to write only
:var ACCESS_RW: constant which specifies access to read and write
"""
ACCESS_R = {READ}
ACCESS_W = {WRITE}
ACCESS_RW = {READ, WRITE}


class BusInterconnect(Unit):
    """
    Abstract class of bus interconnects

    :ivar m: HObjList of master interfaces
    :ivar s: HObjList of slave interfaces
    """

    def __init__(self,
                 masters: List[Tuple[int, Set]],
                 slaves: List[Tuple[Union[int, AUTO_ADDR], int, Set]]):
        """
        :param masters: list of tuples (offset, features) for each master
        :param slaves: list of tuples (offset, size, features) for each slave
        :note: features are ACCESS_R/W/RW defined in this file
        """
        self._masters = masters

        _slaves = []
        maxAddr = 0
        for offset, size, features in slaves:
            if not isPow2(size):
                raise AssertionError(
                    "Size which is not power of 2 is suboptimal for interconnects")
            if offset == AUTO_ADDR:
                offset = maxAddr
                isAligned = (offset % size) == 0
                if not isAligned:
                    offset = ((offset // size) + 1) * size
            else:
                isAligned = (offset % size) == 0
                if not isAligned:
                    raise AssertionError("Offset which is not aligned to size is suboptimal")
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