<commit_before>/*
 * Copyright (c) 2017 Intel Corporation
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#define DT_DRV_COMPAT intel_cavs_intc

#include <zephyr/arch/cpu.h>
#include <zephyr/device.h>
#include <zephyr/irq.h>
#include <zephyr/irq_nextlevel.h>
#include "intc_cavs.h"

#if defined(CONFIG_SMP) && (CONFIG_MP_NUM_CPUS > 1)
#if defined(CONFIG_SOC_INTEL_CAVS_V15)
#define PER_CPU_OFFSET(x)	(0x40 * x)
#elif defined(CONFIG_SOC_INTEL_CAVS_V18)
#define PER_CPU_OFFSET(x)	(0x40 * x)
#elif defined(CONFIG_SOC_INTEL_CAVS_V20)
#define PER_CPU_OFFSET(x)	(0x40 * x)
#elif defined(CONFIG_SOC_INTEL_CAVS_V25)
#define PER_CPU_OFFSET(x)	(0x40 * x)
#else
#error "Must define PER_CPU_OFFSET(x) for SoC"
#endif
#else
#define PER_CPU_OFFSET(x)	0
#endif

static ALWAYS_INLINE
struct cavs_registers *get_base_address(struct cavs_ictl_runtime *context)
{
#if defined(CONFIG_SMP) && (CONFIG_MP_NUM_CPUS > 1)
	return UINT_TO_POINTER(context->base_addr +
			       PER_CPU_OFFSET(arch_curr_cpu()->id));
#else
	return UINT_TO_POINTER(context->base_addr);
#endif
}

static ALWAYS_INLINE void cavs_ictl_dispatch_child_isrs(uint32_t intr_status,
						       uint32_t isr_base_offset)<commit_msg>include: add missing sys/arch_interface.h include<commit_after>/*
 * Copyright (c) 2017 Intel Corporation
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#define DT_DRV_COMPAT intel_cavs_intc

#include <zephyr/arch/cpu.h>
#include <zephyr/device.h>
#include <zephyr/irq.h>
#include <zephyr/irq_nextlevel.h>
#include <zephyr/sys/arch_interface.h>
#include "intc_cavs.h"

#if defined(CONFIG_SMP) && (CONFIG_MP_NUM_CPUS > 1)
#if defined(CONFIG_SOC_INTEL_CAVS_V15)
#define PER_CPU_OFFSET(x)	(0x40 * x)
#elif defined(CONFIG_SOC_INTEL_CAVS_V18)
#define PER_CPU_OFFSET(x)	(0x40 * x)
#elif defined(CONFIG_SOC_INTEL_CAVS_V20)
#define PER_CPU_OFFSET(x)	(0x40 * x)
#elif defined(CONFIG_SOC_INTEL_CAVS_V25)
#define PER_CPU_OFFSET(x)	(0x40 * x)
#else
#error "Must define PER_CPU_OFFSET(x) for SoC"
#endif
#else
#define PER_CPU_OFFSET(x)	0
#endif

static ALWAYS_INLINE
struct cavs_registers *get_base_address(struct cavs_ictl_runtime *context)
{
#if defined(CONFIG_SMP) && (CONFIG_MP_NUM_CPUS > 1)
	return UINT_TO_POINTER(context->base_addr +
			       PER_CPU_OFFSET(arch_curr_cpu()->id));
#else
	return UINT_TO_POINTER(context->base_addr);
#endif
}

static ALWAYS_INLINE void cavs_ictl_dispatch_child_isrs(uint32_t intr_status,
						       uint32_t isr_base_offset)
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