<commit_before>/*
 * Blackfin core register bit & address definitions
 *
 * Copyright 2005-2008 Analog Devices Inc.
 *
 * Licensed under the ADI BSD license or GPL-2 (or later).
 */

#ifndef _DEF_LPBLACKFIN_H
#define _DEF_LPBLACKFIN_H

#include <mach/anomaly.h>

#define MK_BMSK_(x) (1<<x)
#define BFIN_DEPOSIT(mask, x)	(((x) << __ffs(mask)) & (mask))
#define BFIN_EXTRACT(mask, x)	(((x) & (mask)) >> __ffs(mask))

#ifndef __ASSEMBLY__

#include <linux/types.h>

#if ANOMALY_05000198
# define NOP_PAD_ANOMALY_05000198 "nop;"
#else
# define NOP_PAD_ANOMALY_05000198
#endif

#define bfin_read8(addr) ({ \
	uint32_t __v; \
	__asm__ __volatile__( \
		NOP_PAD_ANOMALY_05000198 \
		"%0 = b[%1] (z);" \
		: "=d" (__v) \
		: "a" (addr) \
	); \
	__v; })

#define bfin_read16(addr) ({ \
	uint32_t __v; \
	__asm__ __volatile__( \
		NOP_PAD_ANOMALY_05000198 \
		"%0 = w[%1] (z);" \
		: "=d" (__v) \
		: "a" (addr) \
	); \
	__v; })

#define bfin_read32(addr) ({ \
	uint32_t __v; \
	__asm__ __volatile__( \
		NOP_PAD_ANOMALY_05000198 \
		"%0 = [%1];" \
		: "=d" (__v) \
		: "a" (addr) \
	); \
	__v; })

#define bfin_write8(addr, val) \
	__asm__ __volatile__( \
		NOP_PAD_ANOMALY_05000198 \
		"b[%0] = %1;" \
		: \
		: "a" (addr), "d" ((uint8_t)(val)) \
		: "memory" \
	)

#define bfin_write16(addr, val) \
	__asm__ __volatile__( \
		NOP_PAD_ANOMALY_05000198 \
		"w[%0] = %1;" \
		: \
		: "a" (addr), "d" ((uint16_t)(val)) \
		: "memory" \
	)

#define bfin_write32(addr, val) \
	__asm__ __volatile__( \
		NOP_PAD_ANOMALY_05000198 \
		"[%0] = %1;" \
		: \
		: "a" (addr), "d" (val) \
		: "memory" \
	)

#endif /* __ASSEMBLY__ */

/**************************************************
 * System Register Bits
 **************************************************/

/**************************************************
 * ASTAT register
 **************************************************/

/* definitions of ASTAT bit positions*/

/*Result of last ALU0 or shifter operation is zero*/
#define ASTAT_AZ_P         0x00000000
/*Result of last ALU0 or shifter operation is negative*/
#define ASTAT_AN_P         0x00000001
/*Condition Code, used for holding comparison results*/
#define ASTAT_CC_P         0x00000005
/*Quotient Bit*/
#define ASTAT_AQ_P         0x00000006
/*Rounding mode, set for biased, clear for unbiased*/
#define ASTAT_RND_MOD_P    0x00000008
/*Result of last ALU0 operation generated a carry*/
#define ASTAT_AC0_P        0x0000000C
/*Result of last ALU0 operation generated a carry*/<commit_msg>Blackfin: unify MMR helpers<commit_after>/*
 * Blackfin core register bit & address definitions
 *
 * Copyright 2005-2008 Analog Devices Inc.
 *
 * Licensed under the ADI BSD license or GPL-2 (or later).
 */

#ifndef _DEF_LPBLACKFIN_H
#define _DEF_LPBLACKFIN_H

#include <mach/anomaly.h>

#define MK_BMSK_(x) (1<<x)
#define BFIN_DEPOSIT(mask, x)	(((x) << __ffs(mask)) & (mask))
#define BFIN_EXTRACT(mask, x)	(((x) & (mask)) >> __ffs(mask))

#ifndef __ASSEMBLY__

#include <linux/types.h>

#if ANOMALY_05000198
# define NOP_PAD_ANOMALY_05000198 "nop;"
#else
# define NOP_PAD_ANOMALY_05000198
#endif

#define _bfin_readX(addr, size, asm_size, asm_ext) ({ \
	u32 __v; \
	__asm__ __volatile__( \
		NOP_PAD_ANOMALY_05000198 \
		"%0 = " #asm_size "[%1]" #asm_ext ";" \
		: "=d" (__v) \
		: "a" (addr) \
	); \
	__v; })
#define _bfin_writeX(addr, val, size, asm_size) \
	__asm__ __volatile__( \
		NOP_PAD_ANOMALY_05000198 \
		#asm_size "[%0] = %1;" \
		: \
		: "a" (addr), "d" ((u##size)(val)) \
		: "memory" \
	)

#define bfin_read8(addr)  _bfin_readX(addr,  8, b, (z))
#define bfin_read16(addr) _bfin_readX(addr, 16, w, (z))
#define bfin_read32(addr) _bfin_readX(addr, 32,  ,    )
#define bfin_write8(addr, val)  _bfin_writeX(addr, val,  8, b)
#define bfin_write16(addr, val) _bfin_writeX(addr, val, 16, w)
#define bfin_write32(addr, val) _bfin_writeX(addr, val, 32,  )

#endif /* __ASSEMBLY__ */

/**************************************************
 * System Register Bits
 **************************************************/

/**************************************************
 * ASTAT register
 **************************************************/

/* definitions of ASTAT bit positions*/

/*Result of last ALU0 or shifter operation is zero*/
#define ASTAT_AZ_P         0x00000000
/*Result of last ALU0 or shifter operation is negative*/
#define ASTAT_AN_P         0x00000001
/*Condition Code, used for holding comparison results*/
#define ASTAT_CC_P         0x00000005
/*Quotient Bit*/
#define ASTAT_AQ_P         0x00000006
/*Rounding mode, set for biased, clear for unbiased*/
#define ASTAT_RND_MOD_P    0x00000008
/*Result of last ALU0 operation generated a carry*/
#define ASTAT_AC0_P        0x0000000C
/*Result of last ALU0 operation generated a carry*/
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