<commit_before># D16 CPU
This is a simple(ish) 16 bit cpu formed in a collaboration between C-Elegans, flaviaut, and pmathbraniac.
The cpu is a load-store architecture, with variable length instructions (multiples of 16 bits) and 7 GP registers.
The cpu is written in VHDL and is simulatable with GHDL.

Current build health:
[![CircleCI](https://circleci.com/gh/C-Elegans/d16.svg?style=svg)](https://circleci.com/gh/C-Elegans/d16)
## D16 Assembler
The included assembler is written in C, and uses bison and flex for parsing. It's not of the best quality, but it works.


It can be built by:

```
cd d16/assembler/build
cmake ..; make
./d16-main/d16 <file> <output>
```

Tests can be run by

```
cd d16/assembler/build
cmake -DTARGET_GROUP=test ..; make
./d16-tests/testing_main
```

# CPU 
A general layout of the CPU is provided here, this is subject to change during the project
![alt text](https://raw.githubusercontent.com/C-Elegans/d16/master/D16%20Cpu%20Diagram.png "D16 CPU Diagram")
The CPU's execution cycle takes 5 cycles for most instructions, 6 cycles for memory, and 7 for jumps
![alt text](https://raw.githubusercontent.com/C-Elegans/d16/master/CPU%20Execution.png "D16 Execution Diagram")
## Module testbenches
All testbenches can be run from the makefile in `vhdl/build/`
The makefile assumes that you have both GHDL and gtkwave installed and in your path. 
GHDL is required to simulate the vhdl files.
Gtkwave is required to view the waveforms generated by the testbench.

To list all testbenches, run `make tests-list`. 
To run one testbench, run `make` followed by the testbench name.<commit_msg>Update readme to match new build structure<commit_after># D16 CPU
This is a simple(ish) 16 bit cpu formed in a collaboration between C-Elegans, flaviaut, and pmathbraniac.
The cpu is a load-store architecture, with variable length instructions (multiples of 16 bits) and 7 GP registers.
The cpu is written in VHDL and is simulatable with GHDL.

Current build health:
[![CircleCI](https://circleci.com/gh/C-Elegans/d16.svg?style=svg)](https://circleci.com/gh/C-Elegans/d16)
## D16 Assembler
The included assembler is written in C, and uses bison and flex for parsing. It's not of the best quality, but it works.


It can be built by:

```
cd d16/assembler/cmake
cmake ..; make
./d16-main/d16 <file> <output>
```

Tests can be run by

```
cd d16/assembler/cmake
cmake -DTARGET_GROUP=test ..; make
./d16-tests/testing_main
```

# CPU 
A general layout of the CPU is provided here, this is subject to change during the project
![alt text](https://raw.githubusercontent.com/C-Elegans/d16/master/D16%20Cpu%20Diagram.png "D16 CPU Diagram")
The CPU's execution cycle takes 5 cycles for most instructions, 6 cycles for memory, and 7 for jumps
![alt text](https://raw.githubusercontent.com/C-Elegans/d16/master/CPU%20Execution.png "D16 Execution Diagram")
## Module testbenches
All testbenches can be run from the makefile in `vhdl/build/`
The makefile assumes that you have both GHDL and gtkwave installed and in your path. 
GHDL is required to simulate the vhdl files.
Gtkwave is required to view the waveforms generated by the testbench.

To list all testbenches, run `make tests-list`. 
To run one testbench, run `make` followed by the testbench name.
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