<commit_before>/*
 * Copyright 2014, General Dynamics C4 Systems
 *
 * This software may be distributed and modified according to the terms of
 * the GNU General Public License version 2. Note that NO WARRANTY is provided.
 * See "LICENSE_GPLv2.txt" for details.
 *
 * @TAG(GD_GPL)
 */

#include <types.h>
#include <machine/io.h>
#include <kernel/vspace.h>
#include <arch/machine.h>
#include <arch/kernel/vspace.h>
#include <plat/machine.h>
#include <arch/linker.h>
#include <plat/machine/devices.h>
#include <plat/machine/hardware.h>

/* Available physical memory regions on platform (RAM) */
/* NOTE: Regions are not allowed to be adjacent! */
const p_region_t BOOT_RODATA avail_p_regs[] = {
    /* 1 GiB */
    { /* .start = */ 0x40000000, /* .end = */ 0x80000000 }
};

BOOT_CODE int
get_num_avail_p_regs(void)
{
    return sizeof(avail_p_regs) / sizeof(p_region_t);
}

BOOT_CODE p_region_t
get_avail_p_reg(unsigned int i)
{
    return avail_p_regs[i];
}

const p_region_t BOOT_RODATA dev_p_regs[] = {
    { /* .start */ CHIPID_PADDR           , /* .end */ CHIPID_PADDR            + (1 << PAGE_BITS) },
    { /* .start */ SYSREG_PADDR           , /* .end */ SYSREG_PADDR            + (1 << PAGE_BITS) },
    { /* .start */ PMU_PADDR              , /* .end */ PMU_PADDR               + (1 << PAGE_BITS) },
    { /* .start */ CMU_TOP_PART_PADDR     , /* .end */ CMU_TOP_PART_PADDR      + (13 << PAGE_BITS) },
    { /* .start */ SMDMA0_PADDR           , /* .end */ SMDMA0_PADDR            + (1 << PAGE_BITS) },
    { /* .start */ CMU_DMC_PART_PADDR     , /* .end */ CMU_DMC_PART_PADDR      + (9 << PAGE_BITS) },
    { /* .start */ NSMDMA0_PADDR          , /* .end */ NSMDMA0_PADDR           + (1 << PAGE_BITS) },<commit_msg>EXYNOS4: Enlarge PMU device region<commit_after>/*
 * Copyright 2014, General Dynamics C4 Systems
 *
 * This software may be distributed and modified according to the terms of
 * the GNU General Public License version 2. Note that NO WARRANTY is provided.
 * See "LICENSE_GPLv2.txt" for details.
 *
 * @TAG(GD_GPL)
 */

#include <types.h>
#include <machine/io.h>
#include <kernel/vspace.h>
#include <arch/machine.h>
#include <arch/kernel/vspace.h>
#include <plat/machine.h>
#include <arch/linker.h>
#include <plat/machine/devices.h>
#include <plat/machine/hardware.h>

/* Available physical memory regions on platform (RAM) */
/* NOTE: Regions are not allowed to be adjacent! */
const p_region_t BOOT_RODATA avail_p_regs[] = {
    /* 1 GiB */
    { /* .start = */ 0x40000000, /* .end = */ 0x80000000 }
};

BOOT_CODE int
get_num_avail_p_regs(void)
{
    return sizeof(avail_p_regs) / sizeof(p_region_t);
}

BOOT_CODE p_region_t
get_avail_p_reg(unsigned int i)
{
    return avail_p_regs[i];
}

const p_region_t BOOT_RODATA dev_p_regs[] = {
    { /* .start */ CHIPID_PADDR           , /* .end */ CHIPID_PADDR            + (1 << PAGE_BITS) },
    { /* .start */ SYSREG_PADDR           , /* .end */ SYSREG_PADDR            + (1 << PAGE_BITS) },
    { /* .start */ PMU_PADDR              , /* .end */ PMU_PADDR               + (5 << PAGE_BITS) },
    { /* .start */ CMU_TOP_PART_PADDR     , /* .end */ CMU_TOP_PART_PADDR      + (13 << PAGE_BITS) },
    { /* .start */ SMDMA0_PADDR           , /* .end */ SMDMA0_PADDR            + (1 << PAGE_BITS) },
    { /* .start */ CMU_DMC_PART_PADDR     , /* .end */ CMU_DMC_PART_PADDR      + (9 << PAGE_BITS) },
    { /* .start */ NSMDMA0_PADDR          , /* .end */ NSMDMA0_PADDR           + (1 << PAGE_BITS) },
{'fraction_non_alphanumeric': 0.15134044393196885, 'fraction_numerical': 0.022196598443355434, 'mean_word_length': 2.4665334665334666, 'pattern_counts': {'":': 0, '<': 49, '<?xml version=': 0, '>': 21, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 4, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
{'dir': 'git-commits-cleaned', 'id': '4134333', 'n_tokens_mistral': 1315, 'n_tokens_neox': 1272, 'n_words': 282}