<commit_before>/* PAPI PRESETS */
hwi_search_t P6Processor_map[] = {
	{PAPI_L1_DCM, {0, {PNE_P6_DCU_LINES_IN}, {0,}}},
	{PAPI_L1_ICM, {0, {PNE_P6_L2_IFETCH}, {0,}}}, /* PNE_P6_L2_IFETCH defaults to MESI */
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L2_DCM, {DERIVED_SUB, {PNE_P6_L2_LINES_IN, PNE_P6_BUS_TRAN_IFETCH}, {0,}}}, /* PNE_P6_BUS_TRAN_IFETCH defaults to SELF */
#endif
	{PAPI_L2_ICM, {0, {PNE_P6_BUS_TRAN_IFETCH}, {0,}}}, /* PNE_P6_BUS_TRAN_IFETCH defaults to SELF */
	{PAPI_L1_TCM, {0, {PNE_P6_L2_RQSTS}, {0,}}},
	{PAPI_L2_TCM, {0, {PNE_P6_L2_LINES_IN}, {0,}}},
	{PAPI_CA_CLN, {0, {PNE_P6_BUS_TRAN_RFO}, {0,}}},
	{PAPI_CA_ITV, {0, {PNE_P6_BUS_TRAN_INVAL}, {0,}}},
	{PAPI_TLB_IM, {0, {PNE_P6_ITLB_MISS}, {0,}}},
	{PAPI_L1_LDM, {0, {PNE_P6_L2_LD}, {0,}}},
	{PAPI_L1_STM, {0, {PNE_P6_L2_ST}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L2_LDM, {DERIVED_SUB, {PNE_P6_L2_LINES_IN, PNE_P6_L2M_LINES_INM}, {0,}}},
#endif
	{PAPI_L2_STM, {0, {PNE_P6_L2M_LINES_INM}, {0,}}},
	{PAPI_BTAC_M, {0, {PNE_P6_BTB_MISSES}, {0,}}},
	{PAPI_HW_INT, {0, {PNE_P6_HW_INT_RX}, {0,}}},
	{PAPI_BR_CN, {0, {PNE_P6_BR_INST_RETIRED}, {0,}}},
	{PAPI_BR_TKN, {0, {PNE_P6_BR_TAKEN_RETIRED}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_BR_NTK, {DERIVED_SUB, {PNE_P6_BR_INST_RETIRED, PNE_P6_BR_TAKEN_RETIRED}, {0,}}},
#endif
	{PAPI_BR_MSP, {0, {PNE_P6_BR_MISS_PRED_RETIRED}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_BR_PRC, {DERIVED_SUB, {PNE_P6_BR_INST_RETIRED, PNE_P6_BR_MISS_PRED_RETIRED}, {0,}}},
#endif
	{PAPI_TOT_IIS, {0, {PNE_P6_INST_DECODED}, {0,}}},
	{PAPI_TOT_INS, {0, {PNE_P6_INST_RETIRED}, {0,}}},
	{PAPI_FP_INS, {0, {PNE_P6_FLOPS}, {0,}}},
	{PAPI_BR_INS, {0, {PNE_P6_BR_INST_RETIRED}, {0,}}},
	{PAPI_RES_STL, {0, {PNE_P6_RESOURCE_STALL}, {0,}}},
	{PAPI_TOT_CYC, {0, {PNE_P6_CPU_CLK_UNHALTED}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_LST_INS, {DERIVED_ADD, {PNE_P6_L2_LD,PNE_P6_L2_ST}, {0,}}},
	{PAPI_L1_DCH, {DERIVED_SUB, {PNE_P6_DATA_MEM_REFS, PNE_P6_DCU_LINES_IN}, {0,}}},
#endif
	{PAPI_L1_DCA, {0, {PNE_P6_DATA_MEM_REFS}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L2_DCA, {DERIVED_ADD, {PNE_P6_L2_LD, PNE_P6_L2_ST}, {0,}}},
#endif
	{PAPI_L2_DCR, {0, {PNE_P6_L2_LD}, {0,}}},
	{PAPI_L2_DCW, {0, {PNE_P6_L2_ST}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L1_ICH, {DERIVED_SUB, {PNE_P6_IFU_FETCH, PNE_P6_L2_IFETCH}, {0,}}},
	{PAPI_L2_ICH, {DERIVED_SUB, {PNE_P6_L2_IFETCH, PNE_P6_BUS_TRAN_IFETCH}, {0,}}},
#endif
	{PAPI_L1_ICA, {0, {PNE_P6_IFU_FETCH}, {0,}}},
	{PAPI_L2_ICA, {0, {PNE_P6_L2_IFETCH}, {0,}}},
	{PAPI_L1_ICR, {0, {PNE_P6_IFU_FETCH}, {0,}}},
	{PAPI_L2_ICR, {0, {PNE_P6_L2_IFETCH}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L2_TCH, {DERIVED_SUB, {PNE_P6_L2_RQSTS, PNE_P6_L2_LINES_IN}, {0,}}},
	{PAPI_L1_TCA, {DERIVED_ADD, {PNE_P6_DATA_MEM_REFS, PNE_P6_IFU_FETCH}, {0,}}},
#endif
	{PAPI_L2_TCA, {0, {PNE_P6_L2_RQSTS}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L2_TCR, {DERIVED_ADD, {PNE_P6_L2_LD, PNE_P6_L2_IFETCH}, {0,}}},
#endif
	{PAPI_L2_TCW, {0, {PNE_P6_L2_ST}, {0,}}},
	{PAPI_FML_INS, {0, {PNE_P6_MUL}, {0,}}},
	{PAPI_FDV_INS, {0, {PNE_P6_DIV}, {0,}}},
	{PAPI_FP_OPS, {0, {PNE_P6_FLOPS}, {0,}}},
	{0, {0, {PAPI_NULL}, {0,}}}
};

/* PAPI PRESETS */
hwi_search_t UnkProcessor_map[] = {
     /* {PAPI_TOT_CYC, 0, {PNE_UNK_CYCLES}, PAPI_NULL},"",NULL}, */
	{PAPI_TOT_INS, 0, {PNE_UNK_INSTRUCTIONS},"",NULL},
	{PAPI_BR_INS,  0, {PNE_UNK_BRANCHES} ,"",NULL},
	{PAPI_BR_INS,  0, {PNE_UNK_INTERRUPTS} ,"",NULL},
	{PAPI_BR_MSP,  0, {PNE_UNK_BRANCH_MISPREDICTS} ,"",NULL},
	{PAPI_L2_DCM,  0, {PNE_UNK_DC_MISSES} ,"",NULL},
	{PAPI_L2_ICM,  0, {PNE_UNK_IC_MISSES} ,"",NULL},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L2_TCM, DERIVED_ADD, 
                {PNE_UNK_IC_MISSES, PNE_UNK_DC_MISSES} ,"",NULL},
#endif
	{0, 0, {PAPI_NULL}, "",NULL},
};


/* PAPI PRESETS */
hwi_search_t P6_M_Processor_map[] = {
	{PAPI_L1_DCM, {0, {PNE_P6_M_DCU_LINES_IN}, {0,}}},
	{PAPI_L1_ICM, {0, {PNE_P6_M_L2_IFETCH}, {0,}}}, /* PNE_P6_M_L2_IFETCH defaults to MESI */
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L2_DCM, {DERIVED_SUB, {PNE_P6_M_L2_LINES_IN, PNE_P6_M_BUS_TRAN_IFETCH}, {0,}}}, /* PNE_P6_M_BUS_TRAN_IFETCH defaults to SELF */
#endif
	{PAPI_L2_ICM, {0, {PNE_P6_M_BUS_TRAN_IFETCH}, {0,}}}, /* PNE_P6_M_BUS_TRAN_IFETCH defaults to SELF */
	{PAPI_L1_TCM, {0, {PNE_P6_M_L2_RQSTS}, {0,}}},
	{PAPI_L2_TCM, {0, {PNE_P6_M_L2_LINES_IN}, {0,}}},
	{PAPI_CA_CLN, {0, {PNE_P6_M_BUS_TRAN_RFO}, {0,}}},
	{PAPI_CA_ITV, {0, {PNE_P6_M_BUS_TRAN_INVAL}, {0,}}},
	{PAPI_TLB_IM, {0, {PNE_P6_M_ITLB_MISS}, {0,}}},
	{PAPI_L1_LDM, {0, {PNE_P6_M_L2_LD}, {0,}}},
	{PAPI_L1_STM, {0, {PNE_P6_M_L2_ST}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L2_LDM, {DERIVED_SUB, {PNE_P6_M_L2_LINES_IN, PNE_P6_M_L2M_LINES_INM}, {0,}}},
#endif
	{PAPI_L2_STM, {0, {PNE_P6_M_L2M_LINES_INM}, {0,}}},
	{PAPI_BTAC_M, {0, {PNE_P6_M_BTB_MISSES}, {0,}}},
	{PAPI_HW_INT, {0, {PNE_P6_M_HW_INT_RX}, {0,}}},
	{PAPI_BR_CN, {0, {PNE_P6_M_BR_INST_RETIRED}, {0,}}},
	{PAPI_BR_TKN, {0, {PNE_P6_M_BR_TAKEN_RETIRED}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_BR_NTK, {DERIVED_SUB, {PNE_P6_M_BR_INST_RETIRED, PNE_P6_M_BR_TAKEN_RETIRED}, {0,}}},
#endif
	{PAPI_BR_MSP, {0, {PNE_P6_M_BR_MISS_PRED_RETIRED}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_BR_PRC, {DERIVED_SUB, {PNE_P6_M_BR_INST_RETIRED, PNE_P6_M_BR_MISS_PRED_RETIRED}, {0,}}},
#endif
	{PAPI_TOT_IIS, {0, {PNE_P6_M_INST_DECODED}, {0,}}},
	{PAPI_TOT_INS, {0, {PNE_P6_M_INST_RETIRED}, {0,}}},
	{PAPI_FP_INS, {0, {PNE_P6_M_FLOPS}, {0,}}},
	{PAPI_BR_INS, {0, {PNE_P6_M_BR_INST_RETIRED}, {0,}}},
	{PAPI_RES_STL, {0, {PNE_P6_M_RESOURCE_STALL}, {0,}}},
	{PAPI_TOT_CYC, {0, {PNE_P6_M_CPU_CLK_UNHALTED}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_LST_INS, {DERIVED_ADD, {PNE_P6_M_L2_LD,PNE_P6_M_L2_ST}, {0,}}},
	{PAPI_L1_DCH, {DERIVED_SUB, {PNE_P6_M_DATA_MEM_REFS, PNE_P6_M_DCU_LINES_IN}, {0,}}},
#endif
	{PAPI_L1_DCA, {0, {PNE_P6_M_DATA_MEM_REFS}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L2_DCA, {DERIVED_ADD, {PNE_P6_M_L2_LD, PNE_P6_M_L2_ST}, {0,}}},
#endif
	{PAPI_L2_DCR, {0, {PNE_P6_M_L2_LD}, {0,}}},
	{PAPI_L2_DCW, {0, {PNE_P6_M_L2_ST}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L1_ICH, {DERIVED_SUB, {PNE_P6_M_IFU_FETCH, PNE_P6_M_L2_IFETCH}, {0,}}},
	{PAPI_L2_ICH, {DERIVED_SUB, {PNE_P6_M_L2_IFETCH, PNE_P6_M_BUS_TRAN_IFETCH}, {0,}}},
#endif
	{PAPI_L1_ICA, {0, {PNE_P6_M_IFU_FETCH}, {0,}}},
	{PAPI_L2_ICA, {0, {PNE_P6_M_L2_IFETCH}, {0,}}},
	{PAPI_L1_ICR, {0, {PNE_P6_M_IFU_FETCH}, {0,}}},
	{PAPI_L2_ICR, {0, {PNE_P6_M_L2_IFETCH}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L2_TCH, {DERIVED_SUB, {PNE_P6_M_L2_RQSTS, PNE_P6_M_L2_LINES_IN}, {0,}}},
	{PAPI_L1_TCA, {DERIVED_ADD, {PNE_P6_M_DATA_MEM_REFS, PNE_P6_M_IFU_FETCH}, {0,}}},
#endif
	{PAPI_L2_TCA, {0, {PNE_P6_M_L2_RQSTS}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L2_TCR, {DERIVED_ADD, {PNE_P6_M_L2_LD, PNE_P6_M_L2_IFETCH}, {0,}}},
#endif
	{PAPI_L2_TCW, {0, {PNE_P6_M_L2_ST}, {0,}}},
	{PAPI_FML_INS, {0, {PNE_P6_M_MUL}, {0,}}},
	{PAPI_FDV_INS, {0, {PNE_P6_M_DIV}, {0,}}},
	{PAPI_FP_OPS, {0, {PNE_P6_M_FLOPS}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_VEC_INS, {DERIVED_ADD, {PNE_P6_M_MMX_INSTR_RET, PNE_P6_M_EMON_SSE_SSE2_INST_RETIRED}, {0,}}},
#endif
	{0, {0, {PAPI_NULL}, {0,}}}
};

/* PAPI PRESETS */
hwi_search_t P6_3_Processor_map[] = {
	{PAPI_L1_DCM, {0, {PNE_P6_3_DCU_LINES_IN}, {0,}}},
	{PAPI_L1_ICM, {0, {PNE_P6_3_L2_IFETCH}, {0,}}}, /* PNE_P6_3_L2_IFETCH defaults to MESI */
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L2_DCM, {DERIVED_SUB, {PNE_P6_3_L2_LINES_IN, PNE_P6_3_BUS_TRAN_IFETCH}, {0,}}}, /* PNE_P6_3_BUS_TRAN_IFETCH defaults to SELF */
#endif
	{PAPI_L2_ICM, {0, {PNE_P6_3_BUS_TRAN_IFETCH}, {0,}}}, /* PNE_P6_3_BUS_TRAN_IFETCH defaults to SELF */
	{PAPI_L1_TCM, {0, {PNE_P6_3_L2_RQSTS}, {0,}}},
	{PAPI_L2_TCM, {0, {PNE_P6_3_L2_LINES_IN}, {0,}}},
	{PAPI_CA_CLN, {0, {PNE_P6_3_BUS_TRAN_RFO}, {0,}}},
	{PAPI_CA_ITV, {0, {PNE_P6_3_BUS_TRAN_INVAL}, {0,}}},
	{PAPI_TLB_IM, {0, {PNE_P6_3_ITLB_MISS}, {0,}}},
	{PAPI_L1_LDM, {0, {PNE_P6_3_L2_LD}, {0,}}},
	{PAPI_L1_STM, {0, {PNE_P6_3_L2_ST}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L2_LDM, {DERIVED_SUB, {PNE_P6_3_L2_LINES_IN, PNE_P6_3_L2M_LINES_INM}, {0,}}},
#endif
	{PAPI_L2_STM, {0, {PNE_P6_3_L2M_LINES_INM}, {0,}}},
	{PAPI_BTAC_M, {0, {PNE_P6_3_BTB_MISSES}, {0,}}},
	{PAPI_HW_INT, {0, {PNE_P6_3_HW_INT_RX}, {0,}}},
	{PAPI_BR_CN, {0, {PNE_P6_3_BR_INST_RETIRED}, {0,}}},
	{PAPI_BR_TKN, {0, {PNE_P6_3_BR_TAKEN_RETIRED}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_BR_NTK, {DERIVED_SUB, {PNE_P6_3_BR_INST_RETIRED, PNE_P6_3_BR_TAKEN_RETIRED}, {0,}}},
#endif
	{PAPI_BR_MSP, {0, {PNE_P6_3_BR_MISS_PRED_RETIRED}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_BR_PRC, {DERIVED_SUB, {PNE_P6_3_BR_INST_RETIRED, PNE_P6_3_BR_MISS_PRED_RETIRED}, {0,}}},
#endif
	{PAPI_TOT_IIS, {0, {PNE_P6_3_INST_DECODED}, {0,}}},
	{PAPI_TOT_INS, {0, {PNE_P6_3_INST_RETIRED}, {0,}}},
	{PAPI_FP_INS, {0, {PNE_P6_3_FLOPS}, {0,}}},
	{PAPI_BR_INS, {0, {PNE_P6_3_BR_INST_RETIRED}, {0,}}},
	{PAPI_RES_STL, {0, {PNE_P6_3_RESOURCE_STALL}, {0,}}},
	{PAPI_TOT_CYC, {0, {PNE_P6_3_CPU_CLK_UNHALTED}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_LST_INS, {DERIVED_ADD, {PNE_P6_3_L2_LD,PNE_P6_3_L2_ST}, {0,}}},
	{PAPI_L1_DCH, {DERIVED_SUB, {PNE_P6_3_DATA_MEM_REFS, PNE_P6_3_DCU_LINES_IN}, {0,}}},
#endif
	{PAPI_L1_DCA, {0, {PNE_P6_3_DATA_MEM_REFS}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L2_DCA, {DERIVED_ADD, {PNE_P6_3_L2_LD, PNE_P6_3_L2_ST}, {0,}}},
#endif
	{PAPI_L2_DCR, {0, {PNE_P6_3_L2_LD}, {0,}}},
	{PAPI_L2_DCW, {0, {PNE_P6_3_L2_ST}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L1_ICH, {DERIVED_SUB, {PNE_P6_3_IFU_FETCH, PNE_P6_3_L2_IFETCH}, {0,}}},
	{PAPI_L2_ICH, {DERIVED_SUB, {PNE_P6_3_L2_IFETCH, PNE_P6_3_BUS_TRAN_IFETCH}, {0,}}},
#endif
	{PAPI_L1_ICA, {0, {PNE_P6_3_IFU_FETCH}, {0,}}},
	{PAPI_L2_ICA, {0, {PNE_P6_3_L2_IFETCH}, {0,}}},
	{PAPI_L1_ICR, {0, {PNE_P6_3_IFU_FETCH}, {0,}}},
	{PAPI_L2_ICR, {0, {PNE_P6_3_L2_IFETCH}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L2_TCH, {DERIVED_SUB, {PNE_P6_3_L2_RQSTS, PNE_P6_3_L2_LINES_IN}, {0,}}},
	{PAPI_L1_TCA, {DERIVED_ADD, {PNE_P6_3_DATA_MEM_REFS, PNE_P6_3_IFU_FETCH}, {0,}}},
#endif
	{PAPI_L2_TCA, {0, {PNE_P6_3_L2_RQSTS}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L2_TCR, {DERIVED_ADD, {PNE_P6_3_L2_LD, PNE_P6_3_L2_IFETCH}, {0,}}},
#endif
	{PAPI_L2_TCW, {0, {PNE_P6_3_L2_ST}, {0,}}},
	{PAPI_FML_INS, {0, {PNE_P6_3_MUL}, {0,}}},
	{PAPI_FDV_INS, {0, {PNE_P6_3_DIV}, {0,}}},
	{PAPI_FP_OPS, {0, {PNE_P6_3_FLOPS}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_VEC_INS, {DERIVED_ADD, {PNE_P6_3_MMX_INSTR_RET, PNE_P6_3_EMON_KNI_INST_RETIRED}, {0,}}},
#endif
	{0, {0, {PAPI_NULL}, {0,}}}
};

/* PAPI PRESETS */
hwi_search_t P6_2_Processor_map[] = {
	{PAPI_L1_DCM, {0, {PNE_P6_2_DCU_LINES_IN}, {0,}}},
	{PAPI_L1_ICM, {0, {PNE_P6_2_L2_IFETCH}, {0,}}}, /* PNE_P6_2_L2_IFETCH defaults to MESI */
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L2_DCM, {DERIVED_SUB, {PNE_P6_2_L2_LINES_IN, PNE_P6_2_BUS_TRAN_IFETCH}, {0,}}}, /* PNE_P6_2_BUS_TRAN_IFETCH defaults to SELF */
#endif
	{PAPI_L2_ICM, {0, {PNE_P6_2_BUS_TRAN_IFETCH}, {0,}}}, /* PNE_P6_2_BUS_TRAN_IFETCH defaults to SELF */
	{PAPI_L1_TCM, {0, {PNE_P6_2_L2_RQSTS}, {0,}}},
	{PAPI_L2_TCM, {0, {PNE_P6_2_L2_LINES_IN}, {0,}}},
	{PAPI_CA_CLN, {0, {PNE_P6_2_BUS_TRAN_RFO}, {0,}}},
	{PAPI_CA_ITV, {0, {PNE_P6_2_BUS_TRAN_INVAL}, {0,}}},
	{PAPI_TLB_IM, {0, {PNE_P6_2_ITLB_MISS}, {0,}}},
	{PAPI_L1_LDM, {0, {PNE_P6_2_L2_LD}, {0,}}},
	{PAPI_L1_STM, {0, {PNE_P6_2_L2_ST}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L2_LDM, {DERIVED_SUB, {PNE_P6_2_L2_LINES_IN, PNE_P6_2_L2M_LINES_INM}, {0,}}},
#endif
	{PAPI_L2_STM, {0, {PNE_P6_2_L2M_LINES_INM}, {0,}}},
	{PAPI_BTAC_M, {0, {PNE_P6_2_BTB_MISSES}, {0,}}},
	{PAPI_HW_INT, {0, {PNE_P6_2_HW_INT_RX}, {0,}}},
	{PAPI_BR_CN, {0, {PNE_P6_2_BR_INST_RETIRED}, {0,}}},
	{PAPI_BR_TKN, {0, {PNE_P6_2_BR_TAKEN_RETIRED}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_BR_NTK, {DERIVED_SUB, {PNE_P6_2_BR_INST_RETIRED, PNE_P6_2_BR_TAKEN_RETIRED}, {0,}}},
#endif
	{PAPI_BR_MSP, {0, {PNE_P6_2_BR_MISS_PRED_RETIRED}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_BR_PRC, {DERIVED_SUB, {PNE_P6_2_BR_INST_RETIRED, PNE_P6_2_BR_MISS_PRED_RETIRED}, {0,}}},
#endif
	{PAPI_TOT_IIS, {0, {PNE_P6_2_INST_DECODED}, {0,}}},
	{PAPI_TOT_INS, {0, {PNE_P6_2_INST_RETIRED}, {0,}}},
	{PAPI_FP_INS, {0, {PNE_P6_2_FLOPS}, {0,}}},
	{PAPI_BR_INS, {0, {PNE_P6_2_BR_INST_RETIRED}, {0,}}},
	{PAPI_RES_STL, {0, {PNE_P6_2_RESOURCE_STALL}, {0,}}},
	{PAPI_TOT_CYC, {0, {PNE_P6_2_CPU_CLK_UNHALTED}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_LST_INS, {DERIVED_ADD, {PNE_P6_2_L2_LD,PNE_P6_2_L2_ST}, {0,}}},
	{PAPI_L1_DCH, {DERIVED_SUB, {PNE_P6_2_DATA_MEM_REFS, PNE_P6_2_DCU_LINES_IN}, {0,}}},
#endif
	{PAPI_L1_DCA, {0, {PNE_P6_2_DATA_MEM_REFS}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L2_DCA, {DERIVED_ADD, {PNE_P6_2_L2_LD, PNE_P6_2_L2_ST}, {0,}}},
#endif
	{PAPI_L2_DCR, {0, {PNE_P6_2_L2_LD}, {0,}}},
	{PAPI_L2_DCW, {0, {PNE_P6_2_L2_ST}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L1_ICH, {DERIVED_SUB, {PNE_P6_2_IFU_FETCH, PNE_P6_2_L2_IFETCH}, {0,}}},
	{PAPI_L2_ICH, {DERIVED_SUB, {PNE_P6_2_L2_IFETCH, PNE_P6_2_BUS_TRAN_IFETCH}, {0,}}},
#endif
	{PAPI_L1_ICA, {0, {PNE_P6_2_IFU_FETCH}, {0,}}},
	{PAPI_L2_ICA, {0, {PNE_P6_2_L2_IFETCH}, {0,}}},
	{PAPI_L1_ICR, {0, {PNE_P6_2_IFU_FETCH}, {0,}}},
	{PAPI_L2_ICR, {0, {PNE_P6_2_L2_IFETCH}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L2_TCH, {DERIVED_SUB, {PNE_P6_2_L2_RQSTS, PNE_P6_2_L2_LINES_IN}, {0,}}},
	{PAPI_L1_TCA, {DERIVED_ADD, {PNE_P6_2_DATA_MEM_REFS, PNE_P6_2_IFU_FETCH}, {0,}}},
#endif
	{PAPI_L2_TCA, {0, {PNE_P6_2_L2_RQSTS}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L2_TCR, {DERIVED_ADD, {PNE_P6_2_L2_LD, PNE_P6_2_L2_IFETCH}, {0,}}},
#endif
	{PAPI_L2_TCW, {0, {PNE_P6_2_L2_ST}, {0,}}},
	{PAPI_FML_INS, {0, {PNE_P6_2_MUL}, {0,}}},
	{PAPI_FDV_INS, {0, {PNE_P6_2_DIV}, {0,}}},
	{PAPI_FP_OPS, {0, {PNE_P6_2_FLOPS}, {0,}}},
	{PAPI_VEC_INS, {0, {PNE_P6_2_MMX_INSTR_RET}, {0,}}},
	{0, {0, {PAPI_NULL}, {0,}}}
};


/* PAPI PRESETS */
hwi_search_t P6_C_Processor_map[] = {
	{PAPI_L1_DCM, {0, {PNE_P6_C_DCU_LINES_IN}, {0,}}},
	{PAPI_L1_ICM, {0, {PNE_P6_C_L2_IFETCH}, {0,}}}, /* PNE_P6_C_L2_IFETCH defaults to MESI */
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L2_DCM, {DERIVED_SUB, {PNE_P6_C_L2_LINES_IN, PNE_P6_C_BUS_TRAN_IFETCH}, {0,}}}, /* PNE_P6_C_BUS_TRAN_IFETCH defaults to SELF */
#endif
	{PAPI_L2_ICM, {0, {PNE_P6_C_BUS_TRAN_IFETCH}, {0,}}}, /* PNE_P6_C_BUS_TRAN_IFETCH defaults to SELF */
	{PAPI_L1_TCM, {0, {PNE_P6_C_L2_RQSTS}, {0,}}},
	{PAPI_L2_TCM, {0, {PNE_P6_C_L2_LINES_IN}, {0,}}},
	{PAPI_CA_CLN, {0, {PNE_P6_C_BUS_TRAN_RFO}, {0,}}},
	{PAPI_CA_ITV, {0, {PNE_P6_C_BUS_TRAN_INVAL}, {0,}}},
	{PAPI_TLB_IM, {0, {PNE_P6_C_ITLB_MISS}, {0,}}},
	{PAPI_L1_LDM, {0, {PNE_P6_C_L2_LD}, {0,}}},
	{PAPI_L1_STM, {0, {PNE_P6_C_L2_ST}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L2_LDM, {DERIVED_SUB, {PNE_P6_C_L2_LINES_IN, PNE_P6_C_L2M_LINES_INM}, {0,}}},
#endif
	{PAPI_L2_STM, {0, {PNE_P6_C_L2M_LINES_INM}, {0,}}},
	{PAPI_BTAC_M, {0, {PNE_P6_C_BTB_MISSES}, {0,}}},
	{PAPI_HW_INT, {0, {PNE_P6_C_HW_INT_RX}, {0,}}},
	{PAPI_BR_CN, {0, {PNE_P6_C_BR_INST_RETIRED}, {0,}}},
	{PAPI_BR_TKN, {0, {PNE_P6_C_BR_TAKEN_RETIRED}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_BR_NTK, {DERIVED_SUB, {PNE_P6_C_BR_INST_RETIRED, PNE_P6_C_BR_TAKEN_RETIRED}, {0,}}},
#endif
	{PAPI_BR_MSP, {0, {PNE_P6_C_BR_MISS_PRED_RETIRED}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_BR_PRC, {DERIVED_SUB, {PNE_P6_C_BR_INST_RETIRED, PNE_P6_C_BR_MISS_PRED_RETIRED}, {0,}}},
#endif
	{PAPI_TOT_IIS, {0, {PNE_P6_C_INST_DECODED}, {0,}}},
	{PAPI_TOT_INS, {0, {PNE_P6_C_INST_RETIRED}, {0,}}},
	{PAPI_FP_INS, {0, {PNE_P6_C_FLOPS}, {0,}}},
	{PAPI_BR_INS, {0, {PNE_P6_C_BR_INST_RETIRED}, {0,}}},
	{PAPI_RES_STL, {0, {PNE_P6_C_RESOURCE_STALL}, {0,}}},
	{PAPI_TOT_CYC, {0, {PNE_P6_C_CPU_CLK_UNHALTED}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_LST_INS, {DERIVED_ADD, {PNE_P6_C_L2_LD,PNE_P6_C_L2_ST}, {0,}}},
	{PAPI_L1_DCH, {DERIVED_SUB, {PNE_P6_C_DATA_MEM_REFS, PNE_P6_C_DCU_LINES_IN}, {0,}}},
#endif
	{PAPI_L1_DCA, {0, {PNE_P6_C_DATA_MEM_REFS}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L2_DCA, {DERIVED_ADD, {PNE_P6_C_L2_LD, PNE_P6_C_L2_ST}, {0,}}},
#endif
	{PAPI_L2_DCR, {0, {PNE_P6_C_L2_LD}, {0,}}},
	{PAPI_L2_DCW, {0, {PNE_P6_C_L2_ST}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L1_ICH, {DERIVED_SUB, {PNE_P6_C_IFU_FETCH, PNE_P6_C_L2_IFETCH}, {0,}}},
	{PAPI_L2_ICH, {DERIVED_SUB, {PNE_P6_C_L2_IFETCH, PNE_P6_C_BUS_TRAN_IFETCH}, {0,}}},
#endif
	{PAPI_L1_ICA, {0, {PNE_P6_C_IFU_FETCH}, {0,}}},
	{PAPI_L2_ICA, {0, {PNE_P6_C_L2_IFETCH}, {0,}}},
	{PAPI_L1_ICR, {0, {PNE_P6_C_IFU_FETCH}, {0,}}},
	{PAPI_L2_ICR, {0, {PNE_P6_C_L2_IFETCH}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L2_TCH, {DERIVED_SUB, {PNE_P6_C_L2_RQSTS, PNE_P6_C_L2_LINES_IN}, {0,}}},
	{PAPI_L1_TCA, {DERIVED_ADD, {PNE_P6_C_DATA_MEM_REFS, PNE_P6_C_IFU_FETCH}, {0,}}},
#endif
	{PAPI_L2_TCA, {0, {PNE_P6_C_L2_RQSTS}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L2_TCR, {DERIVED_ADD, {PNE_P6_C_L2_LD, PNE_P6_C_L2_IFETCH}, {0,}}},
#endif
	{PAPI_L2_TCW, {0, {PNE_P6_C_L2_ST}, {0,}}},
	{PAPI_FML_INS, {0, {PNE_P6_C_MUL}, {0,}}},
	{PAPI_FDV_INS, {0, {PNE_P6_C_DIV}, {0,}}},
	{PAPI_FP_OPS, {0, {PNE_P6_C_FLOPS}, {0,}}},
	{PAPI_VEC_INS, {0, {PNE_P6_C_MMX_INSTR_EXEC}, {0,}}},
	{0, {0, {PAPI_NULL}, {0,}}}
};

/* PAPI PRESETS */
hwi_search_t K7Processor_map[] = {
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L1_DCM, {DERIVED_ADD, {PNE_K7_DC_REFILLS_FROM_SYSTEM, PNE_K7_DC_REFILLS_FROM_L2}, {0,}}},
#endif
	{PAPI_L1_ICM, {0, {PNE_K7_IC_MISSES}, {0,}}},
	{PAPI_L2_DCM, {0, {PNE_K7_DC_REFILLS_FROM_SYSTEM}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 3
	{PAPI_L1_TCM, {DERIVED_ADD, {PNE_K7_DC_REFILLS_FROM_SYSTEM, PNE_K7_DC_REFILLS_FROM_L2, PNE_K7_IC_MISSES}, {0,}}},
#endif
	{PAPI_TLB_DM, {0, {PNE_K7_L1_AND_L2_DTLB_MISSES}, {0,}}},
	{PAPI_TLB_IM, {0, {PNE_K7_L1_AND_L2_ITLB_MISSES}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_TLB_TL, {DERIVED_ADD, {PNE_K7_L1_AND_L2_DTLB_MISSES, PNE_K7_L1_AND_L2_ITLB_MISSES}, {0,}}},
#endif
	{PAPI_L1_LDM, {0, {PNE_K7_DC_REFILLS_FROM_L2_OES}, {0,}}},
	{PAPI_L1_STM, {0, {PNE_K7_DC_REFILLS_FROM_L2_M}, {0,}}},
	{PAPI_L2_LDM, {0, {PNE_K7_DC_REFILLS_FROM_SYSTEM_OES}, {0,}}},
	{PAPI_L2_STM, {0, {PNE_K7_DC_REFILLS_FROM_SYSTEM_M}, {0,}}},
	{PAPI_HW_INT, {0, {PNE_K7_HARDWARE_INTERRUPTS}, {0,}}},
	{PAPI_BR_UCN, {0, {PNE_K7_RETIRED_FAR_CONTROL_TRANSFERS}, {0,}}},
	{PAPI_BR_CN, {0, {PNE_K7_RETIRED_BRANCHES}, {0,}}},
	{PAPI_BR_TKN, {0, {PNE_K7_RETIRED_TAKEN_BRANCHES}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_BR_NTK, {DERIVED_SUB, {PNE_K7_RETIRED_BRANCHES, PNE_K7_RETIRED_TAKEN_BRANCHES}, {0,}}},
#endif
	{PAPI_BR_MSP, {0, {PNE_K7_RETIRED_BRANCHES_MISPREDICTED}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_BR_PRC, {DERIVED_SUB, {PNE_K7_RETIRED_BRANCHES, PNE_K7_RETIRED_BRANCHES_MISPREDICTED}, {0,}}},
#endif
	{PAPI_TOT_INS, {0, {PNE_K7_RETIRED_INSTRUCTIONS}, {0,}}},
	{PAPI_BR_INS, {0, {PNE_K7_RETIRED_TAKEN_BRANCHES}, {0,}}},
	{PAPI_L1_DCA, {0, {PNE_K7_DC_ACCESSES}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L2_DCA, {DERIVED_ADD, {PNE_K7_DC_REFILLS_FROM_SYSTEM, PNE_K7_DC_REFILLS_FROM_L2}, {0,}}},
#endif
	{PAPI_L1_ICA, {0, {PNE_K7_IC_FETCHES}, {0,}}},
	{PAPI_L2_ICA, {0, {PNE_K7_IC_MISSES}, {0,}}},
	{PAPI_L1_ICR, {0, {PNE_K7_IC_FETCHES}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L1_TCA, {DERIVED_ADD, {PNE_K7_DC_ACCESSES, PNE_K7_IC_FETCHES}, {0,}}},
#endif
	{0, {0, {PAPI_NULL}, {0,}}}
};

/* PAPI PRESETS */
hwi_search_t K8Processor_map[] = {
	{PAPI_BR_INS, {0, {PNE_K8_FR_RETIRED_BRANCHES}, {0,}}},
	{PAPI_RES_STL, {0, {PNE_K8_FR_DISPATCH_STALLS}, {0,}}},
	{PAPI_TOT_CYC, {0, {PNE_K8_BU_CPU_CLK_UNHALTED}, {0,}}},
	{PAPI_TOT_INS, {0, {PNE_K8_FR_RETIRED_X86_INSTRUCTIONS}, {0,}}},
	{PAPI_STL_ICY,{0, {PNE_K8_FR_DECODER_EMPTY}, {0,}}},
	{PAPI_HW_INT, {0, {PNE_K8_FR_RETIRED_TAKEN_HARDWARE_INTERRUPTS}, {0,}}},
	{PAPI_BR_TKN, {0, {PNE_K8_FR_RETIRED_TAKEN_BRANCHES}, {0,}}},
	{PAPI_BR_MSP, {0, {PNE_K8_FR_RETIRED_TAKEN_BRANCHES_MISPREDICTED}, {0,}}},

	{PAPI_TLB_DM, {0, {PNE_K8_DC_L1_DTLB_MISS_AND_L2_DTLB_MISS}, {0,}}},
	{PAPI_TLB_IM, {0, {PNE_K8_IC_L1_ITLB_MISS_AND_L2_ITLB_MISS}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_TLB_TL, {DERIVED_ADD, {PNE_K8_DC_L1_DTLB_MISS_AND_L2_DTLB_MISS,PNE_K8_IC_L1_ITLB_MISS_AND_L2_ITLB_MISS},{0,}}},
#endif

	{PAPI_L1_DCA, {0, {PNE_K8_DC_ACCESS}, {0,}}},
	{PAPI_L1_ICA, {0, {PNE_K8_IC_FETCH}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L1_TCA, {DERIVED_ADD, {PNE_K8_DC_ACCESS, PNE_K8_IC_FETCH}, {0,}}},
#endif
	{PAPI_L1_ICR, {0, {PNE_K8_IC_FETCH}, {0,}}},
	{PAPI_L2_ICH, {0, {PNE_K8_IC_REFILL_FROM_L2}, {0,}}},
	{PAPI_L2_DCH, {0, {PNE_K8_DC_REFILL_FROM_L2}, {0,}}},
	{PAPI_L2_DCM, {0, {PNE_K8_DC_REFILL_FROM_SYSTEM_MOES}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L2_DCA, {DERIVED_ADD, {PNE_K8_DC_REFILL_FROM_SYSTEM_MOES, PNE_K8_DC_REFILL_FROM_L2_MOES}, {0,}}},
#endif
	{PAPI_L2_ICM, {0, {PNE_K8_IC_REFILL_FROM_SYSTEM}, {0,}}},
	{PAPI_L2_DCR, {0, {PNE_K8_DC_REFILL_FROM_L2_OES}, {0,}}},
	{PAPI_L2_DCW, {0, {PNE_K8_DC_REFILL_FROM_L2_M}, {0,}}},
	{PAPI_L2_DCH, {0, {PNE_K8_DC_REFILL_FROM_L2_MOES},{0,}}},
	{PAPI_L1_LDM, {0, {PNE_K8_DC_REFILL_FROM_L2_OES},{0,}}},
	{PAPI_L1_STM, {0, {PNE_K8_DC_REFILL_FROM_L2_M},{0,}}},
	{PAPI_L2_LDM, {0, {PNE_K8_DC_REFILL_FROM_SYSTEM_OES},{0,}}},
	{PAPI_L2_STM, {0, {PNE_K8_DC_REFILL_FROM_SYSTEM_M},{0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L1_DCM, {DERIVED_ADD, {PNE_K8_DC_REFILL_FROM_SYSTEM_MOES, PNE_K8_DC_REFILL_FROM_L2_MOES}, {0,}}},
	{PAPI_L1_ICM, {DERIVED_ADD, {PNE_K8_IC_REFILL_FROM_L2, PNE_K8_IC_REFILL_FROM_SYSTEM}, {0,}}},
#endif
#if HWPMC_NUM_COUNTERS >= 4
	{PAPI_L1_TCM, {DERIVED_ADD, {PNE_K8_DC_REFILL_FROM_SYSTEM_MOES,PNE_K8_DC_REFILL_FROM_L2_MOES,PNE_K8_IC_REFILL_FROM_SYSTEM,PNE_K8_IC_REFILL_FROM_L2},{0,}}},
#endif
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L2_TCM, {DERIVED_ADD, {PNE_K8_DC_REFILL_FROM_SYSTEM_MOES,PNE_K8_IC_REFILL_FROM_SYSTEM}, {0,}}},
	{PAPI_L2_ICA, {DERIVED_ADD, {PNE_K8_IC_REFILL_FROM_SYSTEM,PNE_K8_IC_REFILL_FROM_L2}, {0,}}},
	{PAPI_L2_TCH, {DERIVED_ADD, {PNE_K8_IC_REFILL_FROM_L2,PNE_K8_DC_REFILL_FROM_L2_MOES}, {0,}}},
#endif
#if HWPMC_NUM_COUNTERS >= 4
	{PAPI_L2_TCA, {DERIVED_ADD, {PNE_K8_IC_REFILL_FROM_L2,PNE_K8_IC_REFILL_FROM_SYSTEM,PNE_K8_DC_REFILL_FROM_L2_MOES,PNE_K8_DC_REFILL_FROM_SYSTEM_MOES}, {0,}}},
#endif
	{PAPI_FML_INS, {0, {PNE_K8_FP_DISPATCHED_FPU_MULS}, {0,}}},
	{PAPI_FAD_INS, {0, {PNE_K8_FP_DISPATCHED_FPU_ADDS}, {0,}}},
	{PAPI_FP_OPS, {0, {PNE_K8_FP_DISPATCHED_FPU_ADDS_AND_MULS}, {0,}}},
	{PAPI_FP_INS, {0, {PNE_K8_FR_RETIRED_FPU_INSTRUCTIONS}, {0,}}},
	{PAPI_FPU_IDL, {0, {PNE_K8_FP_CYCLES_WITH_NO_FPU_OPS_RETIRED}, {0,}}},
	{0, {0, {PAPI_NULL}, {0,}}}
};

/* PAPI PRESETS */
hwi_search_t P4Processor_map[] = {
	{PAPI_RES_STL, {0, {PNE_P4_RESOURCE_STALL}, {0,}}},
	{PAPI_TOT_CYC, {0, {PNE_P4_GLOBAL_POWER_EVENTS}, {0,}}},
	{PAPI_L1_ICM, {0, {PNE_P4_BPU_FETCH_REQUEST}, {0,}}},
	{PAPI_L1_ICA, {0, {PNE_P4_UOP_QUEUE_WRITES_TC_BUILD_DELIVER}, {0,}}},
	{PAPI_TLB_DM, {0, {PNE_P4_PAGE_WALK_TYPE_D}, {0,}}},
	{PAPI_TLB_IM, {0, {PNE_P4_PAGE_WALK_TYPE_I}, {0,}}},
	{PAPI_TLB_TL, {0, {PNE_P4_PAGE_WALK_TYPE}, {0,}}},
	{PAPI_TOT_INS, {0, {PNE_P4_INSTR_RETIRED_NON_BOGUS}, {0,}}},
	{PAPI_BR_INS, {0, {PNE_P4_RETIRED_BRANCH_TYPE}, {0,}}},
	{PAPI_BR_TKN, {0, {PNE_P4_BRANCH_RETIRED_TAKEN}, {0,}}},
	{PAPI_BR_NTK, {0, {PNE_P4_BRANCH_RETIRED_NOT_TAKEN}, {0,}}},
	{PAPI_BR_MSP, {0, {PNE_P4_BRANCH_RETIRED_MISPREDICTED}, {0,}}},
	{PAPI_BR_PRC, {0, {PNE_P4_BRANCH_RETIRED_PREDICTED}, {0,}}},
	{PAPI_L2_TCH, {0, {PNE_P4_BSQ_CACHE_REFERENCE_2L_HITS}, {0,}}},
	{PAPI_L2_TCM, {0, {PNE_P4_BSQ_CACHE_REFERENCE_2L_MISSES}, {0,}}},
	{PAPI_L2_TCA, {0, {PNE_P4_BSQ_CACHE_REFERENCE_2L_ACCESSES}, {0,}}},
	{PAPI_L3_TCH, {0, {PNE_P4_BSQ_CACHE_REFERENCE_3L_HITS}, {0,}}},
	{PAPI_L3_TCM, {0, {PNE_P4_BSQ_CACHE_REFERENCE_3L_MISSES}, {0,}}},
	{PAPI_L3_TCA, {0, {PNE_P4_BSQ_CACHE_REFERENCE_3L_ACCESSES}, {0,}}},
	{PAPI_FP_INS, {0, {PNE_P4_X87_FP_UOP}, {0,}}},
	{0, {0, {PAPI_NULL}, {0,}}}
};

/* PAPI PRESETS */

hwi_search_t AtomProcessor_map[] = {
	{PAPI_L1_ICM, {0, {PNE_ATOM_L1I_MISSES, 0}, {0,}}},
	{PAPI_L1_DCA, {0, {PNE_ATOM_L1D_ALL_REF, PAPI_NULL}, {0,}}},
	{PAPI_L1_ICA, {0, {PNE_ATOM_L1I_READS, PAPI_NULL}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L1_TCA, {DERIVED_ADD, {PNE_ATOM_L1D_ALL_REF, PNE_ATOM_L1I_READS, PAPI_NULL}, {0,}}},
#endif
	{PAPI_L2_DCA, {0, {PNE_ATOM_L2_RQSTS, PAPI_NULL}, {0,}}},
	{PAPI_TLB_IM, {0, {PNE_ATOM_ITLB_MISSES, 0}, {0,}}},
	{PAPI_TLB_DM, {0, {PNE_ATOM_DATA_TLB_MISSES_DTLB_MISS, 0}, {0,}}},
	{PAPI_BR_INS, {0, {PNE_ATOM_BR_INST_EXEC, 0}, {0,}}},
	{PAPI_BR_TKN, {0, {PNE_ATOM_BR_INST_RETIRED_TAKEN, PAPI_NULL}, {0,}}},
	{PAPI_BR_MSP, {0, {PNE_ATOM_BR_MISSP_EXEC, 0}, {0,}}},
	{PAPI_RES_STL,{0, {PNE_ATOM_RESOURCE_STALLS_ANY, 0}, {0,}}},
	{PAPI_TOT_CYC,{0, {PNE_ATOM_CPU_CLK_UNHALTED_BUS, PAPI_NULL}, {0,}}},
	{PAPI_TOT_INS,{0, {PNE_ATOM_INST_RETIRED_ANY_P, PAPI_NULL}, {0,}}},
	{PAPI_HW_INT, {0, {PNE_ATOM_HW_INT_RCV, PAPI_NULL}, {0,}}},
	{PAPI_L2_DCH, {0, {PNE_ATOM_L2_LD, PAPI_NULL}, {0,}}},
	{PAPI_FP_INS, {0, {PNE_ATOM_X87_OPS_RETIRED_ANY, PAPI_NULL}, {0,}}},
	{PAPI_L1_ICM, {0, {PNE_ATOM_L1I_MISSES, PAPI_NULL}, {0,}}},
	{PAPI_L2_DCM, {0, {PNE_ATOM_MEM_LOAD_RETIRED_L2_MISS, PAPI_NULL}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_TLB_TL, {DERIVED_ADD, {PNE_ATOM_DTLB_MISSES_ANY, PNE_ATOM_ITLB_MISSES, PAPI_NULL},{0,}}},
#endif
/*
	{PAPI_L1_ICH, {0, {PNE_ATOM_L1I_HITS, PAPI_NILL}, {0,}}},
*/
	{0, {0, {PAPI_NULL}, {0,}}}
};

/* PAPI PRESETS */
hwi_search_t CoreProcessor_map[] = {
	{PAPI_BR_INS, {0, {PNE_CORE_BR_INSTR_RET, PAPI_NULL}, {0,}}},
	{PAPI_RES_STL, {0, {PNE_CORE_RESOURCE_STALL, PAPI_NULL}, {0,}}},
	{PAPI_TOT_CYC, {0, {PNE_CORE_UNHALTED_CORE_CYCLES, PAPI_NULL}, {0,}}},
	{PAPI_TOT_INS, {0, {PNE_CORE_INSTR_RET, PAPI_NULL}, {0,}}},
	{PAPI_HW_INT, {0, {PNE_CORE_HW_INT_RX, PAPI_NULL}, {0,}}},
	{PAPI_BR_TKN, {0, {PNE_CORE_BR_INSTR_RET, PAPI_NULL}, {0,}}},
	{PAPI_BR_MSP, {0, {PNE_CORE_BR_MISSP_EXEC, PAPI_NULL}, {0,}}},
	{PAPI_TLB_DM, {0, {PNE_CORE_DTLB_MISS, PAPI_NULL}, {0,}}},
	{PAPI_TLB_IM, {0, {PNE_CORE_ITLB_MISSES, PAPI_NULL}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_TLB_TL, {DERIVED_ADD, {PNE_CORE_DTLB_MISS, PNE_CORE_ITLB_MISSES, PAPI_NULL},{0,}}},
#endif
	{PAPI_L2_DCH, {0, {PNE_CORE_L2_LD, PAPI_NULL}, {0,}}},
	{0, {0, {PAPI_NULL}, {0,}}}
};

/* PAPI PRESETS */
hwi_search_t Core2Processor_map[] = {
	{PAPI_BR_INS, {0, {PNE_CORE2_BR_INST_RETIRED_ANY, PAPI_NULL}, {0,}}},
	{PAPI_RES_STL, {0, {PNE_CORE2_RESOURCE_STALLS_ANY, PAPI_NULL}, {0,}}},
	{PAPI_TOT_CYC, {0, {PNE_CORE2_CPU_CLK_UNHALTED_BUS, PAPI_NULL}, {0,}}},
	{PAPI_TOT_INS, {0, {PNE_CORE2_INST_RETIRED_ANY_P, PAPI_NULL}, {0,}}},
	{PAPI_HW_INT, {0, {PNE_CORE2_HW_INT_RCV, PAPI_NULL}, {0,}}},
	{PAPI_BR_TKN, {0, {PNE_CORE2_BR_INST_RETIRED_TAKEN, PAPI_NULL}, {0,}}},
	{PAPI_BR_MSP, {0, {PNE_CORE2_BR_MISSP_EXEC, PAPI_NULL}, {0,}}},
	{PAPI_TLB_DM, {0, {PNE_CORE2_DTLB_MISSES_ANY, PAPI_NULL}, {0,}}},
	{PAPI_TLB_IM, {0, {PNE_CORE2_ITLB_MISSES, PAPI_NULL}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_TLB_TL, {DERIVED_ADD, {PNE_CORE2_DTLB_MISSES_ANY, PNE_CORE2_ITLB_MISSES, PAPI_NULL},{0,}}},
#endif
	{PAPI_L1_DCA, {0, {PNE_CORE2_L1D_ALL_REF, PAPI_NULL}, {0,}}},
	{PAPI_L1_ICA, {0, {PNE_CORE2_L1I_READS, PAPI_NULL}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L1_TCA, {DERIVED_ADD, {PNE_CORE2_L1D_ALL_REF, PNE_CORE2_L1I_READS, PAPI_NULL}, {0,}}},
#endif
	/* PAPI_L2_ICH seems not to work
	{PAPI_L2_ICH, {0, {PNE_CORE2_L2_IFETCH, PAPI_NULL}, {0,}}},
	*/
	{PAPI_L2_DCH, {0, {PNE_CORE2_L2_LD, PAPI_NULL}, {0,}}},
	{PAPI_FP_INS, {0, {PNE_CORE2_X87_OPS_RETIRED_ANY, PAPI_NULL}, {0,}}},
	{PAPI_L1_DCM, {0, {PNE_CORE2_MEM_LOAD_RETIRED_L1D_MISS, PAPI_NULL}, {0,}}},
	{PAPI_L1_ICM, {0, {PNE_CORE2_L1I_MISSES, PAPI_NULL}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L1_TCM, {DERIVED_ADD, {PNE_CORE2_MEM_LOAD_RETIRED_L1D_MISS, PNE_CORE2_L1I_MISSES, PAPI_NULL}, {0,}}},
#endif
	{PAPI_L2_DCM, {0, {PNE_CORE2_MEM_LOAD_RETIRED_L2_MISS, PAPI_NULL}, {0,}}},
	{0, {0, {PAPI_NULL}, {0,}}}
};



/* PAPI PRESETS */
hwi_search_t Core2ExtremeProcessor_map[] = {
	{PAPI_BR_INS, {0, {PNE_CORE2EXTREME_BR_INST_RETIRED_ANY, PAPI_NULL}, {0,}}},
	{PAPI_RES_STL, {0, {PNE_CORE2EXTREME_RESOURCE_STALLS_ANY, PAPI_NULL}, {0,}}},
	{PAPI_TOT_CYC, {0, {PNE_CORE2EXTREME_CPU_CLK_UNHALTED_BUS, PAPI_NULL}, {0,}}},
	{PAPI_TOT_INS, {0, {PNE_CORE2EXTREME_INST_RETIRED_ANY_P, PAPI_NULL}, {0,}}},
	{PAPI_HW_INT, {0, {PNE_CORE2EXTREME_HW_INT_RCV, PAPI_NULL}, {0,}}},
	{PAPI_BR_TKN, {0, {PNE_CORE2EXTREME_BR_INST_RETIRED_TAKEN, PAPI_NULL}, {0,}}},
	{PAPI_BR_MSP, {0, {PNE_CORE2EXTREME_BR_MISSP_EXEC, PAPI_NULL}, {0,}}},
	{PAPI_TLB_DM, {0, {PNE_CORE2EXTREME_DTLB_MISSES_ANY, PAPI_NULL}, {0,}}},
	{PAPI_TLB_IM, {0, {PNE_CORE2EXTREME_ITLB_MISSES, PAPI_NULL}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_TLB_TL, {DERIVED_ADD, {PNE_CORE2EXTREME_DTLB_MISSES_ANY, PNE_CORE2EXTREME_ITLB_MISSES, PAPI_NULL},{0,}}},
#endif
	{PAPI_L1_DCA, {0, {PNE_CORE2EXTREME_L1D_ALL_REF, PAPI_NULL}, {0,}}},
	{PAPI_L1_ICA, {0, {PNE_CORE2EXTREME_L1I_READS, PAPI_NULL}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L1_TCA, {DERIVED_ADD, {PNE_CORE2EXTREME_L1D_ALL_REF, PNE_CORE2EXTREME_L1I_READS, PAPI_NULL}, {0,}}},
#endif
	/* PAPI_L2_ICH seems not to work
	{PAPI_L2_ICH, {0, {PNE_CORE2EXTREME_L2_IFETCH, PAPI_NULL}, {0,}}},
	*/
	{PAPI_L2_DCH, {0, {PNE_CORE2EXTREME_L2_LD, PAPI_NULL}, {0,}}},
	{PAPI_FP_INS, {0, {PNE_CORE2EXTREME_X87_OPS_RETIRED_ANY, PAPI_NULL}, {0,}}},
	{PAPI_L1_DCM, {0, {PNE_CORE2EXTREME_MEM_LOAD_RETIRED_L1D_MISS, PAPI_NULL}, {0,}}},
	{PAPI_L1_ICM, {0, {PNE_CORE2EXTREME_L1I_MISSES, PAPI_NULL}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L1_TCM, {DERIVED_ADD, {PNE_CORE2EXTREME_MEM_LOAD_RETIRED_L1D_MISS, PNE_CORE2EXTREME_L1I_MISSES, PAPI_NULL}, {0,}}},
#endif
	{PAPI_L2_DCM, {0, {PNE_CORE2EXTREME_MEM_LOAD_RETIRED_L2_MISS, PAPI_NULL}, {0,}}},
	{0, {0, {PAPI_NULL}, {0,}}}
};



/* PAPI PRESETS */
hwi_search_t i7Processor_map[] = {
	{PAPI_BR_INS, {0, {PNE_I7_BR_INST_RETIRED_ALL_BRANCHES, PAPI_NULL}, {0,}}},
	{PAPI_RES_STL, {0, {PNE_I7_RESOURCE_STALLS_ANY, PAPI_NULL}, {0,}}},
/*
	{PAPI_TOT_CYC, {0, {PNE_I7_CPU_CLK_UNHALTED_REF_P, PAPI_NULL}, {0,}}},
	{PAPI_TOT_INS, {0, {PNE_I7_INST_RETIRED_ANY_P, PAPI_NULL}, {0,}}},
*/
	{PAPI_TOT_CYC, {0, {PNE_I7_CPU_CLK_UNHALTED_CORE, PAPI_NULL}, {0,}}},
	{PAPI_TOT_INS, {0, {PNE_I7_INSTR_RETIRED_ANY, PAPI_NULL}, {0,}}},
	{PAPI_HW_INT, {0, {PNE_I7_HW_INT_RCV, PAPI_NULL}, {0,}}},
	{PAPI_BR_TKN, {0, {PNE_I7_BR_MISP_EXEC_TAKEN, PAPI_NULL}, {0,}}},
	{PAPI_BR_MSP, {0, {PNE_I7_BR_MISP_EXEC_ANY, PAPI_NULL}, {0,}}},
	{PAPI_TLB_DM, {0, {PNE_I7_DTLB_MISSES_ANY, PAPI_NULL}, {0,}}},
	{PAPI_TLB_IM, {0, {PNE_I7_ITLB_MISSES_ANY, PAPI_NULL}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_TLB_TL, {DERIVED_ADD, {PNE_I7_DTLB_MISSES_ANY, PNE_I7_ITLB_MISSES_ANY, PAPI_NULL},{0,}}},
#endif
	{PAPI_L1_DCA, {0, {PNE_I7_L1D_ALL_REF_ANY, PAPI_NULL}, {0,}}},
	{PAPI_L1_ICA, {0, {PNE_I7_L1I_READS, PAPI_NULL}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L1_TCA, {DERIVED_ADD, {PNE_I7_L1D_ALL_REF_ANY, PNE_I7_L1I_READS, PAPI_NULL}, {0,}}},
#endif
	/* PAPI_L2_ICH seems not to work
	{PAPI_L2_ICH, {0, {PNE_I7_L2_IFETCH, PAPI_NULL}, {0,}}},
	*/
	{PAPI_L2_DCH, {0, {PNE_I7_MEM_LOAD_RETIRED_L2_HIT, PAPI_NULL}, {0,}}},
	{PAPI_FP_INS, {0, {PNE_I7_INST_RETIRED_X87, PAPI_NULL}, {0,}}},
	{PAPI_L1_DCM, {0, {PNE_I7_L1D_PREFETCH_MISS, PAPI_NULL}, {0,}}},
	{PAPI_L1_ICM, {0, {PNE_I7_L1I_MISSES, PAPI_NULL}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L1_TCM, {DERIVED_ADD, {PNE_I7_L1D_PREFETCH_MISS, PNE_I7_L1I_MISSES, PAPI_NULL}, {0,}}},
#endif
	{PAPI_L2_DCM, {0, {PNE_I7_L2_RQSTS_MISS, PAPI_NULL}, {0,}}},
	{0, {0, {PAPI_NULL}, {0,}}}
};


/* PAPI PRESETS */
hwi_search_t WestmereProcessor_map[] = {
	{PAPI_BR_INS, {0, {PNE_WESTMERE_BR_INST_RETIRED_ALL_BRANCHES, PAPI_NULL}, {0,}}},
	{PAPI_RES_STL, {0, {PNE_WESTMERE_RESOURCE_STALLS_ANY, PAPI_NULL}, {0,}}},
/*
	{PAPI_TOT_CYC, {0, {PNE_WESTMERE_CPU_CLK_UNHALTED_REF_P, PAPI_NULL}, {0,}}},
	{PAPI_TOT_INS, {0, {PNE_WESTMERE_INST_RETIRED_ANY_P, PAPI_NULL}, {0,}}},
*/
	{PAPI_TOT_CYC, {0, {PNE_WESTMERE_CPU_CLK_UNHALTED_CORE, PAPI_NULL}, {0,}}},
	{PAPI_TOT_INS, {0, {PNE_WESTMERE_INSTR_RETIRED_ANY, PAPI_NULL}, {0,}}},
/*	{PAPI_HW_INT, {0, {PNE_WESTMERE_HW_INT_RCV, PAPI_NULL}, {0,}}},*/
	{PAPI_BR_TKN, {0, {PNE_WESTMERE_BR_MISP_EXEC_TAKEN, PAPI_NULL}, {0,}}},
	{PAPI_BR_MSP, {0, {PNE_WESTMERE_BR_MISP_EXEC_ANY, PAPI_NULL}, {0,}}},
	{PAPI_TLB_DM, {0, {PNE_WESTMERE_DTLB_MISSES_ANY, PAPI_NULL}, {0,}}},
	{PAPI_TLB_IM, {0, {PNE_WESTMERE_ITLB_MISSES_ANY, PAPI_NULL}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_TLB_TL, {DERIVED_ADD, {PNE_WESTMERE_DTLB_MISSES_ANY, PNE_WESTMERE_ITLB_MISSES_ANY, PAPI_NULL},{0,}}},
#endif
/*	{PAPI_L1_DCA, {0, {PNE_WESTMERE_L1D_ALL_REF_ANY, PAPI_NULL}, {0,}}},*/
	{PAPI_L1_ICA, {0, {PNE_WESTMERE_L1I_READS, PAPI_NULL}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
/*	{PAPI_L1_TCA, {DERIVED_ADD, {PNE_WESTMERE_L1D_ALL_REF_ANY, PNE_WESTMERE_L1I_READS, PAPI_NULL}, {0,}}},*/
#endif
	/* PAPI_L2_ICH seems not to work
	{PAPI_L2_ICH, {0, {PNE_WESTMERE_L2_IFETCH, PAPI_NULL}, {0,}}},
	*/
	{PAPI_L2_DCH, {0, {PNE_WESTMERE_MEM_LOAD_RETIRED_L2_HIT, PAPI_NULL}, {0,}}},
	{PAPI_FP_INS, {0, {PNE_WESTMERE_INST_RETIRED_X87, PAPI_NULL}, {0,}}},
	{PAPI_L1_DCM, {0, {PNE_WESTMERE_L1D_PREFETCH_MISS, PAPI_NULL}, {0,}}},
	{PAPI_L1_ICM, {0, {PNE_WESTMERE_L1I_MISSES, PAPI_NULL}, {0,}}},
#if HWPMC_NUM_COUNTERS >= 2
	{PAPI_L1_TCM, {DERIVED_ADD, {PNE_WESTMERE_L1D_PREFETCH_MISS, PNE_WESTMERE_L1I_MISSES, PAPI_NULL}, {0,}}},
#endif
	{PAPI_L2_DCM, {0, {PNE_WESTMERE_L2_RQSTS_MISS, PAPI_NULL}, {0,}}},
	{0, {0, {PAPI_NULL}, {0,}}}
};


<commit_msg>Make freebsd_events.csv a valid PAPI event file<commit_after>#
# FreeBSD presets
#   these are needed as event names are different than those in libpfm4
#

CPU,UNKNOWN
PRESET,PAPI_TOT_CYC,NOT_DERIVED,PNE_UNK_CYCLES
PRESET,PAPI_TOT_INS,NOT_DERIVED,PNE_UNK_INSTRUCTIONS
PRESET,PAPI_BR_INS,NOT_DERIVED,PNE_UNK_BRANCHES
PRESET,PAPI_BR_INS,NOT_DERIVED,PNE_UNK_INTERRUPTS
PRESET,PAPI_BR_MSP,NOT_DERIVED,PNE_UNK_BRANCH_MISPREDICTS
PRESET,PAPI_L2_DCM,NOT_DERIVED,PNE_UNK_DC_MISSES
PRESET,PAPI_L2_ICM,NOT_DERIVED,PNE_UNK_IC_MISSES
PRESET,PAPI_L2_TCM,DERIVED_ADD, PNE_UNK_IC_MISSES,PNE_UNK_DC_MISSES

CPU,INTEL_P6
PRESET,PAPI_L1_DCM,NOT_DERIVED,PNE_P6_DCU_LINES_IN
# PNE_P6_L2_IFETCH defaults to MESI
PRESET,PAPI_L1_ICM,NOT_DERIVED,PNE_P6_L2_IFETCH
# PNE_P6_BUS_TRAN_IFETCH defaults to SELF
PRESET,PAPI_L2_DCM,DERIVED_SUB,PNE_P6_L2_LINES_IN,PNE_P6_BUS_TRAN_IFETCH
# PNE_P6_BUS_TRAN_IFETCH defaults to SELF
PRESET,PAPI_L2_ICM,NOT_DERIVED,PNE_P6_BUS_TRAN_IFETCH 
PRESET,PAPI_L1_TCM,NOT_DERIVED,PNE_P6_L2_RQSTS
PRESET,PAPI_L2_TCM,NOT_DERIVED,PNE_P6_L2_LINES_IN
PRESET,PAPI_CA_CLN,NOT_DERIVED,PNE_P6_BUS_TRAN_RFO
PRESET,PAPI_CA_ITV,NOT_DERIVED,PNE_P6_BUS_TRAN_INVAL
PRESET,PAPI_TLB_IM,NOT_DERIVED,PNE_P6_ITLB_MISS
PRESET,PAPI_L1_LDM,NOT_DERIVED,PNE_P6_L2_LD
PRESET,PAPI_L1_STM,NOT_DERIVED,PNE_P6_L2_ST
PRESET,PAPI_L2_LDM,DERIVED_SUB,PNE_P6_L2_LINES_IN,PNE_P6_L2M_LINES_INM
PRESET,PAPI_L2_STM,NOT_DERIVED,PNE_P6_L2M_LINES_INM
PRESET,PAPI_BTAC_M,NOT_DERIVED,PNE_P6_BTB_MISSES
PRESET,PAPI_HW_INT,NOT_DERIVED,PNE_P6_HW_INT_RX
PRESET,PAPI_BR_CN,NOT_DERIVED,PNE_P6_BR_INST_RETIRED
PRESET,PAPI_BR_TKN,NOT_DERIVED,PNE_P6_BR_TAKEN_RETIRED
PRESET,PAPI_BR_NTK,DERIVED_SUB,PNE_P6_BR_INST_RETIRED,PNE_P6_BR_TAKEN_RETIRED
PRESET,PAPI_BR_MSP,NOT_DERIVED,PNE_P6_BR_MISS_PRED_RETIRED
PRESET,PAPI_BR_PRC,DERIVED_SUB,PNE_P6_BR_INST_RETIRED,PNE_P6_BR_MISS_PRED_RETIRED
PRESET,PAPI_TOT_IIS,NOT_DERIVED,PNE_P6_INST_DECODED
PRESET,PAPI_TOT_INS,NOT_DERIVED,PNE_P6_INST_RETIRED
PRESET,PAPI_FP_INS,NOT_DERIVED,PNE_P6_FLOPS
PRESET,PAPI_BR_INS,NOT_DERIVED,PNE_P6_BR_INST_RETIRED
PRESET,PAPI_RES_STL,NOT_DERIVED,PNE_P6_RESOURCE_STALL
PRESET,PAPI_TOT_CYC,NOT_DERIVED,PNE_P6_CPU_CLK_UNHALTED
PRESET,PAPI_LST_INS,DERIVED_ADD,PNE_P6_L2_LD,PNE_P6_L2_ST
PRESET,PAPI_L1_DCH,DERIVED_SUB,PNE_P6_DATA_MEM_REFS, PNE_P6_DCU_LINES_IN
PRESET,PAPI_L1_DCA,NOT_DERIVED,PNE_P6_DATA_MEM_REFS
PRESET,PAPI_L2_DCA,DERIVED_ADD,PNE_P6_L2_LD, PNE_P6_L2_ST
PRESET,PAPI_L2_DCR,NOT_DERIVED,PNE_P6_L2_LD
PRESET,PAPI_L2_DCW,NOT_DERIVED,PNE_P6_L2_ST
PRESET,PAPI_L1_ICH,DERIVED_SUB,PNE_P6_IFU_FETCH, PNE_P6_L2_IFETCH
PRESET,PAPI_L2_ICH,DERIVED_SUB,PNE_P6_L2_IFETCH, PNE_P6_BUS_TRAN_IFETCH
PRESET,PAPI_L1_ICA,NOT_DERIVED,PNE_P6_IFU_FETCH
PRESET,PAPI_L2_ICA,NOT_DERIVED,PNE_P6_L2_IFETCH
PRESET,PAPI_L1_ICR,NOT_DERIVED,PNE_P6_IFU_FETCH
PRESET,PAPI_L2_ICR,NOT_DERIVED,PNE_P6_L2_IFETCH
PRESET,PAPI_L2_TCH,DERIVED_SUB,PNE_P6_L2_RQSTS, PNE_P6_L2_LINES_IN
PRESET,PAPI_L1_TCA,DERIVED_ADD,PNE_P6_DATA_MEM_REFS, PNE_P6_IFU_FETCH
PRESET,PAPI_L2_TCA,NOT_DERIVED,PNE_P6_L2_RQSTS
PRESET,PAPI_L2_TCR,DERIVED_ADD,PNE_P6_L2_LD, PNE_P6_L2_IFETCH
PRESET,PAPI_L2_TCW,NOT_DERIVED,PNE_P6_L2_ST
PRESET,PAPI_FML_INS,NOT_DERIVED,PNE_P6_MUL
PRESET,PAPI_FDV_INS,NOT_DERIVED,PNE_P6_DIV
PRESET,PAPI_FP_OPS,NOT_DERIVED,PNE_P6_FLOPS


CPU,INTEL_PM
PRESET,PAPI_L1_DCM,NOT_DERIVED,PNE_P6_M_DCU_LINES_IN
# PNE_P6_M_L2_IFETCH defaults to MESI
PRESET,PAPI_L1_ICM,NOT_DERIVED,PNE_P6_M_L2_IFETCH 
# PNE_P6_M_BUS_TRAN_IFETCH defaults to SELF
PRESET,PAPI_L2_DCM,DERIVED_SUB,PNE_P6_M_L2_LINES_IN,PNE_P6_M_BUS_TRAN_IFETCH
# PNE_P6_M_BUS_TRAN_IFETCH defaults to SELF
PRESET,PAPI_L2_ICM,NOT_DERIVED,PNE_P6_M_BUS_TRAN_IFETCH 
PRESET,PAPI_L1_TCM,NOT_DERIVED,PNE_P6_M_L2_RQSTS
PRESET,PAPI_L2_TCM,NOT_DERIVED,PNE_P6_M_L2_LINES_IN
PRESET,PAPI_CA_CLN,NOT_DERIVED,PNE_P6_M_BUS_TRAN_RFO
PRESET,PAPI_CA_ITV,NOT_DERIVED,PNE_P6_M_BUS_TRAN_INVAL
PRESET,PAPI_TLB_IM,NOT_DERIVED,PNE_P6_M_ITLB_MISS
PRESET,PAPI_L1_LDM,NOT_DERIVED,PNE_P6_M_L2_LD
PRESET,PAPI_L1_STM,NOT_DERIVED,PNE_P6_M_L2_ST
PRESET,PAPI_L2_LDM,DERIVED_SUB,PNE_P6_M_L2_LINES_IN, PNE_P6_M_L2M_LINES_INM
PRESET,PAPI_L2_STM,NOT_DERIVED,PNE_P6_M_L2M_LINES_INM
PRESET,PAPI_BTAC_M,NOT_DERIVED,PNE_P6_M_BTB_MISSES
PRESET,PAPI_HW_INT,NOT_DERIVED,PNE_P6_M_HW_INT_RX
PRESET,PAPI_BR_CN,NOT_DERIVED,PNE_P6_M_BR_INST_RETIRED
PRESET,PAPI_BR_TKN,NOT_DERIVED,PNE_P6_M_BR_TAKEN_RETIRED
PRESET,PAPI_BR_NTK,DERIVED_SUB,PNE_P6_M_BR_INST_RETIRED, PNE_P6_M_BR_TAKEN_RETIRED
PRESET,PAPI_BR_MSP,NOT_DERIVED,PNE_P6_M_BR_MISS_PRED_RETIRED
PRESET,PAPI_BR_PRC,DERIVED_SUB,PNE_P6_M_BR_INST_RETIRED, PNE_P6_M_BR_MISS_PRED_RETIRED
PRESET,PAPI_TOT_IIS,NOT_DERIVED,PNE_P6_M_INST_DECODED
PRESET,PAPI_TOT_INS,NOT_DERIVED,PNE_P6_M_INST_RETIRED
PRESET,PAPI_FP_INS,NOT_DERIVED,PNE_P6_M_FLOPS
PRESET,PAPI_BR_INS,NOT_DERIVED,PNE_P6_M_BR_INST_RETIRED
PRESET,PAPI_RES_STL,NOT_DERIVED,PNE_P6_M_RESOURCE_STALL
PRESET,PAPI_TOT_CYC,NOT_DERIVED,PNE_P6_M_CPU_CLK_UNHALTED
PRESET,PAPI_LST_INS,DERIVED_ADD,PNE_P6_M_L2_LD,PNE_P6_M_L2_ST
PRESET,PAPI_L1_DCH,DERIVED_SUB,PNE_P6_M_DATA_MEM_REFS, PNE_P6_M_DCU_LINES_IN
PRESET,PAPI_L1_DCA,NOT_DERIVED,PNE_P6_M_DATA_MEM_REFS
PRESET,PAPI_L2_DCA,DERIVED_ADD,PNE_P6_M_L2_LD, PNE_P6_M_L2_ST
PRESET,PAPI_L2_DCR,NOT_DERIVED,PNE_P6_M_L2_LD
PRESET,PAPI_L2_DCW,NOT_DERIVED,PNE_P6_M_L2_ST
PRESET,PAPI_L1_ICH,DERIVED_SUB,PNE_P6_M_IFU_FETCH, PNE_P6_M_L2_IFETCH
PRESET,PAPI_L2_ICH,DERIVED_SUB,PNE_P6_M_L2_IFETCH, PNE_P6_M_BUS_TRAN_IFETCH
PRESET,PAPI_L1_ICA,NOT_DERIVED,PNE_P6_M_IFU_FETCH
PRESET,PAPI_L2_ICA,NOT_DERIVED,PNE_P6_M_L2_IFETCH
PRESET,PAPI_L1_ICR,NOT_DERIVED,PNE_P6_M_IFU_FETCH
PRESET,PAPI_L2_ICR,NOT_DERIVED,PNE_P6_M_L2_IFETCH
PRESET,PAPI_L2_TCH,DERIVED_SUB,PNE_P6_M_L2_RQSTS, PNE_P6_M_L2_LINES_IN
PRESET,PAPI_L1_TCA,DERIVED_ADD,PNE_P6_M_DATA_MEM_REFS, PNE_P6_M_IFU_FETCH
PRESET,PAPI_L2_TCA,NOT_DERIVED,PNE_P6_M_L2_RQSTS
PRESET,PAPI_L2_TCR,DERIVED_ADD,PNE_P6_M_L2_LD, PNE_P6_M_L2_IFETCH
PRESET,PAPI_L2_TCW,NOT_DERIVED,PNE_P6_M_L2_ST
PRESET,PAPI_FML_INS,NOT_DERIVED,PNE_P6_M_MUL
PRESET,PAPI_FDV_INS,NOT_DERIVED,PNE_P6_M_DIV
PRESET,PAPI_FP_OPS,NOT_DERIVED,PNE_P6_M_FLOPS
PRESET,PAPI_VEC_INS,DERIVED_ADD,PNE_P6_M_MMX_INSTR_RET, PNE_P6_M_EMON_SSE_SSE2_INST_RETIRED

CPU,INTEL_PIII
PRESET,PAPI_L1_DCM,NOT_DERIVED,PNE_P6_3_DCU_LINES_IN
# PNE_P6_3_L2_IFETCH defaults to MESI
PRESET,PAPI_L1_ICM,NOT_DERIVED,PNE_P6_3_L2_IFETCH 
# PNE_P6_3_BUS_TRAN_IFETCH defaults to SELF
PRESET,PAPI_L2_DCM,DERIVED_SUB,PNE_P6_3_L2_LINES_IN, PNE_P6_3_BUS_TRAN_IFETCH 
# PNE_P6_3_BUS_TRAN_IFETCH defaults to SELF
PRESET,PAPI_L2_ICM,NOT_DERIVED,PNE_P6_3_BUS_TRAN_IFETCH 
PRESET,PAPI_L1_TCM,NOT_DERIVED,PNE_P6_3_L2_RQSTS
PRESET,PAPI_L2_TCM,NOT_DERIVED,PNE_P6_3_L2_LINES_IN
PRESET,PAPI_CA_CLN,NOT_DERIVED,PNE_P6_3_BUS_TRAN_RFO
PRESET,PAPI_CA_ITV,NOT_DERIVED,PNE_P6_3_BUS_TRAN_INVAL
PRESET,PAPI_TLB_IM,NOT_DERIVED,PNE_P6_3_ITLB_MISS
PRESET,PAPI_L1_LDM,NOT_DERIVED,PNE_P6_3_L2_LD
PRESET,PAPI_L1_STM,NOT_DERIVED,PNE_P6_3_L2_ST
PRESET,PAPI_L2_LDM,DERIVED_SUB,PNE_P6_3_L2_LINES_IN, PNE_P6_3_L2M_LINES_INM
PRESET,PAPI_L2_STM,NOT_DERIVED,PNE_P6_3_L2M_LINES_INM
PRESET,PAPI_BTAC_M,NOT_DERIVED,PNE_P6_3_BTB_MISSES
PRESET,PAPI_HW_INT,NOT_DERIVED,PNE_P6_3_HW_INT_RX
PRESET,PAPI_BR_CN,NOT_DERIVED,PNE_P6_3_BR_INST_RETIRED
PRESET,PAPI_BR_TKN,NOT_DERIVED,PNE_P6_3_BR_TAKEN_RETIRED
PRESET,PAPI_BR_NTK,DERIVED_SUB,PNE_P6_3_BR_INST_RETIRED, PNE_P6_3_BR_TAKEN_RETIRED
PRESET,PAPI_BR_MSP,NOT_DERIVED,PNE_P6_3_BR_MISS_PRED_RETIRED
PRESET,PAPI_BR_PRC,DERIVED_SUB,PNE_P6_3_BR_INST_RETIRED, PNE_P6_3_BR_MISS_PRED_RETIRED
PRESET,PAPI_TOT_IIS,NOT_DERIVED,PNE_P6_3_INST_DECODED
PRESET,PAPI_TOT_INS,NOT_DERIVED,PNE_P6_3_INST_RETIRED
PRESET,PAPI_FP_INS,NOT_DERIVED,PNE_P6_3_FLOPS
PRESET,PAPI_BR_INS,NOT_DERIVED,PNE_P6_3_BR_INST_RETIRED
PRESET,PAPI_RES_STL,NOT_DERIVED,PNE_P6_3_RESOURCE_STALL
PRESET,PAPI_TOT_CYC,NOT_DERIVED,PNE_P6_3_CPU_CLK_UNHALTED
PRESET,PAPI_LST_INS,DERIVED_ADD,PNE_P6_3_L2_LD,PNE_P6_3_L2_ST
PRESET,PAPI_L1_DCH,DERIVED_SUB,PNE_P6_3_DATA_MEM_REFS, PNE_P6_3_DCU_LINES_IN
PRESET,PAPI_L1_DCA,NOT_DERIVED,PNE_P6_3_DATA_MEM_REFS
PRESET,PAPI_L2_DCA,DERIVED_ADD,PNE_P6_3_L2_LD, PNE_P6_3_L2_ST
PRESET,PAPI_L2_DCR,NOT_DERIVED,PNE_P6_3_L2_LD
PRESET,PAPI_L2_DCW,NOT_DERIVED,PNE_P6_3_L2_ST
PRESET,PAPI_L1_ICH,DERIVED_SUB,PNE_P6_3_IFU_FETCH, PNE_P6_3_L2_IFETCH
PRESET,PAPI_L2_ICH,DERIVED_SUB,PNE_P6_3_L2_IFETCH, PNE_P6_3_BUS_TRAN_IFETCH
PRESET,PAPI_L1_ICA,NOT_DERIVED,PNE_P6_3_IFU_FETCH
PRESET,PAPI_L2_ICA,NOT_DERIVED,PNE_P6_3_L2_IFETCH
PRESET,PAPI_L1_ICR,NOT_DERIVED,PNE_P6_3_IFU_FETCH
PRESET,PAPI_L2_ICR,NOT_DERIVED,PNE_P6_3_L2_IFETCH
PRESET,PAPI_L2_TCH,DERIVED_SUB,PNE_P6_3_L2_RQSTS, PNE_P6_3_L2_LINES_IN
PRESET,PAPI_L1_TCA,DERIVED_ADD,PNE_P6_3_DATA_MEM_REFS, PNE_P6_3_IFU_FETCH
PRESET,PAPI_L2_TCA,NOT_DERIVED,PNE_P6_3_L2_RQSTS
PRESET,PAPI_L2_TCR,DERIVED_ADD,PNE_P6_3_L2_LD, PNE_P6_3_L2_IFETCH
PRESET,PAPI_L2_TCW,NOT_DERIVED,PNE_P6_3_L2_ST
PRESET,PAPI_FML_INS,NOT_DERIVED,PNE_P6_3_MUL
PRESET,PAPI_FDV_INS,NOT_DERIVED,PNE_P6_3_DIV
PRESET,PAPI_FP_OPS,NOT_DERIVED,PNE_P6_3_FLOPS
PRESET,PAPI_VEC_INS,DERIVED_ADD,PNE_P6_3_MMX_INSTR_RET, PNE_P6_3_EMON_KNI_INST_RETIRED

CPU,INTEL_PII
PRESET,PAPI_L1_DCM,NOT_DERIVED,PNE_P6_2_DCU_LINES_IN
# PNE_P6_2_L2_IFETCH defaults to MESI 
PRESET,PAPI_L1_ICM,NOT_DERIVED,PNE_P6_2_L2_IFETCH 
# PNE_P6_2_BUS_TRAN_IFETCH defaults to SELF
PRESET,PAPI_L2_DCM,DERIVED_SUB,PNE_P6_2_L2_LINES_IN, PNE_P6_2_BUS_TRAN_IFETCH
# PNE_P6_2_BUS_TRAN_IFETCH defaults to SELF
PRESET,PAPI_L2_ICM,NOT_DERIVED,PNE_P6_2_BUS_TRAN_IFETCH 
PRESET,PAPI_L1_TCM,NOT_DERIVED,PNE_P6_2_L2_RQSTS
PRESET,PAPI_L2_TCM,NOT_DERIVED,PNE_P6_2_L2_LINES_IN
PRESET,PAPI_CA_CLN,NOT_DERIVED,PNE_P6_2_BUS_TRAN_RFO
PRESET,PAPI_CA_ITV,NOT_DERIVED,PNE_P6_2_BUS_TRAN_INVAL
PRESET,PAPI_TLB_IM,NOT_DERIVED,PNE_P6_2_ITLB_MISS
PRESET,PAPI_L1_LDM,NOT_DERIVED,PNE_P6_2_L2_LD
PRESET,PAPI_L1_STM,NOT_DERIVED,PNE_P6_2_L2_ST
PRESET,PAPI_L2_LDM,DERIVED_SUB,PNE_P6_2_L2_LINES_IN, PNE_P6_2_L2M_LINES_INM
PRESET,PAPI_L2_STM,NOT_DERIVED,PNE_P6_2_L2M_LINES_INM
PRESET,PAPI_BTAC_M,NOT_DERIVED,PNE_P6_2_BTB_MISSES
PRESET,PAPI_HW_INT,NOT_DERIVED,PNE_P6_2_HW_INT_RX
PRESET,PAPI_BR_CN,NOT_DERIVED,PNE_P6_2_BR_INST_RETIRED
PRESET,PAPI_BR_TKN,NOT_DERIVED,PNE_P6_2_BR_TAKEN_RETIRED
PRESET,PAPI_BR_NTK,DERIVED_SUB,PNE_P6_2_BR_INST_RETIRED, PNE_P6_2_BR_TAKEN_RETIRED
PRESET,PAPI_BR_MSP,NOT_DERIVED,PNE_P6_2_BR_MISS_PRED_RETIRED
PRESET,PAPI_BR_PRC,DERIVED_SUB,PNE_P6_2_BR_INST_RETIRED, PNE_P6_2_BR_MISS_PRED_RETIRED
PRESET,PAPI_TOT_IIS,NOT_DERIVED,PNE_P6_2_INST_DECODED
PRESET,PAPI_TOT_INS,NOT_DERIVED,PNE_P6_2_INST_RETIRED
PRESET,PAPI_FP_INS,NOT_DERIVED,PNE_P6_2_FLOPS
PRESET,PAPI_BR_INS,NOT_DERIVED,PNE_P6_2_BR_INST_RETIRED
PRESET,PAPI_RES_STL,NOT_DERIVED,PNE_P6_2_RESOURCE_STALL
PRESET,PAPI_TOT_CYC,NOT_DERIVED,PNE_P6_2_CPU_CLK_UNHALTED
PRESET,PAPI_LST_INS,DERIVED_ADD,PNE_P6_2_L2_LD,PNE_P6_2_L2_ST
PRESET,PAPI_L1_DCH,DERIVED_SUB,PNE_P6_2_DATA_MEM_REFS, PNE_P6_2_DCU_LINES_IN
PRESET,PAPI_L1_DCA,NOT_DERIVED,PNE_P6_2_DATA_MEM_REFS
PRESET,PAPI_L2_DCA,DERIVED_ADD,PNE_P6_2_L2_LD, PNE_P6_2_L2_ST
PRESET,PAPI_L2_DCR,NOT_DERIVED,PNE_P6_2_L2_LD
PRESET,PAPI_L2_DCW,NOT_DERIVED,PNE_P6_2_L2_ST
PRESET,PAPI_L1_ICH,DERIVED_SUB,PNE_P6_2_IFU_FETCH, PNE_P6_2_L2_IFETCH
PRESET,PAPI_L2_ICH,DERIVED_SUB,PNE_P6_2_L2_IFETCH, PNE_P6_2_BUS_TRAN_IFETCH
PRESET,PAPI_L1_ICA,NOT_DERIVED,PNE_P6_2_IFU_FETCH
PRESET,PAPI_L2_ICA,NOT_DERIVED,PNE_P6_2_L2_IFETCH
PRESET,PAPI_L1_ICR,NOT_DERIVED,PNE_P6_2_IFU_FETCH
PRESET,PAPI_L2_ICR,NOT_DERIVED,PNE_P6_2_L2_IFETCH
PRESET,PAPI_L2_TCH,DERIVED_SUB,PNE_P6_2_L2_RQSTS, PNE_P6_2_L2_LINES_IN
PRESET,PAPI_L1_TCA,DERIVED_ADD,PNE_P6_2_DATA_MEM_REFS, PNE_P6_2_IFU_FETCH
PRESET,PAPI_L2_TCA,NOT_DERIVED,PNE_P6_2_L2_RQSTS
PRESET,PAPI_L2_TCR,DERIVED_ADD,PNE_P6_2_L2_LD, PNE_P6_2_L2_IFETCH
PRESET,PAPI_L2_TCW,NOT_DERIVED,PNE_P6_2_L2_ST
PRESET,PAPI_FML_INS,NOT_DERIVED,PNE_P6_2_MUL
PRESET,PAPI_FDV_INS,NOT_DERIVED,PNE_P6_2_DIV
PRESET,PAPI_FP_OPS,NOT_DERIVED,PNE_P6_2_FLOPS
PRESET,PAPI_VEC_INS,NOT_DERIVED,PNE_P6_2_MMX_INSTR_RET

CPU,INTEL_CL
PRESET,PAPI_L1_DCM,NOT_DERIVED,PNE_P6_C_DCU_LINES_IN
# PNE_P6_C_L2_IFETCH defaults to MESI
PRESET,PAPI_L1_ICM,NOT_DERIVED,PNE_P6_C_L2_IFETCH 
# PNE_P6_C_BUS_TRAN_IFETCH defaults to SELF
PRESET,PAPI_L2_DCM,DERIVED_SUB,PNE_P6_C_L2_LINES_IN, PNE_P6_C_BUS_TRAN_IFETCH 
/* PNE_P6_C_BUS_TRAN_IFETCH defaults to SELF */
PRESET,PAPI_L2_ICM,NOT_DERIVED,PNE_P6_C_BUS_TRAN_IFETCH 
PRESET,PAPI_L1_TCM,NOT_DERIVED,PNE_P6_C_L2_RQSTS
PRESET,PAPI_L2_TCM,NOT_DERIVED,PNE_P6_C_L2_LINES_IN
PRESET,PAPI_CA_CLN,NOT_DERIVED,PNE_P6_C_BUS_TRAN_RFO
PRESET,PAPI_CA_ITV,NOT_DERIVED,PNE_P6_C_BUS_TRAN_INVAL
PRESET,PAPI_TLB_IM,NOT_DERIVED,PNE_P6_C_ITLB_MISS
PRESET,PAPI_L1_LDM,NOT_DERIVED,PNE_P6_C_L2_LD
PRESET,PAPI_L1_STM,NOT_DERIVED,PNE_P6_C_L2_ST
PRESET,PAPI_L2_LDM,DERIVED_SUB,PNE_P6_C_L2_LINES_IN, PNE_P6_C_L2M_LINES_INM
PRESET,PAPI_L2_STM,NOT_DERIVED,PNE_P6_C_L2M_LINES_INM
PRESET,PAPI_BTAC_M,NOT_DERIVED,PNE_P6_C_BTB_MISSES
PRESET,PAPI_HW_INT,NOT_DERIVED,PNE_P6_C_HW_INT_RX
PRESET,PAPI_BR_CN,NOT_DERIVED,PNE_P6_C_BR_INST_RETIRED
PRESET,PAPI_BR_TKN,NOT_DERIVED,PNE_P6_C_BR_TAKEN_RETIRED
PRESET,PAPI_BR_NTK,DERIVED_SUB,PNE_P6_C_BR_INST_RETIRED, PNE_P6_C_BR_TAKEN_RETIRED
PRESET,PAPI_BR_MSP,NOT_DERIVED,PNE_P6_C_BR_MISS_PRED_RETIRED
PRESET,PAPI_BR_PRC,DERIVED_SUB,PNE_P6_C_BR_INST_RETIRED, PNE_P6_C_BR_MISS_PRED_RETIRED
PRESET,PAPI_TOT_IIS,NOT_DERIVED,PNE_P6_C_INST_DECODED
PRESET,PAPI_TOT_INS,NOT_DERIVED,PNE_P6_C_INST_RETIRED
PRESET,PAPI_FP_INS,NOT_DERIVED,PNE_P6_C_FLOPS
PRESET,PAPI_BR_INS,NOT_DERIVED,PNE_P6_C_BR_INST_RETIRED
PRESET,PAPI_RES_STL,NOT_DERIVED,PNE_P6_C_RESOURCE_STALL
PRESET,PAPI_TOT_CYC,NOT_DERIVED,PNE_P6_C_CPU_CLK_UNHALTED
PRESET,PAPI_LST_INS,DERIVED_ADD,PNE_P6_C_L2_LD,PNE_P6_C_L2_ST
PRESET,PAPI_L1_DCH,DERIVED_SUB,PNE_P6_C_DATA_MEM_REFS, PNE_P6_C_DCU_LINES_IN
PRESET,PAPI_L1_DCA,NOT_DERIVED,PNE_P6_C_DATA_MEM_REFS
PRESET,PAPI_L2_DCA,DERIVED_ADD,PNE_P6_C_L2_LD, PNE_P6_C_L2_ST
PRESET,PAPI_L2_DCR,NOT_DERIVED,PNE_P6_C_L2_LD
PRESET,PAPI_L2_DCW,NOT_DERIVED,PNE_P6_C_L2_ST
PRESET,PAPI_L1_ICH,DERIVED_SUB,PNE_P6_C_IFU_FETCH, PNE_P6_C_L2_IFETCH
PRESET,PAPI_L2_ICH,DERIVED_SUB,PNE_P6_C_L2_IFETCH, PNE_P6_C_BUS_TRAN_IFETCH
PRESET,PAPI_L1_ICA,NOT_DERIVED,PNE_P6_C_IFU_FETCH
PRESET,PAPI_L2_ICA,NOT_DERIVED,PNE_P6_C_L2_IFETCH
PRESET,PAPI_L1_ICR,NOT_DERIVED,PNE_P6_C_IFU_FETCH
PRESET,PAPI_L2_ICR,NOT_DERIVED,PNE_P6_C_L2_IFETCH
PRESET,PAPI_L2_TCH,DERIVED_SUB,PNE_P6_C_L2_RQSTS, PNE_P6_C_L2_LINES_IN
PRESET,PAPI_L1_TCA,DERIVED_ADD,PNE_P6_C_DATA_MEM_REFS, PNE_P6_C_IFU_FETCH
PRESET,PAPI_L2_TCA,NOT_DERIVED,PNE_P6_C_L2_RQSTS
PRESET,PAPI_L2_TCR,DERIVED_ADD,PNE_P6_C_L2_LD, PNE_P6_C_L2_IFETCH
PRESET,PAPI_L2_TCW,NOT_DERIVED,PNE_P6_C_L2_ST
PRESET,PAPI_FML_INS,NOT_DERIVED,PNE_P6_C_MUL
PRESET,PAPI_FDV_INS,NOT_DERIVED,PNE_P6_C_DIV
PRESET,PAPI_FP_OPS,NOT_DERIVED,PNE_P6_C_FLOPS
PRESET,PAPI_VEC_INS,NOT_DERIVED,PNE_P6_C_MMX_INSTR_EXEC

CPU,AMD_K7
PRESET,PAPI_L1_DCM,DERIVED_ADD,PNE_K7_DC_REFILLS_FROM_SYSTEM, PNE_K7_DC_REFILLS_FROM_L2
PRESET,PAPI_L1_ICM,NOT_DERIVED,PNE_K7_IC_MISSES
PRESET,PAPI_L2_DCM,NOT_DERIVED,PNE_K7_DC_REFILLS_FROM_SYSTEM
PRESET,PAPI_L1_TCM,DERIVED_ADD,PNE_K7_DC_REFILLS_FROM_SYSTEM, PNE_K7_DC_REFILLS_FROM_L2, PNE_K7_IC_MISSES
PRESET,PAPI_TLB_DM,NOT_DERIVED,PNE_K7_L1_AND_L2_DTLB_MISSES
PRESET,PAPI_TLB_IM,NOT_DERIVED,PNE_K7_L1_AND_L2_ITLB_MISSES
PRESET,PAPI_TLB_TL,DERIVED_ADD,PNE_K7_L1_AND_L2_DTLB_MISSES, PNE_K7_L1_AND_L2_ITLB_MISSES
PRESET,PAPI_L1_LDM,NOT_DERIVED,PNE_K7_DC_REFILLS_FROM_L2_OES
PRESET,PAPI_L1_STM,NOT_DERIVED,PNE_K7_DC_REFILLS_FROM_L2_M
PRESET,PAPI_L2_LDM,NOT_DERIVED,PNE_K7_DC_REFILLS_FROM_SYSTEM_OES
PRESET,PAPI_L2_STM,NOT_DERIVED,PNE_K7_DC_REFILLS_FROM_SYSTEM_M
PRESET,PAPI_HW_INT,NOT_DERIVED,PNE_K7_HARDWARE_INTERRUPTS
PRESET,PAPI_BR_UCN,NOT_DERIVED,PNE_K7_RETIRED_FAR_CONTROL_TRANSFERS
PRESET,PAPI_BR_CN,NOT_DERIVED,PNE_K7_RETIRED_BRANCHES
PRESET,PAPI_BR_TKN,NOT_DERIVED,PNE_K7_RETIRED_TAKEN_BRANCHES
PRESET,PAPI_BR_NTK,DERIVED_SUB,PNE_K7_RETIRED_BRANCHES, PNE_K7_RETIRED_TAKEN_BRANCHES
PRESET,PAPI_BR_MSP,NOT_DERIVED,PNE_K7_RETIRED_BRANCHES_MISPREDICTED
PRESET,PAPI_BR_PRC,DERIVED_SUB,PNE_K7_RETIRED_BRANCHES, PNE_K7_RETIRED_BRANCHES_MISPREDICTED
PRESET,PAPI_TOT_INS,NOT_DERIVED,PNE_K7_RETIRED_INSTRUCTIONS
PRESET,PAPI_BR_INS,NOT_DERIVED,PNE_K7_RETIRED_TAKEN_BRANCHES
PRESET,PAPI_L1_DCA,NOT_DERIVED,PNE_K7_DC_ACCESSES
PRESET,PAPI_L2_DCA,DERIVED_ADD,PNE_K7_DC_REFILLS_FROM_SYSTEM, PNE_K7_DC_REFILLS_FROM_L2
PRESET,PAPI_L1_ICA,NOT_DERIVED,PNE_K7_IC_FETCHES
PRESET,PAPI_L2_ICA,NOT_DERIVED,PNE_K7_IC_MISSES
PRESET,PAPI_L1_ICR,NOT_DERIVED,PNE_K7_IC_FETCHES
PRESET,PAPI_L1_TCA,DERIVED_ADD,PNE_K7_DC_ACCESSES, PNE_K7_IC_FETCHES

CPU,AMD_K8
PRESET,PAPI_BR_INS,NOT_DERIVED,PNE_K8_FR_RETIRED_BRANCHES
PRESET,PAPI_RES_STL,NOT_DERIVED,PNE_K8_FR_DISPATCH_STALLS
PRESET,PAPI_TOT_CYC,NOT_DERIVED,PNE_K8_BU_CPU_CLK_UNHALTED
PRESET,PAPI_TOT_INS,NOT_DERIVED,PNE_K8_FR_RETIRED_X86_INSTRUCTIONS
PRESET,PAPI_STL_ICY,PNE_K8_FR_DECODER_EMPTY
PRESET,PAPI_HW_INT,NOT_DERIVED,PNE_K8_FR_RETIRED_TAKEN_HARDWARE_INTERRUPTS
PRESET,PAPI_BR_TKN,NOT_DERIVED,PNE_K8_FR_RETIRED_TAKEN_BRANCHES
PRESET,PAPI_BR_MSP,NOT_DERIVED,PNE_K8_FR_RETIRED_TAKEN_BRANCHES_MISPREDICTED
PRESET,PAPI_TLB_DM,NOT_DERIVED,PNE_K8_DC_L1_DTLB_MISS_AND_L2_DTLB_MISS
PRESET,PAPI_TLB_IM,NOT_DERIVED,PNE_K8_IC_L1_ITLB_MISS_AND_L2_ITLB_MISS
PRESET,PAPI_TLB_TL,DERIVED_ADD,PNE_K8_DC_L1_DTLB_MISS_AND_L2_DTLB_MISS,PNE_K8_IC_L1_ITLB_MISS_AND_L2_ITLB_MISS
PRESET,PAPI_L1_DCA,NOT_DERIVED,PNE_K8_DC_ACCESS
PRESET,PAPI_L1_ICA,NOT_DERIVED,PNE_K8_IC_FETCH
PRESET,PAPI_L1_TCA,DERIVED_ADD,PNE_K8_DC_ACCESS, PNE_K8_IC_FETCH
PRESET,PAPI_L1_ICR,NOT_DERIVED,PNE_K8_IC_FETCH
PRESET,PAPI_L2_ICH,NOT_DERIVED,PNE_K8_IC_REFILL_FROM_L2
PRESET,PAPI_L2_DCH,NOT_DERIVED,PNE_K8_DC_REFILL_FROM_L2
PRESET,PAPI_L2_DCM,NOT_DERIVED,PNE_K8_DC_REFILL_FROM_SYSTEM_MOES
PRESET,PAPI_L2_DCA,DERIVED_ADD,PNE_K8_DC_REFILL_FROM_SYSTEM_MOES, PNE_K8_DC_REFILL_FROM_L2_MOES
PRESET,PAPI_L2_ICM,NOT_DERIVED,PNE_K8_IC_REFILL_FROM_SYSTEM
PRESET,PAPI_L2_DCR,NOT_DERIVED,PNE_K8_DC_REFILL_FROM_L2_OES
PRESET,PAPI_L2_DCW,NOT_DERIVED,PNE_K8_DC_REFILL_FROM_L2_M
PRESET,PAPI_L2_DCH,NOT_DERIVED,PNE_K8_DC_REFILL_FROM_L2_MOES
PRESET,PAPI_L1_LDM,NOT_DERIVED,PNE_K8_DC_REFILL_FROM_L2_OES
PRESET,PAPI_L1_STM,NOT_DERIVED,PNE_K8_DC_REFILL_FROM_L2_M
PRESET,PAPI_L2_LDM,NOT_DERIVED,PNE_K8_DC_REFILL_FROM_SYSTEM_OES
PRESET,PAPI_L2_STM,NOT_DERIVED,PNE_K8_DC_REFILL_FROM_SYSTEM_M
PRESET,PAPI_L1_DCM,DERIVED_ADD,PNE_K8_DC_REFILL_FROM_SYSTEM_MOES, PNE_K8_DC_REFILL_FROM_L2_MOES
PRESET,PAPI_L1_ICM,DERIVED_ADD,PNE_K8_IC_REFILL_FROM_L2, PNE_K8_IC_REFILL_FROM_SYSTEM
PRESET,PAPI_L1_TCM,DERIVED_ADD,PNE_K8_DC_REFILL_FROM_SYSTEM_MOES,PNE_K8_DC_REFILL_FROM_L2_MOES,PNE_K8_IC_REFILL_FROM_SYSTEM,PNE_K8_IC_REFILL_FROM_L2
PRESET,PAPI_L2_TCM,DERIVED_ADD,PNE_K8_DC_REFILL_FROM_SYSTEM_MOES,PNE_K8_IC_REFILL_FROM_SYSTEM
PRESET,PAPI_L2_ICA,DERIVED_ADD,PNE_K8_IC_REFILL_FROM_SYSTEM,PNE_K8_IC_REFILL_FROM_L2
PRESET,PAPI_L2_TCH,DERIVED_ADD,PNE_K8_IC_REFILL_FROM_L2,PNE_K8_DC_REFILL_FROM_L2_MOES
PRESET,PAPI_L2_TCA,DERIVED_ADD,PNE_K8_IC_REFILL_FROM_L2,PNE_K8_IC_REFILL_FROM_SYSTEM,PNE_K8_DC_REFILL_FROM_L2_MOES,PNE_K8_DC_REFILL_FROM_SYSTEM_MOES
PRESET,PAPI_FML_INS,NOT_DERIVED,PNE_K8_FP_DISPATCHED_FPU_MULS
PRESET,PAPI_FAD_INS,NOT_DERIVED,PNE_K8_FP_DISPATCHED_FPU_ADDS
PRESET,PAPI_FP_OPS,NOT_DERIVED,PNE_K8_FP_DISPATCHED_FPU_ADDS_AND_MULS
PRESET,PAPI_FP_INS,NOT_DERIVED,PNE_K8_FR_RETIRED_FPU_INSTRUCTIONS
PRESET,PAPI_FPU_IDL,NOT_DERIVED,PNE_K8_FP_CYCLES_WITH_NO_FPU_OPS_RETIRED

CPU,INTEL_PIV
PRESET,PAPI_RES_STL,NOT_DERIVED,PNE_P4_RESOURCE_STALL
PRESET,PAPI_TOT_CYC,NOT_DERIVED,PNE_P4_GLOBAL_POWER_EVENTS
PRESET,PAPI_L1_ICM,NOT_DERIVED,PNE_P4_BPU_FETCH_REQUEST
PRESET,PAPI_L1_ICA,NOT_DERIVED,PNE_P4_UOP_QUEUE_WRITES_TC_BUILD_DELIVER
PRESET,PAPI_TLB_DM,NOT_DERIVED,PNE_P4_PAGE_WALK_TYPE_D
PRESET,PAPI_TLB_IM,NOT_DERIVED,PNE_P4_PAGE_WALK_TYPE_I
PRESET,PAPI_TLB_TL,NOT_DERIVED,PNE_P4_PAGE_WALK_TYPE
PRESET,PAPI_TOT_INS,NOT_DERIVED,PNE_P4_INSTR_RETIRED_NON_BOGUS
PRESET,PAPI_BR_INS,NOT_DERIVED,PNE_P4_RETIRED_BRANCH_TYPE
PRESET,PAPI_BR_TKN,NOT_DERIVED,PNE_P4_BRANCH_RETIRED_TAKEN
PRESET,PAPI_BR_NTK,NOT_DERIVED,PNE_P4_BRANCH_RETIRED_NOT_TAKEN
PRESET,PAPI_BR_MSP,NOT_DERIVED,PNE_P4_BRANCH_RETIRED_MISPREDICTED
PRESET,PAPI_BR_PRC,NOT_DERIVED,PNE_P4_BRANCH_RETIRED_PREDICTED
PRESET,PAPI_L2_TCH,NOT_DERIVED,PNE_P4_BSQ_CACHE_REFERENCE_2L_HITS
PRESET,PAPI_L2_TCM,NOT_DERIVED,PNE_P4_BSQ_CACHE_REFERENCE_2L_MISSES
PRESET,PAPI_L2_TCA,NOT_DERIVED,PNE_P4_BSQ_CACHE_REFERENCE_2L_ACCESSES
PRESET,PAPI_L3_TCH,NOT_DERIVED,PNE_P4_BSQ_CACHE_REFERENCE_3L_HITS
PRESET,PAPI_L3_TCM,NOT_DERIVED,PNE_P4_BSQ_CACHE_REFERENCE_3L_MISSES
PRESET,PAPI_L3_TCA,NOT_DERIVED,PNE_P4_BSQ_CACHE_REFERENCE_3L_ACCESSES
PRESET,PAPI_FP_INS,NOT_DERIVED,PNE_P4_X87_FP_UOP

CPU,INTEL_ATOM
PRESET,PAPI_L1_ICM,NOT_DERIVED,PNE_ATOM_L1I_MISSES
PRESET,PAPI_L1_DCA,NOT_DERIVED,PNE_ATOM_L1D_ALL_REF
PRESET,PAPI_L1_ICA,NOT_DERIVED,PNE_ATOM_L1I_READS
PRESET,PAPI_L1_TCA,DERIVED_ADD,PNE_ATOM_L1D_ALL_REF, PNE_ATOM_L1I_READS
PRESET,PAPI_L2_DCA,NOT_DERIVED,PNE_ATOM_L2_RQSTS
PRESET,PAPI_TLB_IM,NOT_DERIVED,PNE_ATOM_ITLB_MISSES
PRESET,PAPI_TLB_DM,NOT_DERIVED,PNE_ATOM_DATA_TLB_MISSES_DTLB_MISS
PRESET,PAPI_BR_INS,NOT_DERIVED,PNE_ATOM_BR_INST_EXEC
PRESET,PAPI_BR_TKN,NOT_DERIVED,PNE_ATOM_BR_INST_RETIRED_TAKEN
PRESET,PAPI_BR_MSP,NOT_DERIVED,PNE_ATOM_BR_MISSP_EXEC
PRESET,PAPI_RES_STL,PNE_ATOM_RESOURCE_STALLS_ANY
PRESET,PAPI_TOT_CYC,PNE_ATOM_CPU_CLK_UNHALTED_BUS
PRESET,PAPI_TOT_INS,PNE_ATOM_INST_RETIRED_ANY_P
PRESET,PAPI_HW_INT,NOT_DERIVED,PNE_ATOM_HW_INT_RCV
PRESET,PAPI_L2_DCH,NOT_DERIVED,PNE_ATOM_L2_LD
PRESET,PAPI_FP_INS,NOT_DERIVED,PNE_ATOM_X87_OPS_RETIRED_ANY
PRESET,PAPI_L1_ICM,NOT_DERIVED,PNE_ATOM_L1I_MISSES
PRESET,PAPI_L2_DCM,NOT_DERIVED,PNE_ATOM_MEM_LOAD_RETIRED_L2_MISS
PRESET,PAPI_TLB_TL,DERIVED_ADD,PNE_ATOM_DTLB_MISSES_ANY, PNE_ATOM_ITLB_MISSES

CPU,INTEL_CORE
PRESET,PAPI_BR_INS,NOT_DERIVED,PNE_CORE_BR_INSTR_RET
PRESET,PAPI_RES_STL,NOT_DERIVED,PNE_CORE_RESOURCE_STALL
PRESET,PAPI_TOT_CYC,NOT_DERIVED,PNE_CORE_UNHALTED_CORE_CYCLES
PRESET,PAPI_TOT_INS,NOT_DERIVED,PNE_CORE_INSTR_RET
PRESET,PAPI_HW_INT,NOT_DERIVED,PNE_CORE_HW_INT_RX
PRESET,PAPI_BR_TKN,NOT_DERIVED,PNE_CORE_BR_INSTR_RET
PRESET,PAPI_BR_MSP,NOT_DERIVED,PNE_CORE_BR_MISSP_EXEC
PRESET,PAPI_TLB_DM,NOT_DERIVED,PNE_CORE_DTLB_MISS
PRESET,PAPI_TLB_IM,NOT_DERIVED,PNE_CORE_ITLB_MISSES
PRESET,PAPI_TLB_TL,DERIVED_ADD,PNE_CORE_DTLB_MISS, PNE_CORE_ITLB_MISSES
PRESET,PAPI_L2_DCH,NOT_DERIVED,PNE_CORE_L2_LD

CPU,INTEL_CORE2
PRESET,PAPI_BR_INS,NOT_DERIVED,PNE_CORE2_BR_INST_RETIRED_ANY
PRESET,PAPI_RES_STL,NOT_DERIVED,PNE_CORE2_RESOURCE_STALLS_ANY
PRESET,PAPI_TOT_CYC,NOT_DERIVED,PNE_CORE2_CPU_CLK_UNHALTED_BUS
PRESET,PAPI_TOT_INS,NOT_DERIVED,PNE_CORE2_INST_RETIRED_ANY_P
PRESET,PAPI_HW_INT,NOT_DERIVED,PNE_CORE2_HW_INT_RCV
PRESET,PAPI_BR_TKN,NOT_DERIVED,PNE_CORE2_BR_INST_RETIRED_TAKEN
PRESET,PAPI_BR_MSP,NOT_DERIVED,PNE_CORE2_BR_MISSP_EXEC
PRESET,PAPI_TLB_DM,NOT_DERIVED,PNE_CORE2_DTLB_MISSES_ANY
PRESET,PAPI_TLB_IM,NOT_DERIVED,PNE_CORE2_ITLB_MISSES
PRESET,PAPI_TLB_TL,DERIVED_ADD,PNE_CORE2_DTLB_MISSES_ANY, PNE_CORE2_ITLB_MISSES
PRESET,PAPI_L1_DCA,NOT_DERIVED,PNE_CORE2_L1D_ALL_REF
PRESET,PAPI_L1_ICA,NOT_DERIVED,PNE_CORE2_L1I_READS
PRESET,PAPI_L1_TCA,DERIVED_ADD,PNE_CORE2_L1D_ALL_REF, PNE_CORE2_L1I_READS
#  PAPI_L2_ICH seems not to work
PRESET,PAPI_L2_ICH,NOT_DERIVED,PNE_CORE2_L2_IFETCH
PRESET,PAPI_L2_DCH,NOT_DERIVED,PNE_CORE2_L2_LD
PRESET,PAPI_FP_INS,NOT_DERIVED,PNE_CORE2_X87_OPS_RETIRED_ANY
PRESET,PAPI_L1_DCM,NOT_DERIVED,PNE_CORE2_MEM_LOAD_RETIRED_L1D_MISS
PRESET,PAPI_L1_ICM,NOT_DERIVED,PNE_CORE2_L1I_MISSES
PRESET,PAPI_L1_TCM,DERIVED_ADD,PNE_CORE2_MEM_LOAD_RETIRED_L1D_MISS, PNE_CORE2_L1I_MISSES
PRESET,PAPI_L2_DCM,NOT_DERIVED,PNE_CORE2_MEM_LOAD_RETIRED_L2_MISS

CPU,INTEL_CORE2EXTREME
PRESET,PAPI_BR_INS,NOT_DERIVED,PNE_CORE2EXTREME_BR_INST_RETIRED_ANY
PRESET,PAPI_RES_STL,NOT_DERIVED,PNE_CORE2EXTREME_RESOURCE_STALLS_ANY
PRESET,PAPI_TOT_CYC,NOT_DERIVED,PNE_CORE2EXTREME_CPU_CLK_UNHALTED_BUS
PRESET,PAPI_TOT_INS,NOT_DERIVED,PNE_CORE2EXTREME_INST_RETIRED_ANY_P
PRESET,PAPI_HW_INT,NOT_DERIVED,PNE_CORE2EXTREME_HW_INT_RCV
PRESET,PAPI_BR_TKN,NOT_DERIVED,PNE_CORE2EXTREME_BR_INST_RETIRED_TAKEN
PRESET,PAPI_BR_MSP,NOT_DERIVED,PNE_CORE2EXTREME_BR_MISSP_EXEC
PRESET,PAPI_TLB_DM,NOT_DERIVED,PNE_CORE2EXTREME_DTLB_MISSES_ANY
PRESET,PAPI_TLB_IM,NOT_DERIVED,PNE_CORE2EXTREME_ITLB_MISSES
PRESET,PAPI_TLB_TL,DERIVED_ADD,PNE_CORE2EXTREME_DTLB_MISSES_ANY, PNE_CORE2EXTREME_ITLB_MISSES
PRESET,PAPI_L1_DCA,NOT_DERIVED,PNE_CORE2EXTREME_L1D_ALL_REF
PRESET,PAPI_L1_ICA,NOT_DERIVED,PNE_CORE2EXTREME_L1I_READS
PRESET,PAPI_L1_TCA, DERIVED_ADD, PNE_CORE2EXTREME_L1D_ALL_REF, PNE_CORE2EXTREME_L1I_READS
# PAPI_L2_ICH seems not to work
PRESET,PAPI_L2_ICH,NOT_DERIVED,PNE_CORE2EXTREME_L2_IFETCH
PRESET,PAPI_L2_DCH,NOT_DERIVED,PNE_CORE2EXTREME_L2_LD
PRESET,PAPI_FP_INS,NOT_DERIVED,PNE_CORE2EXTREME_X87_OPS_RETIRED_ANY
PRESET,PAPI_L1_DCM,NOT_DERIVED,PNE_CORE2EXTREME_MEM_LOAD_RETIRED_L1D_MISS
PRESET,PAPI_L1_ICM,NOT_DERIVED,PNE_CORE2EXTREME_L1I_MISSES
PRESET,PAPI_L1_TCM,DERIVED_ADD,PNE_CORE2EXTREME_MEM_LOAD_RETIRED_L1D_MISS, PNE_CORE2EXTREME_L1I_MISSES
PRESET,PAPI_L2_DCM,NOT_DERIVED,PNE_CORE2EXTREME_MEM_LOAD_RETIRED_L2_MISS

CPU,INTELCOREI7
PRESET,PAPI_BR_INS,NOT_DERIVED,PNE_I7_BR_INST_RETIRED_ALL_BRANCHES
PRESET,PAPI_RES_STL,NOT_DERIVED,PNE_I7_RESOURCE_STALLS_ANY
PRESET,PAPI_TOT_CYC,NOT_DERIVED,PNE_I7_CPU_CLK_UNHALTED_CORE
PRESET,PAPI_TOT_INS,NOT_DERIVED,PNE_I7_INSTR_RETIRED_ANY
PRESET,PAPI_HW_INT,NOT_DERIVED,PNE_I7_HW_INT_RCV
PRESET,PAPI_BR_TKN,NOT_DERIVED,PNE_I7_BR_MISP_EXEC_TAKEN
PRESET,PAPI_BR_MSP,NOT_DERIVED,PNE_I7_BR_MISP_EXEC_ANY
PRESET,PAPI_TLB_DM,NOT_DERIVED,PNE_I7_DTLB_MISSES_ANY
PRESET,PAPI_TLB_IM,NOT_DERIVED,PNE_I7_ITLB_MISSES_ANY
PRESET,PAPI_TLB_TL,DERIVED_ADD,PNE_I7_DTLB_MISSES_ANY, PNE_I7_ITLB_MISSES_ANY
PRESET,PAPI_L1_DCA,NOT_DERIVED,PNE_I7_L1D_ALL_REF_ANY
PRESET,PAPI_L1_ICA,NOT_DERIVED,PNE_I7_L1I_READS
PRESET,PAPI_L1_TCA, DERIVED_ADD, PNE_I7_L1D_ALL_REF_ANY, PNE_I7_L1I_READS
# PAPI_L2_ICH seems not to work
PRESET,PAPI_L2_ICH,NOT_DERIVED,PNE_I7_L2_IFETCH
PRESET,PAPI_L2_DCH,NOT_DERIVED,PNE_I7_MEM_LOAD_RETIRED_L2_HIT
PRESET,PAPI_FP_INS,NOT_DERIVED,PNE_I7_INST_RETIRED_X87
PRESET,PAPI_L1_DCM,NOT_DERIVED,PNE_I7_L1D_PREFETCH_MISS
PRESET,PAPI_L1_ICM,NOT_DERIVED,PNE_I7_L1I_MISSES
PRESET,PAPI_L1_TCM,DERIVED_ADD,PNE_I7_L1D_PREFETCH_MISS, PNE_I7_L1I_MISSES
PRESET,PAPI_L2_DCM,NOT_DERIVED,PNE_I7_L2_RQSTS_MISS

CPU,INTEL_WESTMERE
PRESET,PAPI_BR_INS,NOT_DERIVED,PNE_WESTMERE_BR_INST_RETIRED_ALL_BRANCHES
PRESET,PAPI_RES_STL,NOT_DERIVED,PNE_WESTMERE_RESOURCE_STALLS_ANY
PRESET,PAPI_TOT_CYC,NOT_DERIVED,PNE_WESTMERE_CPU_CLK_UNHALTED_CORE
PRESET,PAPI_TOT_INS,NOT_DERIVED,PNE_WESTMERE_INSTR_RETIRED_ANY
PRESET,PAPI_BR_TKN,NOT_DERIVED,PNE_WESTMERE_BR_MISP_EXEC_TAKEN
PRESET,PAPI_BR_MSP,NOT_DERIVED,PNE_WESTMERE_BR_MISP_EXEC_ANY
PRESET,PAPI_TLB_DM,NOT_DERIVED,PNE_WESTMERE_DTLB_MISSES_ANY
PRESET,PAPI_TLB_IM,NOT_DERIVED,PNE_WESTMERE_ITLB_MISSES_ANY
PRESET,PAPI_TLB_TL,DERIVED_ADD,PNE_WESTMERE_DTLB_MISSES_ANY, PNE_WESTMERE_ITLB_MISSES_ANY
PRESET,PAPI_L1_ICA,NOT_DERIVED,PNE_WESTMERE_L1I_READS
# PAPI_L2_ICH seems not to work
PRESET,PAPI_L2_ICH,NOT_DERIVED,PNE_WESTMERE_L2_IFETCH
PRESET,PAPI_L2_DCH,NOT_DERIVED,PNE_WESTMERE_MEM_LOAD_RETIRED_L2_HIT
PRESET,PAPI_FP_INS,NOT_DERIVED,PNE_WESTMERE_INST_RETIRED_X87
PRESET,PAPI_L1_DCM,NOT_DERIVED,PNE_WESTMERE_L1D_PREFETCH_MISS
PRESET,PAPI_L1_ICM,NOT_DERIVED,PNE_WESTMERE_L1I_MISSES
PRESET,PAPI_L1_TCM, DERIVED_ADD, PNE_WESTMERE_L1D_PREFETCH_MISS, PNE_WESTMERE_L1I_MISSES
PRESET,PAPI_L2_DCM,NOT_DERIVED,PNE_WESTMERE_L2_RQSTS_MISS



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