<commit_before>/*
 * Copyright (C) 2014 <NAME>ität Berlin
 * Copyright (C) 2015 PHYTEC Messtechnik GmbH
 *
 * This file is subject to the terms and conditions of the GNU Lesser General
 * Public License v2.1. See the file LICENSE in the top level directory for more
 * details.
 */

/**
 * @ingroup     board_frdm-k64f
 * @{
 *
 * @file
 * @name        Peripheral MCU configuration for the FRDM-K64F
 *
 * @author      <NAME> <<EMAIL>>
 */

#ifndef PERIPH_CONF_H
#define PERIPH_CONF_H

#include "cpu_conf.h"

#ifdef __cplusplus
extern "C"
{
#endif

/**
 * @name Clock system configuration
 * @{
 */
#define KINETIS_CPU_USE_MCG          1

#define KINETIS_MCG_USE_ERC          1
#define KINETIS_MCG_USE_PLL          1
#define KINETIS_MCG_DCO_RANGE        (24000000U)
#define KINETIS_MCG_ERC_OSCILLATOR   0
#define KINETIS_MCG_ERC_FRDIV        6           /* ERC devider = 1280 */
#define KINETIS_MCG_ERC_RANGE        2
#define KINETIS_MCG_ERC_FREQ         50000000
#define KINETIS_MCG_PLL_PRDIV        19          /* divide factor = 20 */
#define KINETIS_MCG_PLL_VDIV0        0           /* multiply factor = 24 */
#define KINETIS_MCG_PLL_FREQ         60000000

#define CLOCK_CORECLOCK              KINETIS_MCG_PLL_FREQ
/** @} */


/**
 * @name Timer configuration
 * @{
 */
#define TIMER_NUMOF                  (1U)
#define TIMER_0_EN                   1
#define TIMER_1_EN                   0
#define TIMER_IRQ_PRIO               1
#define TIMER_BASE                   PIT
#define TIMER_MAX_VALUE              (0xffffffff)
#define TIMER_CLOCK                  CLOCK_CORECLOCK
#define TIMER_CLKEN()                (SIM->SCGC6 |= (SIM_SCGC6_PIT_MASK))

/* Timer 0 configuration */
#define TIMER_0_PRESCALER_CH         0
#define TIMER_0_COUNTER_CH           1
#define TIMER_0_ISR                  isr_pit1
#define TIMER_0_IRQ_CHAN             PIT1_IRQn

/* Timer 1 configuration */
#define TIMER_1_PRESCALER_CH         2
#define TIMER_1_COUNTER_CH           3
#define TIMER_1_ISR                  isr_pit3
#define TIMER_1_IRQ_CHAN             PIT3_IRQn
/** @} */

/**
* @name UART configuration
* @{
*/
#define UART_NUMOF                   (1U)
#define UART_0_EN                    1
#define UART_IRQ_PRIO                1
#define UART_CLK                     CLOCK_CORECLOCK

/* UART 0 device configuration */
#define KINETIS_UART                 UART_Type
#define UART_0_DEV                   UART0
#define UART_0_CLKEN()               (SIM->SCGC4 |= (SIM_SCGC4_UART0_MASK))
#define UART_0_CLK                   UART_CLK
#define UART_0_IRQ_CHAN              UART0_RX_TX_IRQn
#define UART_0_ISR                   isr_uart0_rx_tx
/* UART 0 pin configuration */
#define UART_0_PORT_CLKEN()          (SIM->SCGC5 |= (SIM_SCGC5_PORTB_MASK))
#define UART_0_PORT                  PORTB
#define UART_0_RX_PIN                16
#define UART_0_TX_PIN                17
#define UART_0_AF                    3
/** @} */

/**
 * @name ADC configuration
 * @{
 */
#define ADC_NUMOF                    (1U)
#define ADC_0_EN                     1
#define ADC_MAX_CHANNELS             6

/* ADC 0 configuration */
#define ADC_0_DEV                    ADC1
#define ADC_0_MODULE_CLOCK           CLOCK_CORECLOCK
#define ADC_0_CHANNELS               6
#define ADC_0_CLKEN()                (SIM->SCGC3 |= (SIM_SCGC3_ADC1_MASK))
#define ADC_0_CLKDIS()               (SIM->SCGC3 &= ~(SIM_SCGC3_ADC1_MASK))
#define ADC_0_PORT_CLKEN()           (SIM->SCGC5 |= (SIM_SCGC5_PORTB_MASK | SIM_SCGC5_PORTC_MASK))
/* ADC 0 channel 0 pin config */
#define ADC_0_CH0_PORT               PORTB
#define ADC_0_CH0_PIN                10
#define ADC_0_CH0_PIN_AF             0
#define ADC_0_CH0                    14
/* ADC 0 channel 1 pin config */
#define ADC_0_CH1_PORT               PORTB
#define ADC_0_CH1_PIN                11
#define ADC_0_CH1_PIN_AF             0
#define ADC_0_CH1                    15
/* ADC 0 channel 2 pin config */
#define ADC_0_CH2_PORT               PORTC
#define ADC_0_CH2_PIN                11
#define ADC_0_CH2_PIN_AF             0
#define ADC_0_CH2                    7
/* ADC 0 channel 3 pin config */
#define ADC_0_CH3_PORT               PORTC
#define ADC_0_CH3_PIN                10
#define ADC_0_CH3_PIN_AF             0
#define ADC_0_CH3                    6
/* ADC 0 channel 4 pin config */
#define ADC_0_CH4_PORT               PORTC
#define ADC_0_CH4_PIN                8
#define ADC_0_CH4_PIN_AF             0
#define ADC_0_CH4                    4
/* ADC 0 channel 5 pin config */
#define ADC_0_CH5_PORT               PORTC
#define ADC_0_CH5_PIN                9
#define ADC_0_CH5_PIN_AF             0
#define ADC_0_CH5                    5
/** @} */

/**
* @name PWM configuration
* @{
*/
#define PWM_NUMOF                    (1U)
#define PWM_0_EN                     1
#define PWM_MAX_CHANNELS             8
#define PWM_MAX_VALUE                0xffff

/* PWM 0 device configuration */
#define PWM_0_DEV                    FTM0
#define PWM_0_CHANNELS               4
#define PWM_0_CLK                    CLOCK_CORECLOCK
#define PWM_0_CLKEN()                (SIM->SCGC6 |= (SIM_SCGC6_FTM0_MASK))
#define PWM_0_CLKDIS()               (SIM->SCGC6 &= ~(SIM_SCGC6_FTM0_MASK))
/* PWM 0 pin configuration */
#define PWM_0_PORT_CLKEN()           (SIM->SCGC5 |= (SIM_SCGC5_PORTA_MASK | SIM_SCGC5_PORTC_MASK))
/* Arduino Connector D3 */
#define PWM_0_PORT_CH0               PORTA
#define PWM_0_PIN_CH0                1
#define PWM_0_FTMCHAN_CH0            6
#define PWM_0_PIN_AF_CH0             3
/* Arduino Connector D5 */
#define PWM_0_PORT_CH1               PORTA
#define PWM_0_PIN_CH1                2
#define PWM_0_FTMCHAN_CH1            7
#define PWM_0_PIN_AF_CH1             3
/* Arduino Connector D6 */<commit_msg>boards/frdm-k64f: updated ADC configuration<commit_after>/*
 * Copyright (C) 2014 <NAME>
 * Copyright (C) 2015 PHYTEC Messtechnik GmbH
 *
 * This file is subject to the terms and conditions of the GNU Lesser General
 * Public License v2.1. See the file LICENSE in the top level directory for more
 * details.
 */

/**
 * @ingroup     board_frdm-k64f
 * @{
 *
 * @file
 * @name        Peripheral MCU configuration for the FRDM-K64F
 *
 * @author      <NAME> <<EMAIL>>
 */

#ifndef PERIPH_CONF_H
#define PERIPH_CONF_H

#include "periph_cpu.h"

#ifdef __cplusplus
extern "C"
{
#endif

/**
 * @name Clock system configuration
 * @{
 */
#define KINETIS_CPU_USE_MCG          1

#define KINETIS_MCG_USE_ERC          1
#define KINETIS_MCG_USE_PLL          1
#define KINETIS_MCG_DCO_RANGE        (24000000U)
#define KINETIS_MCG_ERC_OSCILLATOR   0
#define KINETIS_MCG_ERC_FRDIV        6           /* ERC devider = 1280 */
#define KINETIS_MCG_ERC_RANGE        2
#define KINETIS_MCG_ERC_FREQ         50000000
#define KINETIS_MCG_PLL_PRDIV        19          /* divide factor = 20 */
#define KINETIS_MCG_PLL_VDIV0        0           /* multiply factor = 24 */
#define KINETIS_MCG_PLL_FREQ         60000000

#define CLOCK_CORECLOCK              KINETIS_MCG_PLL_FREQ
#define CLOCK_BUSCLOCK               (CLOCK_CORECLOCK / 2)
/** @} */


/**
 * @name Timer configuration
 * @{
 */
#define TIMER_NUMOF                  (1U)
#define TIMER_0_EN                   1
#define TIMER_1_EN                   0
#define TIMER_IRQ_PRIO               1
#define TIMER_BASE                   PIT
#define TIMER_MAX_VALUE              (0xffffffff)
#define TIMER_CLOCK                  CLOCK_CORECLOCK
#define TIMER_CLKEN()                (SIM->SCGC6 |= (SIM_SCGC6_PIT_MASK))

/* Timer 0 configuration */
#define TIMER_0_PRESCALER_CH         0
#define TIMER_0_COUNTER_CH           1
#define TIMER_0_ISR                  isr_pit1
#define TIMER_0_IRQ_CHAN             PIT1_IRQn

/* Timer 1 configuration */
#define TIMER_1_PRESCALER_CH         2
#define TIMER_1_COUNTER_CH           3
#define TIMER_1_ISR                  isr_pit3
#define TIMER_1_IRQ_CHAN             PIT3_IRQn
/** @} */

/**
* @name UART configuration
* @{
*/
#define UART_NUMOF                   (1U)
#define UART_0_EN                    1
#define UART_IRQ_PRIO                1
#define UART_CLK                     CLOCK_CORECLOCK

/* UART 0 device configuration */
#define KINETIS_UART                 UART_Type
#define UART_0_DEV                   UART0
#define UART_0_CLKEN()               (SIM->SCGC4 |= (SIM_SCGC4_UART0_MASK))
#define UART_0_CLK                   UART_CLK
#define UART_0_IRQ_CHAN              UART0_RX_TX_IRQn
#define UART_0_ISR                   isr_uart0_rx_tx
/* UART 0 pin configuration */
#define UART_0_PORT_CLKEN()          (SIM->SCGC5 |= (SIM_SCGC5_PORTB_MASK))
#define UART_0_PORT                  PORTB
#define UART_0_RX_PIN                16
#define UART_0_TX_PIN                17
#define UART_0_AF                    3
/** @} */

/**
 * @name ADC configuration
 * @{
 */
static const adc_conf_t adc_config[] = {
    /* dev, pin, channel */
    { ADC0, GPIO_PIN(PORT_B, 10), 14 },
    { ADC0, GPIO_PIN(PORT_B, 11), 15 },
    { ADC0, GPIO_PIN(PORT_C, 11), 7 },
    { ADC0, GPIO_PIN(PORT_C, 10), 6 },
    { ADC0, GPIO_PIN(PORT_C, 8), 4 },
    { ADC0, GPIO_PIN(PORT_C, 9), 5 },
};

#define ADC_NUMOF           (sizeof(adc_config) / sizeof(adc_config[0]))
/** @} */

/**
* @name PWM configuration
* @{
*/
#define PWM_NUMOF                    (1U)
#define PWM_0_EN                     1
#define PWM_MAX_CHANNELS             8
#define PWM_MAX_VALUE                0xffff

/* PWM 0 device configuration */
#define PWM_0_DEV                    FTM0
#define PWM_0_CHANNELS               4
#define PWM_0_CLK                    CLOCK_CORECLOCK
#define PWM_0_CLKEN()                (SIM->SCGC6 |= (SIM_SCGC6_FTM0_MASK))
#define PWM_0_CLKDIS()               (SIM->SCGC6 &= ~(SIM_SCGC6_FTM0_MASK))
/* PWM 0 pin configuration */
#define PWM_0_PORT_CLKEN()           (SIM->SCGC5 |= (SIM_SCGC5_PORTA_MASK | SIM_SCGC5_PORTC_MASK))
/* Arduino Connector D3 */
#define PWM_0_PORT_CH0               PORTA
#define PWM_0_PIN_CH0                1
#define PWM_0_FTMCHAN_CH0            6
#define PWM_0_PIN_AF_CH0             3
/* Arduino Connector D5 */
#define PWM_0_PORT_CH1               PORTA
#define PWM_0_PIN_CH1                2
#define PWM_0_FTMCHAN_CH1            7
#define PWM_0_PIN_AF_CH1             3
/* Arduino Connector D6 */
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