<commit_before># Xilinx WebPack modelsim script
#
# cd C:/workspace/zpu/zpu/hdl/example_medium
# do gmzpu.do

#set BreakOnAssertion 1

vlib gmzpu
vcom -work gmzpu ../zwishbone_pkg.vhdl
vcom -work gmzpu ../zwishbone2.vhdl

vlib work
vcom -work work zwishbone_controller_tb.vhdl

# run tb
vsim zwishbone_controller_TB

view wave

do wave/wave_zwishbone_controller.do
#add wave -recursive *

#view structure
#view signals

run -all

#exit<commit_msg>zwc: fix zwishbone source file name in sim<commit_after># Xilinx WebPack modelsim script
#
# cd C:/workspace/zpu/zpu/hdl/example_medium
# do gmzpu.do

#set BreakOnAssertion 1

vlib gmzpu
vcom -work gmzpu ../zwishbone_pkg.vhdl
vcom -work gmzpu ../zwishbone.vhdl

vlib work
vcom -work work zwishbone_controller_tb.vhdl

# run tb
vsim zwishbone_controller_TB

view wave

do wave/wave_zwishbone_controller.do
#add wave -recursive *

#view structure
#view signals

run -all

#exit
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{'dir': 'git-commits-cleaned', 'id': '1449528', 'n_tokens_mistral': 389, 'n_tokens_neox': 370, 'n_words': 98}