<commit_before>// vim : set fileencoding=utf-8 expandtab noai ts=4 sw=4 :
/// @addtogroup ahbmem
/// @{
/// @file ahbmem.cpp
///
/// @date 2010-2014
/// @copyright All rights reserved.
///            Any reproduction, use, distribution or disclosure of this
///            program, without the express, prior written consent of the
///            authors is strictly prohibited.
/// @author <NAME>
///
/// Provide a test bench memory class with AHB slave interface. DMI and
/// streaming width fields are ignored. Delays are not modeled. Address checking
/// is performed in that way, that transactions are only executed if the slave
/// select condition defined in grlib user manual holds. Transactions generating
/// a correct slave select but exceeding the memory region due to their length
/// are reported as warning and executed anyhow.

#include <fstream>

#include "models/ahbmem/ahbmem.h"
#include "common/report.h"
#include "common/verbose.h"

/// Constructor
AHBMem::AHBMem(const sc_core::sc_module_name nm,  // Module name
  uint16_t haddr,                                 // AMBA AHB address (12 bit)
  uint16_t hmask,                                 // AMBA AHB address mask (12 bit)
  amba::amba_layer_ids ambaLayer,                 // abstraction layer
  uint32_t hindex,
  bool cacheable,
  uint32_t wait_states,
  bool pow_mon) :
    AHBSlave<>(nm,
      hindex,
      0x01,                                       // Gaisler
      0x00E,                                      // AHB Mem,
      0,
      0,
      ambaLayer,
      BAR(AHBDevice::AHBMEM, hmask, cacheable, 0, haddr)),
    BaseMemory(BaseMemory::ARRAY, get_size()),
    ahbBaseAddress(static_cast<uint32_t>((hmask) & haddr) << 20),
    ahbSize(~(static_cast<uint32_t>(hmask) << 20) + 1),
    g_conf("conf"),
    g_haddr("haddr", haddr, g_conf),
    g_hmask("hmask", hmask, g_conf),
    g_hindex("hindex", hindex, g_conf),
    g_cacheable("cacheable", cacheable, g_conf),
    g_wait_states("wait_states", wait_states, g_conf),
    g_pow_mon("pow_mon", pow_mon, g_conf),
    sta_power_norm("power.ahbmem.sta_power_norm", 1269.53125, true),                  // Normalized static power input
    int_power_norm("power.ahbmem.int_power_norm", 1.61011e-12, true),                 // Normalized internal power input
    dyn_read_energy_norm("power.ahbmem.dyn_read_energy_norm", 7.57408e-13, true),     // Normalized read energy input
    dyn_write_energy_norm("power.ahbmem.dyn_write_energy_norm", 7.57408e-13, true),   // Normalized write energy iput
    power("power"),
    sta_power("sta_power", 0.0, power),           // Static power output
    int_power("int_power", 0.0, power),           // Internal power of module (dyn. switching independent)
    swi_power("swi_power", 0.0, power),           // Switching power of modules
    power_frame_starting_time("power_frame_starting_time", SC_ZERO_TIME, power),
    dyn_read_energy("dyn_read_energy", 0.0, power),             // Energy per read access
    dyn_write_energy("dyn_write_energy", 0.0, power),           // Energy per write access
    dyn_reads("dyn_reads", 0ull, power),            // Read access counter for power computation
    dyn_writes("dyn_writes", 0ull, power) {         // Write access counter for power computation
  // haddr and hmask must be 12 bit
  assert(!((g_haddr | g_hmask) >> 12));

  // Register power callback functions
  if (g_pow_mon) {
    GC_REGISTER_TYPED_PARAM_CALLBACK(&sta_power, gs::cnf::pre_read, AHBMem, sta_power_cb);
    GC_REGISTER_TYPED_PARAM_CALLBACK(&int_power, gs::cnf::pre_read, AHBMem, int_power_cb);
    GC_REGISTER_TYPED_PARAM_CALLBACK(&swi_power, gs::cnf::pre_read, AHBMem, swi_power_cb);
  }

  // Display AHB slave information<commit_msg>AHBMem: Adding init_generics to the constructor<commit_after>// vim : set fileencoding=utf-8 expandtab noai ts=4 sw=4 :
/// @addtogroup ahbmem
/// @{
/// @file ahbmem.cpp
///
/// @date 2010-2014
/// @copyright All rights reserved.
///            Any reproduction, use, distribution or disclosure of this
///            program, without the express, prior written consent of the
///            authors is strictly prohibited.
/// @author <NAME>
///
/// Provide a test bench memory class with AHB slave interface. DMI and
/// streaming width fields are ignored. Delays are not modeled. Address checking
/// is performed in that way, that transactions are only executed if the slave
/// select condition defined in grlib user manual holds. Transactions generating
/// a correct slave select but exceeding the memory region due to their length
/// are reported as warning and executed anyhow.

#include <fstream>

#include "models/ahbmem/ahbmem.h"
#include "common/report.h"
#include "common/verbose.h"

/// Constructor
AHBMem::AHBMem(const sc_core::sc_module_name nm,  // Module name
  uint16_t haddr,                                 // AMBA AHB address (12 bit)
  uint16_t hmask,                                 // AMBA AHB address mask (12 bit)
  amba::amba_layer_ids ambaLayer,                 // abstraction layer
  uint32_t hindex,
  bool cacheable,
  uint32_t wait_states,
  bool pow_mon) :
    AHBSlave<>(nm,
      hindex,
      0x01,                                       // Gaisler
      0x00E,                                      // AHB Mem,
      0,
      0,
      ambaLayer,
      BAR(AHBDevice::AHBMEM, hmask, cacheable, 0, haddr)),
    BaseMemory(BaseMemory::ARRAY, get_size()),
    ahbBaseAddress(static_cast<uint32_t>((hmask) & haddr) << 20),
    ahbSize(~(static_cast<uint32_t>(hmask) << 20) + 1),
    g_conf("conf"),
    g_haddr("haddr", haddr, g_conf),
    g_hmask("hmask", hmask, g_conf),
    g_hindex("hindex", hindex, g_conf),
    g_cacheable("cacheable", cacheable, g_conf),
    g_wait_states("wait_states", wait_states, g_conf),
    g_pow_mon("pow_mon", pow_mon, g_conf),
    sta_power_norm("power.ahbmem.sta_power_norm", 1269.53125, true),                  // Normalized static power input
    int_power_norm("power.ahbmem.int_power_norm", 1.61011e-12, true),                 // Normalized internal power input
    dyn_read_energy_norm("power.ahbmem.dyn_read_energy_norm", 7.57408e-13, true),     // Normalized read energy input
    dyn_write_energy_norm("power.ahbmem.dyn_write_energy_norm", 7.57408e-13, true),   // Normalized write energy iput
    power("power"),
    sta_power("sta_power", 0.0, power),           // Static power output
    int_power("int_power", 0.0, power),           // Internal power of module (dyn. switching independent)
    swi_power("swi_power", 0.0, power),           // Switching power of modules
    power_frame_starting_time("power_frame_starting_time", SC_ZERO_TIME, power),
    dyn_read_energy("dyn_read_energy", 0.0, power),             // Energy per read access
    dyn_write_energy("dyn_write_energy", 0.0, power),           // Energy per write access
    dyn_reads("dyn_reads", 0ull, power),            // Read access counter for power computation
    dyn_writes("dyn_writes", 0ull, power) {         // Write access counter for power computation
  init_generics();
  // haddr and hmask must be 12 bit
  assert(!((g_haddr | g_hmask) >> 12));

  // Register power callback functions
  if (g_pow_mon) {
    GC_REGISTER_TYPED_PARAM_CALLBACK(&sta_power, gs::cnf::pre_read, AHBMem, sta_power_cb);
    GC_REGISTER_TYPED_PARAM_CALLBACK(&int_power, gs::cnf::pre_read, AHBMem, int_power_cb);
    GC_REGISTER_TYPED_PARAM_CALLBACK(&swi_power, gs::cnf::pre_read, AHBMem, swi_power_cb);
  }

  // Display AHB slave information
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