<commit_before><!-- IBM_PROLOG_BEGIN_TAG                                                   -->
<!-- This is an automatically generated prolog.                             -->
<!--                                                                        -->
<!-- $Source: src/import/chips/p9/procedures/xml/error_info/p9_build_smp_errors.xml $ -->
<!--                                                                        -->
<!-- OpenPOWER HostBoot Project                                             -->
<!--                                                                        -->
<!-- Contributors Listed Below - COPYRIGHT 2015,2019                        -->
<!-- [+] International Business Machines Corp.                              -->
<!--                                                                        -->
<!--                                                                        -->
<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
<!-- you may not use this file except in compliance with the License.       -->
<!-- You may obtain a copy of the License at                                -->
<!--                                                                        -->
<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
<!--                                                                        -->
<!-- Unless required by applicable law or agreed to in writing, software    -->
<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
<!-- implied. See the License for the specific language governing           -->
<!-- permissions and limitations under the License.                         -->
<!--                                                                        -->
<!-- IBM_PROLOG_END_TAG                                                     -->
<!-- Error definitions for p9_build_smp HWP -->
<hwpErrors>
  <!-- ******************************************************************** -->
  <hwpError>
    <rc>RC_P9_BUILD_SMP_MASTER_DESIGNATION_ERR</rc>
    <description>Node or system master chip designation error.</description>
    <ffdc>TARGET</ffdc>
    <ffdc>OP</ffdc>
    <ffdc>MASTER_CHIP_SYS_CURR</ffdc>
    <ffdc>MASTER_CHIP_GROUP_CURR</ffdc>
    <ffdc>MASTER_CHIP_SYS_NEXT</ffdc>
    <ffdc>MASTER_CHIP_GROUP_NEXT</ffdc>
    <callout>
      <procedure>CODE</procedure>
      <priority>HIGH</priority>
    </callout>
  </hwpError>
  <!-- ******************************************************************** -->
  <hwpError>
    <rc>RC_P9_BUILD_SMP_GROUP_ADD_INTERNAL_ERR</rc>
    <description>Internal Error.  Error encountered adding node to SMP structure.</description>
    <ffdc>TARGET</ffdc>
    <ffdc>GROUP_ID</ffdc>
    <callout>
      <procedure>CODE</procedure>
      <priority>HIGH</priority>
    </callout>
  </hwpError>
  <!-- ******************************************************************** -->
  <hwpError>
    <rc>RC_P9_BUILD_SMP_DUPLICATE_FABRIC_ID_ERR</rc>
    <description>Multiple chips found with identifcal fabric node/chip ID attribute values.</description>
    <ffdc>TARGET1</ffdc>
    <ffdc>TARGET2</ffdc>
    <ffdc>GROUP_ID</ffdc>
    <ffdc>CHIP_ID</ffdc>
    <callout>
      <procedure>CODE</procedure>
      <priority>HIGH</priority>
    </callout>
  </hwpError>
  <!-- ******************************************************************** -->
  <hwpError>
    <rc>RC_P9_BUILD_SMP_MULTIPLE_MASTER_DESIGNATION_ERR</rc>
    <description>Input parameter designating master matches more than one chip in HWP input targets.</description>
    <ffdc>TARGET</ffdc>
    <ffdc>OP</ffdc>
    <callout>
      <procedure>CODE</procedure>
      <priority>HIGH</priority>
    </callout>
  </hwpError>
  <!-- ******************************************************************** -->
  <hwpError>
    <rc>RC_P9_BUILD_SMP_NO_MASTER_SPECIFIED_ERR</rc>
    <description>Input parameters do not specify a new fabric system master.</description>
    <ffdc>OP</ffdc>
    <callout>
      <procedure>CODE</procedure>
      <priority>HIGH</priority>
    </callout>
  </hwpError>
  <!-- ******************************************************************** -->
  <hwpError>
    <rc>RC_P9_BUILD_SMP_INVALID_TOPOLOGY</rc>
    <description>Invalid fabric topology specified by input parameters.</description>
    <ffdc>TARGET</ffdc>
    <ffdc>A_CONNECTIONS_OK</ffdc>
    <ffdc>A_CONNECTED_GROUP_IDS</ffdc>
    <ffdc>X_CONNECTIONS_OK</ffdc>
    <ffdc>X_CONNECTED_CHIP_IDS</ffdc>
    <callout>
      <procedure>CODE</procedure>
      <priority>HIGH</priority>
    </callout>
  </hwpError>
  <!-- ******************************************************************** -->
  <hwpError>
    <rc>RC_P9_BUILD_SMP_HOTPLUG_SHADOW_ERR</rc>
    <description>Inconsistent state in hotplug (CURR) shadow copies.</description>
    <ffdc>TARGET</ffdc>
    <ffdc>ADDRESS0</ffdc>
    <ffdc>ADDRESS1</ffdc>
    <ffdc>DATA0</ffdc>
    <ffdc>DATA1</ffdc>
    <callout>
      <procedure>CODE</procedure>
      <priority>HIGH</priority>
    </callout>
  </hwpError>
  <!-- ******************************************************************** -->
  <hwpError>
    <rc>RC_P9_BUILD_SMP_BAD_ADU_ACTION_ERR</rc>
    <description>Invalid ADU action specified.</description>
    <ffdc>OP</ffdc>
    <ffdc>ACTION</ffdc>
    <callout>
      <procedure>CODE</procedure>
      <priority>HIGH</priority>
    </callout>
  </hwpError>
  <!-- ******************************************************************** -->
  <hwpError>
    <rc>RC_P9_BUILD_SMP_ADU_STATUS_MISMATCH_ERR</rc>
    <description>Status mismatch detected on ADU operation execution for SMP configuration.</description>
    <ffdc>TARGET</ffdc>
    <ffdc>ADU_NUM_POLLS</ffdc>
    <ffdc>NUM_CHIPS</ffdc>
    <ffdc>GROUP_IDS</ffdc>
    <ffdc>CHIP_IDS</ffdc>
    <ffdc>PB_CENT_MODE</ffdc>
    <ffdc>PB_CENT_HP_MODE_CURR</ffdc>
    <ffdc>PB_CENT_HP_MODE_NEXT</ffdc>
    <ffdc>PB_CENT_HPX_MODE_CURR</ffdc>
    <ffdc>PB_CENT_HPX_MODE_NEXT</ffdc>
    <ffdc>PB_CENT_HPA_MODE_CURR</ffdc>
    <ffdc>PB_CENT_HPA_MODE_NEXT</ffdc>
    <ffdc>XB_CPLT_CONF1</ffdc>
    <ffdc>PB_IOE_FIR_REG</ffdc>
    <ffdc>OB0_CPLT_CONF1</ffdc>
    <ffdc>OB1_CPLT_CONF1</ffdc>
    <ffdc>OB2_CPLT_CONF1</ffdc>
    <ffdc>OB3_CPLT_CONF1</ffdc>
    <ffdc>IOE_PB_IOO_FIR_REG</ffdc>
    <ffdc>ADU_SND_MODE_REG</ffdc>
  </hwpError>
  <!-- ******************************************************************** -->
</hwpErrors><commit_msg>L3 updates -- p9_build_smp, p9_fbc_utils<commit_after><!-- IBM_PROLOG_BEGIN_TAG                                                   -->
<!-- This is an automatically generated prolog.                             -->
<!--                                                                        -->
<!-- $Source: src/import/chips/p9/procedures/xml/error_info/p9_build_smp_errors.xml $ -->
<!--                                                                        -->
<!-- OpenPOWER HostBoot Project                                             -->
<!--                                                                        -->
<!-- Contributors Listed Below - COPYRIGHT 2015,2019                        -->
<!-- [+] International Business Machines Corp.                              -->
<!--                                                                        -->
<!--                                                                        -->
<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
<!-- you may not use this file except in compliance with the License.       -->
<!-- You may obtain a copy of the License at                                -->
<!--                                                                        -->
<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
<!--                                                                        -->
<!-- Unless required by applicable law or agreed to in writing, software    -->
<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
<!-- implied. See the License for the specific language governing           -->
<!-- permissions and limitations under the License.                         -->
<!--                                                                        -->
<!-- IBM_PROLOG_END_TAG                                                     -->
<hwpErrors>
  <!-- ******************************************************************** -->
  <hwpError>
    <rc>RC_P9_BUILD_SMP_MASTER_DESIGNATION_ERR</rc>
    <description>
      Node or system master chip designation error.
    </description>
    <ffdc>TARGET</ffdc>
    <ffdc>OP</ffdc>
    <ffdc>GROUP_ID</ffdc>
    <ffdc>CHIP_ID</ffdc>
    <ffdc>MASTER_CHIP_SYS_CURR</ffdc>
    <ffdc>MASTER_CHIP_GROUP_CURR</ffdc>
    <ffdc>MASTER_CHIP_SYS_NEXT</ffdc>
    <ffdc>MASTER_CHIP_GROUP_NEXT</ffdc>
    <callout>
      <procedure>CODE</procedure>
      <priority>HIGH</priority>
    </callout>
  </hwpError>
  <!-- ******************************************************************** -->
  <hwpError>
    <rc>RC_P9_BUILD_SMP_GROUP_ADD_INTERNAL_ERR</rc>
    <description>
      Internal program error.
      SMP data structure map insert failed.
    </description>
    <ffdc>TARGET</ffdc>
    <ffdc>GROUP_ID</ffdc>
    <callout>
      <procedure>CODE</procedure>
      <priority>HIGH</priority>
    </callout>
  </hwpError>
  <!-- ******************************************************************** -->
  <hwpError>
    <rc>RC_P9_BUILD_SMP_DUPLICATE_FABRIC_ID_ERR</rc>
    <description>
      Multiple chips found with identical fabric node/chip ID attribute values.
    </description>
    <ffdc>TARGET1</ffdc>
    <ffdc>TARGET2</ffdc>
    <ffdc>GROUP_ID</ffdc>
    <ffdc>CHIP_ID</ffdc>
    <callout>
      <procedure>CODE</procedure>
      <priority>HIGH</priority>
    </callout>
  </hwpError>
  <!-- ******************************************************************** -->
  <hwpError>
    <rc>RC_P9_BUILD_SMP_MULTIPLE_MASTER_DESIGNATION_ERR</rc>
    <description>
      Input parameter designating post-reconfiguration master chip
      matches more than one chip in HWP input targets to process.
    </description>
    <ffdc>MASTER_CHIP_SYS_NEXT_TARGET</ffdc>
    <ffdc>OP</ffdc>
    <callout>
      <procedure>CODE</procedure>
      <priority>HIGH</priority>
    </callout>
  </hwpError>
  <!-- ******************************************************************** -->
  <hwpError>
    <rc>RC_P9_BUILD_SMP_NO_MASTER_DESIGNATION_ERR</rc>
    <description>
      Input parameter designating post-reconfiguration master chip
      does not match any chips in HWP input targets to process.
    </description>
    <ffdc>MASTER_CHIP_SYS_NEXT_TARGET</ffdc>
    <ffdc>OP</ffdc>
    <callout>
      <procedure>CODE</procedure>
      <priority>HIGH</priority>
    </callout>
  </hwpError>
  <!-- ******************************************************************** -->
  <hwpError>
    <rc>RC_P9_BUILD_SMP_MAX_SIZE_ERR</rc>
    <description>
      Number of chips in HWP input arguments exceeds supported SMP size
    </description>
    <ffdc>SIZE</ffdc>
    <ffdc>MAX_SIZE</ffdc>
    <ffdc>OP</ffdc>
    <callout>
      <procedure>CODE</procedure>
      <priority>HIGH</priority>
    </callout>
  </hwpError>
  <!-- ******************************************************************** -->
  <hwpError>
    <rc>RC_P9_BUILD_SMP_INVALID_TOPOLOGY</rc>
    <description>
      Invalid fabric topology specified by input parameters.
    </description>
    <ffdc>TARGET</ffdc>
    <ffdc>OP</ffdc>
    <ffdc>GROUP_ID</ffdc>
    <ffdc>CHIP_ID</ffdc>
    <ffdc>INTERGROUP_CONNECTIONS_OK</ffdc>
    <ffdc>CONNECTED_GROUP_IDS</ffdc>
    <ffdc>GROUP_IDS_IN_SYSTEM</ffdc>
    <ffdc>INTRAGROUP_CONNECTIONS_OK</ffdc>
    <ffdc>CONNECTED_CHIP_IDS</ffdc>
    <ffdc>CHIP_IDS_IN_GROUPS</ffdc>
    <ffdc>FBC_PUMP_MODE</ffdc>
    <callout>
      <procedure>CODE</procedure>
      <priority>HIGH</priority>
    </callout>
  </hwpError>
  <!-- ******************************************************************** -->
  <hwpError>
    <rc>RC_P9_BUILD_SMP_HOTPLUG_SHADOW_ERR</rc>
    <description>
      Fabric hotplug (CURR or NEXT) shadow register contents are not
      equivalent.
    </description>
    <ffdc>TARGET</ffdc>
    <ffdc>ADDRESS0</ffdc>
    <ffdc>ADDRESS1</ffdc>
    <ffdc>DATA0</ffdc>
    <ffdc>DATA1</ffdc>
    <callout>
      <procedure>CODE</procedure>
      <priority>HIGH</priority>
    </callout>
  </hwpError>
  <!-- ******************************************************************** -->
  <hwpError>
    <rc>RC_P9_BUILD_SMP_BAD_ADU_ACTION_ERR</rc>
    <description>Invalid ADU action specified.</description>
    <ffdc>OP</ffdc>
    <ffdc>ACTION</ffdc>
    <callout>
      <procedure>CODE</procedure>
      <priority>HIGH</priority>
    </callout>
  </hwpError>
  <!-- ******************************************************************** -->
  <hwpError>
    <rc>RC_P9_BUILD_SMP_ADU_STATUS_MISMATCH_ERR</rc>
    <description>
      Status mismatch detected on ADU operation execution for SMP configuration.
    </description>
    <ffdc>TARGET</ffdc>
    <ffdc>ADU_NUM_POLLS</ffdc>
    <ffdc>CHIP_DATA_VALID</ffdc>
    <ffdc>GROUP_IDS</ffdc>
    <ffdc>CHIP_IDS</ffdc>
    <ffdc>FFDC_ADDRS</ffdc>
    <ffdc>FFDC_REG_DATA</ffdc>
    <callout>
      <procedure>LVL_SUPPORT</procedure>
      <priority>HIGH</priority>
    </callout>
  </hwpError>
  <!-- ******************************************************************** -->
</hwpErrors>
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