<commit_before><?xml version="1.0" encoding="utf-8"?>
<component name="imx27_wb16_wrapper" version="1.0">
	<description>
		Convert EIM imx bus into a Wishbone 16bits master bus.
	</description>

	<hdl_files>
		<hdl_file filename="imx27_wb16_wrapper.vhd" scope="spartan3" istop="1"/>
	</hdl_files>

	<interfaces>
		<interface name="eim" class="gls">
			<ports>
				<port name="imx_address" type="EXPORT" size="12" dir="in">
					<pin num="0"> <connect instance_dest="apf27" interface_dest="fpga" port_dest="ADDR1" pin_dest="0"/></pin>
					<pin num="1"> <connect instance_dest="apf27" interface_dest="fpga" port_dest="ADDR2" pin_dest="0"/></pin>
					<pin num="2"> <connect instance_dest="apf27" interface_dest="fpga" port_dest="ADDR3" pin_dest="0"/></pin>
					<pin num="3"> <connect instance_dest="apf27" interface_dest="fpga" port_dest="ADDR4" pin_dest="0"/></pin>
					<pin num="4"> <connect instance_dest="apf27" interface_dest="fpga" port_dest="ADDR5" pin_dest="0"/></pin>
					<pin num="5"> <connect instance_dest="apf27" interface_dest="fpga" port_dest="ADDR6" pin_dest="0"/></pin>
					<pin num="6"> <connect instance_dest="apf27" interface_dest="fpga" port_dest="ADDR7" pin_dest="0"/></pin>
					<pin num="7"> <connect instance_dest="apf27" interface_dest="fpga" port_dest="ADDR8" pin_dest="0"/></pin>
					<pin num="8"> <connect instance_dest="apf27" interface_dest="fpga" port_dest="ADDR9" pin_dest="0"/></pin>
					<pin num="9"><connect instance_dest="apf27" interface_dest="fpga"  port_dest="ADDR10" pin_dest="0"/></pin>
					<pin num="10"><connect instance_dest="apf27" interface_dest="fpga" port_dest="ADDR11" pin_dest="0"/></pin>
					<pin num="11"><connect instance_dest="apf27" interface_dest="fpga" port_dest="ADDR12" pin_dest="0"/></pin>
				</port>
				<port name="imx_data" type="EXPORT" size="16" dir="inout">
					<pin num="0"> <connect instance_dest="apf27"  interface_dest="fpga" port_dest="DATA0" pin_dest="0"/></pin>
					<pin num="1"> <connect instance_dest="apf27"  interface_dest="fpga" port_dest="DATA1" pin_dest="0"/></pin>
					<pin num="2"> <connect instance_dest="apf27"  interface_dest="fpga" port_dest="DATA2" pin_dest="0"/></pin>
					<pin num="3"> <connect instance_dest="apf27"  interface_dest="fpga" port_dest="DATA3" pin_dest="0"/></pin>
					<pin num="4"> <connect instance_dest="apf27"  interface_dest="fpga" port_dest="DATA4" pin_dest="0"/></pin>
					<pin num="5"> <connect instance_dest="apf27"  interface_dest="fpga" port_dest="DATA5" pin_dest="0"/></pin>
					<pin num="6"> <connect instance_dest="apf27"  interface_dest="fpga" port_dest="DATA6" pin_dest="0"/></pin>
					<pin num="7"> <connect instance_dest="apf27"  interface_dest="fpga" port_dest="DATA7" pin_dest="0"/></pin>
					<pin num="8"> <connect instance_dest="apf27"  interface_dest="fpga" port_dest="DATA8" pin_dest="0"/></pin>
					<pin num="9"> <connect instance_dest="apf27"  interface_dest="fpga" port_dest="DATA9" pin_dest="0"/></pin>
					<pin num="10"><connect instance_dest="apf27"  interface_dest="fpga" port_dest="DATA10" pin_dest="0"/></pin>
					<pin num="11"><connect instance_dest="apf27"  interface_dest="fpga" port_dest="DATA11" pin_dest="0"/></pin>
					<pin num="12"><connect instance_dest="apf27"  interface_dest="fpga" port_dest="DATA12" pin_dest="0"/></pin>
					<pin num="13"><connect instance_dest="apf27"  interface_dest="fpga" port_dest="DATA13" pin_dest="0"/></pin>
					<pin num="14"><connect instance_dest="apf27"  interface_dest="fpga" port_dest="DATA14" pin_dest="0"/></pin>
					<pin num="15"><connect instance_dest="apf27"  interface_dest="fpga" port_dest="DATA15" pin_dest="0"/></pin>
				</port>
				<port name="imx_cs_n" type="EXPORT" size="1" dir="in">
					<pin num="0"><connect instance_dest="apf27" interface_dest="fpga" port_dest="CS5N" pin_dest="0"/></pin>
				</port>
				<port name="imx_oe_n" type="EXPORT" size="1" dir="in">
					<pin num="0"><connect instance_dest="apf27" interface_dest="fpga" port_dest="OEN" pin_dest="0"/></pin>
				</port>
				<port name="imx_eb0_n" type="EXPORT" size="1" dir="in">
					<pin num="0"><connect instance_dest="apf27" interface_dest="fpga" port_dest="EB0N" pin_dest="0"/></pin>
				</port>
			</ports>
		</interface>

		<interface name="candr" class="clk_rst">
			<ports>
				<port name="gls_reset" type="RST" size="1" dir="in"/>
				<port name="gls_clk" type="CLK" size="1" dir="in"/>
			</ports>
		</interface>

		<interface clockandreset="candr" name="mwb16" class="master" bus="wishbone16">
			<ports>
				<port name="wbm_address" type="ADR" size="13" dir="out"/>
				<port name="wbm_readdata" type="DAT_I" size="16" dir="in"/>
				<port name="wbm_writedata" type="DAT_O" size="16" dir="out"/>
				<port name="wbm_strobe" type="STB" size="1" dir="out"/>
				<port name="wbm_write" type="WE" size="1" dir="out"/>
				<port name="wbm_ack" type="ACK" size="1" dir="in"/>
				<port name="wbm_cycle" type="CYC" size="1" dir="out"/>
			</ports>
		</interface>

	</interfaces>

</component>
<commit_msg>[WRAPPER][IMX27] Add pin definition for SP_VISION<commit_after><?xml version="1.0" encoding="utf-8"?>
<component name="imx27_wb16_wrapper" version="1.0">
	<description>
		Convert EIM imx bus into a Wishbone 16bits master bus.
	</description>

	<hdl_files>
		<hdl_file filename="imx27_wb16_wrapper.vhd" scope="spartan3" istop="1"/>
	</hdl_files>

	<interfaces>
		<interface name="eim" class="gls">
			<ports>
				<port name="imx_address" type="EXPORT" size="12" dir="in">
					<pin num="0"> <connect instance_dest="apf27" interface_dest="fpga" port_dest="ADDR1" pin_dest="0"/></pin>
					<pin num="0"> <connect instance_dest="sp_vision" interface_dest="fpga" port_dest="ADDR0" pin_dest="0"/></pin>
					<pin num="1"> <connect instance_dest="apf27" interface_dest="fpga" port_dest="ADDR2" pin_dest="0"/></pin>
					<pin num="1"> <connect instance_dest="sp_vision" interface_dest="fpga" port_dest="ADDR1" pin_dest="0"/></pin>
					<pin num="2"> <connect instance_dest="apf27" interface_dest="fpga" port_dest="ADDR3" pin_dest="0"/></pin>
					<pin num="2"> <connect instance_dest="sp_vision" interface_dest="fpga" port_dest="ADDR2" pin_dest="0"/></pin>
					<pin num="3"> <connect instance_dest="apf27" interface_dest="fpga" port_dest="ADDR4" pin_dest="0"/></pin>
					<pin num="3"> <connect instance_dest="sp_vision" interface_dest="fpga" port_dest="ADDR3" pin_dest="0"/></pin>
					<pin num="4"> <connect instance_dest="apf27" interface_dest="fpga" port_dest="ADDR5" pin_dest="0"/></pin>
					<pin num="4"> <connect instance_dest="sp_vision" interface_dest="fpga" port_dest="ADDR4" pin_dest="0"/></pin>
					<pin num="5"> <connect instance_dest="apf27" interface_dest="fpga" port_dest="ADDR6" pin_dest="0"/></pin>
					<pin num="5"> <connect instance_dest="sp_vision" interface_dest="fpga" port_dest="ADDR5" pin_dest="0"/></pin>
					<pin num="6"> <connect instance_dest="apf27" interface_dest="fpga" port_dest="ADDR7" pin_dest="0"/></pin>
					<pin num="6"> <connect instance_dest="sp_vision" interface_dest="fpga" port_dest="ADDR6" pin_dest="0"/></pin>
					<pin num="7"> <connect instance_dest="apf27" interface_dest="fpga" port_dest="ADDR8" pin_dest="0"/></pin>
					<pin num="7"> <connect instance_dest="sp_vision" interface_dest="fpga" port_dest="ADDR7" pin_dest="0"/></pin>
					<pin num="8"> <connect instance_dest="apf27" interface_dest="fpga" port_dest="ADDR9" pin_dest="0"/></pin>
					<pin num="8"> <connect instance_dest="sp_vision" interface_dest="fpga" port_dest="ADDR8" pin_dest="0"/></pin>
					<pin num="9"><connect instance_dest="apf27" interface_dest="fpga"  port_dest="ADDR10" pin_dest="0"/></pin>
					<pin num="9"><connect instance_dest="sp_vision" interface_dest="fpga"  port_dest="ADDR9" pin_dest="0"/></pin>
					<pin num="10"><connect instance_dest="apf27" interface_dest="fpga" port_dest="ADDR11" pin_dest="0"/></pin>
					<pin num="10"><connect instance_dest="sp_vision" interface_dest="fpga" port_dest="ADDR10" pin_dest="0"/></pin>
					<pin num="11"><connect instance_dest="apf27" interface_dest="fpga" port_dest="ADDR12" pin_dest="0"/></pin>
					<pin num="11"><connect instance_dest="sp_vision" interface_dest="fpga" port_dest="ADDR11" pin_dest="0"/></pin>
				</port>
				<port name="imx_data" type="EXPORT" size="16" dir="inout">
					<pin num="0"> <connect instance_dest="apf27"  interface_dest="fpga" port_dest="DATA0" pin_dest="0"/></pin>
					<pin num="0"> <connect instance_dest="sp_vision"  interface_dest="fpga" port_dest="IMX_DATA0" pin_dest="0"/></pin>
					<pin num="1"> <connect instance_dest="apf27"  interface_dest="fpga" port_dest="DATA1" pin_dest="0"/></pin>
					<pin num="1"> <connect instance_dest="sp_vision"  interface_dest="fpga" port_dest="IMX_DATA1" pin_dest="0"/></pin>
					<pin num="2"> <connect instance_dest="apf27"  interface_dest="fpga" port_dest="DATA2" pin_dest="0"/></pin>
					<pin num="2"> <connect instance_dest="sp_vision"  interface_dest="fpga" port_dest="IMX_DATA2" pin_dest="0"/></pin>
					<pin num="3"> <connect instance_dest="apf27"  interface_dest="fpga" port_dest="DATA3" pin_dest="0"/></pin>
					<pin num="3"> <connect instance_dest="sp_vision"  interface_dest="fpga" port_dest="IMX_DATA3" pin_dest="0"/></pin>
					<pin num="4"> <connect instance_dest="apf27"  interface_dest="fpga" port_dest="DATA4" pin_dest="0"/></pin>
					<pin num="4"> <connect instance_dest="sp_vision"  interface_dest="fpga" port_dest="IMX_DATA4" pin_dest="0"/></pin>
					<pin num="5"> <connect instance_dest="apf27"  interface_dest="fpga" port_dest="DATA5" pin_dest="0"/></pin>
					<pin num="5"> <connect instance_dest="sp_vision"  interface_dest="fpga" port_dest="IMX_DATA5" pin_dest="0"/></pin>
					<pin num="6"> <connect instance_dest="apf27"  interface_dest="fpga" port_dest="DATA6" pin_dest="0"/></pin>
					<pin num="6"> <connect instance_dest="sp_vision"  interface_dest="fpga" port_dest="IMX_DATA6" pin_dest="0"/></pin>
					<pin num="7"> <connect instance_dest="apf27"  interface_dest="fpga" port_dest="DATA7" pin_dest="0"/></pin>
					<pin num="7"> <connect instance_dest="sp_vision"  interface_dest="fpga" port_dest="IMX_DATA7" pin_dest="0"/></pin>
					<pin num="8"> <connect instance_dest="apf27"  interface_dest="fpga" port_dest="DATA8" pin_dest="0"/></pin>
					<pin num="8"> <connect instance_dest="sp_vision"  interface_dest="fpga" port_dest="IMX_DATA8" pin_dest="0"/></pin>
					<pin num="9"> <connect instance_dest="apf27"  interface_dest="fpga" port_dest="DATA9" pin_dest="0"/></pin>
					<pin num="9"> <connect instance_dest="sp_vision"  interface_dest="fpga" port_dest="IMX_DATA9" pin_dest="0"/></pin>
					<pin num="10"><connect instance_dest="apf27"  interface_dest="fpga" port_dest="DATA10" pin_dest="0"/></pin>
					<pin num="10"><connect instance_dest="sp_vision"  interface_dest="fpga" port_dest="IMX_DATA10" pin_dest="0"/></pin>
					<pin num="11"><connect instance_dest="apf27"  interface_dest="fpga" port_dest="DATA11" pin_dest="0"/></pin>
					<pin num="11"><connect instance_dest="sp_vision"  interface_dest="fpga" port_dest="IMX_DATA11" pin_dest="0"/></pin>
					<pin num="12"><connect instance_dest="apf27"  interface_dest="fpga" port_dest="DATA12" pin_dest="0"/></pin>
					<pin num="12"><connect instance_dest="sp_vision"  interface_dest="fpga" port_dest="IMX_DATA12" pin_dest="0"/></pin>
					<pin num="13"><connect instance_dest="apf27"  interface_dest="fpga" port_dest="DATA13" pin_dest="0"/></pin>
					<pin num="13"><connect instance_dest="sp_vision"  interface_dest="fpga" port_dest="IMX_DATA13" pin_dest="0"/></pin>
					<pin num="14"><connect instance_dest="apf27"  interface_dest="fpga" port_dest="DATA14" pin_dest="0"/></pin>
					<pin num="14"><connect instance_dest="sp_vision"  interface_dest="fpga" port_dest="IMX_DATA14" pin_dest="0"/></pin>
					<pin num="15"><connect instance_dest="apf27"  interface_dest="fpga" port_dest="DATA15" pin_dest="0"/></pin>
					<pin num="15"><connect instance_dest="sp_vision"  interface_dest="fpga" port_dest="IMX_DATA15" pin_dest="0"/></pin>
				</port>
				<port name="imx_cs_n" type="EXPORT" size="1" dir="in">
					<pin num="0"><connect instance_dest="apf27" interface_dest="fpga" port_dest="CS5N" pin_dest="0"/></pin>
					<pin num="0"><connect instance_dest="sp_vision" interface_dest="fpga" port_dest="CSN" pin_dest="0"/></pin>
				</port>
				<port name="imx_oe_n" type="EXPORT" size="1" dir="in">
					<pin num="0"><connect instance_dest="apf27" interface_dest="fpga" port_dest="OEN" pin_dest="0"/></pin>
					<pin num="0"><connect instance_dest="sp_vision" interface_dest="fpga" port_dest="OEN" pin_dest="0"/></pin>
				</port>
				<port name="imx_eb0_n" type="EXPORT" size="1" dir="in">
					<pin num="0"><connect instance_dest="apf27" interface_dest="fpga" port_dest="EB0N" pin_dest="0"/></pin>
					<pin num="0"><connect instance_dest="sp_vision" interface_dest="fpga" port_dest="EBN" pin_dest="0"/></pin>
				</port>
			</ports>
		</interface>

		<interface name="candr" class="clk_rst">
			<ports>
				<port name="gls_reset" type="RST" size="1" dir="in"/>
				<port name="gls_clk" type="CLK" size="1" dir="in"/>
			</ports>
		</interface>

		<interface clockandreset="candr" name="mwb16" class="master" bus="wishbone16">
			<ports>
				<port name="wbm_address" type="ADR" size="13" dir="out"/>
				<port name="wbm_readdata" type="DAT_I" size="16" dir="in"/>
				<port name="wbm_writedata" type="DAT_O" size="16" dir="out"/>
				<port name="wbm_strobe" type="STB" size="1" dir="out"/>
				<port name="wbm_write" type="WE" size="1" dir="out"/>
				<port name="wbm_ack" type="ACK" size="1" dir="in"/>
				<port name="wbm_cycle" type="CYC" size="1" dir="out"/>
			</ports>
		</interface>

	</interfaces>

</component>

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