<commit_before>/* IBM_PROLOG_BEGIN_TAG                                                   */
/* This is an automatically generated prolog.                             */
/*                                                                        */
/* $Source: src/import/chips/p10/procedures/hwp/lib/p10_hcode_image_defines.H $ */
/*                                                                        */
/* OpenPOWER HostBoot Project                                             */
/*                                                                        */
/* Contributors Listed Below - COPYRIGHT 2019                             */
/* [+] International Business Machines Corp.                              */
/*                                                                        */
/*                                                                        */
/* Licensed under the Apache License, Version 2.0 (the "License");        */
/* you may not use this file except in compliance with the License.       */
/* You may obtain a copy of the License at                                */
/*                                                                        */
/*     http://www.apache.org/licenses/LICENSE-2.0                         */
/*                                                                        */
/* Unless required by applicable law or agreed to in writing, software    */
/* distributed under the License is distributed on an "AS IS" BASIS,      */
/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
/* implied. See the License for the specific language governing           */
/* permissions and limitations under the License.                         */
/*                                                                        */
/* IBM_PROLOG_END_TAG                                                     */
///
/// @file   p10_hcode_image_defines.H
/// @brief  defines constants associated with hcode image build.
///
// *HWP HWP Owner:      <NAME> <<EMAIL>>
// *HWP FW Owner:       <NAME> <<EMAIL>>
// *HWP Team:           PM
// *HWP Level:          2
// *HWP Consumed by:    Hostboot: HBRT

#ifndef __HW_IMG_DEFINE
#define __HW_IMG_DEFINE

#include <p10_hcd_header_defs.H>
#include <p10_hcd_memmap_base.H>
#include <p10_hcd_memmap_homer.H>
#include <p10_hcd_memmap_occ_sram.H>

//--------------------------------------------------------------------------
// local structs and constants
// -------------------------------------------------------------------------
#ifndef __ASSEMBLER__
#ifdef __cplusplus
#ifndef __PPE_PLAT

#define IMG_HDR_ALIGN_SIZE 32

namespace hcodeImageBuild
{
#endif //__PPE_PLAT
#endif //__cplusplus
#endif //__ASSEMBLER__

/**
 * CPMR Header
 *
 *  This header is only consumed by Hcode Image Build and
 *  lab tools, not by PPE code.  It is generated with assembler
 *  primitives during QME build and placed in HOMER by
 *  Hcode Image Build.
 */

#ifdef __ASSEMBLER__
.macro  .cpmr_header
.section ".cpmr" , "aw"
.balign    8
#else
typedef struct
{
#endif
HCD_HDR_ATTN  ( iv_attnOpcodes,         2);
HCD_HDR_UINT64( iv_magicNum,            CPMR_MAGIC_NUMBER);
HCD_HDR_UINT32( iv_buildDate,           0);
HCD_HDR_UINT32( iv_version,             0);
HCD_HDR_UINT8_VEC (iv_reserveFlags, 4,  0);
HCD_HDR_UINT8 ( iv_selfRestoreVer,      0);
HCD_HDR_UINT8 ( iv_stopApiVer,          0);
HCD_HDR_UINT8 ( iv_urmorFix,            0);
HCD_HDR_UINT8 ( iv_fusedMode,           0);
HCD_HDR_UINT32( iv_qmeImgOffset,        0);
HCD_HDR_UINT32( iv_qmeImgLength,        0);
HCD_HDR_UINT32( iv_commonRingOffset,    0);
HCD_HDR_UINT32( iv_commonRingLength,    0);
HCD_HDR_UINT32( iv_localPstateOffset,   0);
HCD_HDR_UINT32( iv_localPstateLength,   0);
HCD_HDR_UINT32( iv_specRingOffset,      0);
HCD_HDR_UINT32( iv_specRingLength,      0);
HCD_HDR_UINT32( iv_scomRestoreOffset,   0);
HCD_HDR_UINT32( iv_scomRestoreLength,   0);
HCD_HDR_UINT32( iv_selfRestoreOffset,   0);
HCD_HDR_UINT32( iv_selfRestoreLength,   0);
HCD_HDR_UINT32( iv_maxCoreL2ScomEntry,  0);
HCD_HDR_UINT32( iv_maxEqL3ScomEntry,    0);
HCD_HDR_UINT32( iv_coreL2ScomOffset,    0);
HCD_HDR_UINT32( iv_coreL2ScomLength,    0);
HCD_HDR_UINT32( iv_eqL3ScomOffset,      0);
HCD_HDR_UINT32( iv_eqL3ScomLength,      0);
HCD_HDR_PAD(CPMR_HEADER_SIZE);
#ifdef __ASSEMBLER__
.endm
#else
} __attribute__((packed, aligned(256))) CpmrHeader_t;
#endif

/**
 * QME Header
 *
 * The QME header is loaded in the QME SRAM so it is "tight" (little extra space)
 * Thus, this "structure" is NOT padded to a specific size and is limited to
 * 64B.  Also, structure member names are preceded with "g_" as these becoming
 * global variables in the QME Hcode.
 */
#ifdef __ASSEMBLER__
.macro  .qme_header
.section ".qme_image_header" , "aw"
.balign    8
#else
typedef struct
{
#endif
HCD_HDR_UINT64( g_qme_magic_number,          QME_MAGIC_NUMBER );
HCD_HDR_UINT32( g_qme_hcode_offset,          0 );
HCD_HDR_UINT32( g_qme_hcode_length,          0 );
HCD_HDR_UINT32( g_qme_common_ring_offset,    0 );
HCD_HDR_UINT32( g_qme_cmn_ring_ovrd_offset,  0 );
HCD_HDR_UINT32( g_qme_common_ring_length,    0 );
HCD_HDR_UINT32( g_qme_pstate_region_offset,  0 );
HCD_HDR_UINT32( g_qme_pstate_region_length,  0 );
HCD_HDR_UINT32( g_qme_inst_spec_ring_offset, 0 );
HCD_HDR_UINT32( g_qme_max_spec_ring_length,  0 );
HCD_HDR_UINT32( g_qme_scom_offset,           0 );
HCD_HDR_UINT32( g_qme_scom_length,           0 );
HCD_HDR_UINT32( g_qme_attr_tank_address,     0 );
HCD_HDR_UINT16( g_qme_location_id,           0 );
HCD_HDR_UINT16( g_qme_reserve,               0 );
HCD_HDR_UINT32( g_qme_timebase_hz,           0 ); //Retain next field at 8B boundary
HCD_HDR_UINT64( g_qme_cpmr_PhyAddr,          0 );
HCD_HDR_UINT64( g_qme_unsec_cpmr_PhyAddr,    0 );
HCD_HDR_UINT32( g_qme_custom_length,         0 );
HCD_HDR_PAD(IMG_HDR_ALIGN_SIZE);
#ifdef __ASSEMBLER__
.endm
#else
//QME Header size is 96B
} __attribute__((packed, aligned(IMG_HDR_ALIGN_SIZE))) QmeHeader_t;
#endif

#ifndef __ASSEMBLER__

typedef struct QMEImageFlags
{
    uint32_t fused_mode     : 1;
    uint32_t reserved0      : 31;
} QMEImageFlags_t;

#endif //__ASSEMBLER__


#ifndef __ASSEMBLER__

/**
 * @brief   enumerates all return codes associated with hcode image build.
 */
enum ImgBldRetCode_t
{
    IMG_BUILD_SUCCESS           =   0,
    BUILD_FAIL_XGPE_IMAGE       =   1,
    BUILD_FAIL_SELF_REST_IMAGE  =   2,<commit_msg>CPMR Build: Misc updates to support build of CPMR, Self Restore.<commit_after>/* IBM_PROLOG_BEGIN_TAG                                                   */
/* This is an automatically generated prolog.                             */
/*                                                                        */
/* $Source: src/import/chips/p10/procedures/hwp/lib/p10_hcode_image_defines.H $ */
/*                                                                        */
/* OpenPOWER HostBoot Project                                             */
/*                                                                        */
/* Contributors Listed Below - COPYRIGHT 2019                             */
/* [+] International Business Machines Corp.                              */
/*                                                                        */
/*                                                                        */
/* Licensed under the Apache License, Version 2.0 (the "License");        */
/* you may not use this file except in compliance with the License.       */
/* You may obtain a copy of the License at                                */
/*                                                                        */
/*     http://www.apache.org/licenses/LICENSE-2.0                         */
/*                                                                        */
/* Unless required by applicable law or agreed to in writing, software    */
/* distributed under the License is distributed on an "AS IS" BASIS,      */
/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
/* implied. See the License for the specific language governing           */
/* permissions and limitations under the License.                         */
/*                                                                        */
/* IBM_PROLOG_END_TAG                                                     */
///
/// @file   p10_hcode_image_defines.H
/// @brief  defines constants associated with hcode image build.
///
// *HWP HWP Owner:      <NAME> <<EMAIL>>
// *HWP FW Owner:       <NAME> <<EMAIL>>
// *HWP Team:           PM
// *HWP Level:          2
// *HWP Consumed by:    Hostboot: HBRT

#ifndef __HW_IMG_DEFINE
#define __HW_IMG_DEFINE

#include <p10_hcd_header_defs.H>
#include <p10_hcd_memmap_base.H>
#include <p10_hcd_memmap_homer.H>
#include <p10_hcd_memmap_occ_sram.H>

//--------------------------------------------------------------------------
// local structs and constants
// -------------------------------------------------------------------------
#ifndef __ASSEMBLER__
#ifdef __cplusplus
#ifndef __PPE_PLAT

#define IMG_HDR_ALIGN_SIZE 32

namespace hcodeImageBuild
{
#endif //__PPE_PLAT
#endif //__cplusplus
#endif //__ASSEMBLER__

/**
 * CPMR Header
 *
 *  This header is only consumed by Hcode Image Build and
 *  lab tools, not by PPE code.  It is generated with assembler
 *  primitives during QME build and placed in HOMER by
 *  Hcode Image Build.
 */

#ifdef __ASSEMBLER__
.macro  .cpmr_header
.section ".cpmr" , "aw"
.balign    8
#else
typedef struct
{
#endif
HCD_HDR_ATTN  ( iv_attnOpcodes,         2);
HCD_HDR_UINT64( iv_magicNum,            CPMR_MAGIC_NUMBER);
HCD_HDR_UINT32( iv_buildDate,           0);
HCD_HDR_UINT32( iv_version,             0);
HCD_HDR_UINT8_VEC (iv_reserveFlags, 4,  0);
HCD_HDR_UINT8 ( iv_selfRestoreVer,      0);
HCD_HDR_UINT8 ( iv_stopApiVer,          0);
HCD_HDR_UINT8 ( iv_urmorFix,            0);
HCD_HDR_UINT8 ( iv_fusedMode,           0);
HCD_HDR_UINT32( iv_qmeImgOffset,        0);
HCD_HDR_UINT32( iv_qmeImgLength,        0);
HCD_HDR_UINT32( iv_commonRingOffset,    0);
HCD_HDR_UINT32( iv_commonRingLength,    0);
HCD_HDR_UINT32( iv_localPstateOffset,   0);
HCD_HDR_UINT32( iv_localPstateLength,   0);
HCD_HDR_UINT32( iv_specRingOffset,      0);
HCD_HDR_UINT32( iv_specRingLength,      0);
HCD_HDR_UINT32( iv_scomRestoreOffset,   0);
HCD_HDR_UINT32( iv_scomRestoreLength,   0);
HCD_HDR_UINT32( iv_selfRestoreOffset,   0);
HCD_HDR_UINT32( iv_selfRestoreLength,   0);
HCD_HDR_UINT32( iv_maxCoreL2ScomEntry,  0);
HCD_HDR_UINT32( iv_maxEqL3ScomEntry,    0);
HCD_HDR_UINT32( iv_coreL2ScomOffset,    0);
HCD_HDR_UINT32( iv_coreL2ScomLength,    0);
HCD_HDR_UINT32( iv_eqL3ScomOffset,      0);
HCD_HDR_UINT32( iv_eqL3ScomLength,      0);
HCD_HDR_PAD(CPMR_HEADER_SIZE);
#ifdef __ASSEMBLER__
.endm
#else
} __attribute__((packed, aligned(256))) CpmrHeader_t;
#endif

/**
 * QME Header
 *
 * The QME header is loaded in the QME SRAM so it is "tight" (little extra space)
 * Thus, this "structure" is NOT padded to a specific size and is limited to
 * 64B.  Also, structure member names are preceded with "g_" as these becoming
 * global variables in the QME Hcode.
 */
#ifdef __ASSEMBLER__
.macro  .qme_header
.section ".qme_image_header" , "aw"
.balign    8
#else
typedef struct
{
#endif
HCD_HDR_UINT64( g_qme_magic_number,          QME_MAGIC_NUMBER );
HCD_HDR_UINT32( g_qme_hcode_offset,          0 );
HCD_HDR_UINT32( g_qme_hcode_length,          0 );
HCD_HDR_UINT32( g_qme_common_ring_offset,    0 );
HCD_HDR_UINT32( g_qme_cmn_ring_ovrd_offset,  0 );
HCD_HDR_UINT32( g_qme_common_ring_length,    0 );
HCD_HDR_UINT32( g_qme_pstate_region_offset,  0 );
HCD_HDR_UINT32( g_qme_pstate_region_length,  0 );
HCD_HDR_UINT32( g_qme_inst_spec_ring_offset, 0 );
HCD_HDR_UINT32( g_qme_max_spec_ring_length,  0 );
HCD_HDR_UINT32( g_qme_scom_offset,           0 );
HCD_HDR_UINT32( g_qme_scom_length,           0 );
HCD_HDR_UINT32( g_qme_attr_tank_address,     0 );
HCD_HDR_UINT16( g_qme_location_id,           0 );
HCD_HDR_UINT16( g_qme_reserve,               0 );
HCD_HDR_UINT32( g_qme_timebase_hz,           0 ); //Retain next field at 8B boundary
HCD_HDR_UINT64( g_qme_cpmr_PhyAddr,          0 );
HCD_HDR_UINT64( g_qme_unsec_cpmr_PhyAddr,    0 );
HCD_HDR_UINT32( g_qme_custom_length,         0 );
HCD_HDR_PAD(IMG_HDR_ALIGN_SIZE);
#ifdef __ASSEMBLER__
.endm
#else
//QME Header size is 96B
} __attribute__((packed, aligned(32))) QmeHeader_t;
#endif

#ifndef __ASSEMBLER__

typedef struct QMEImageFlags
{
    uint32_t fused_mode     : 1;
    uint32_t reserved0      : 31;
} QMEImageFlags_t;

#endif //__ASSEMBLER__


#ifndef __ASSEMBLER__

/**
 * @brief   enumerates all return codes associated with hcode image build.
 */
enum ImgBldRetCode_t
{
    IMG_BUILD_SUCCESS           =   0,
    BUILD_FAIL_XGPE_IMAGE       =   1,
    BUILD_FAIL_SELF_REST_IMAGE  =   2,
{'fraction_non_alphanumeric': 0.10746897682041677, 'fraction_numerical': 0.02856473893701709, 'mean_word_length': 1.9122727272727273, 'pattern_counts': {'":': 0, '<': 23, '<?xml version=': 0, '>': 23, 'https://': 0, 'lorem ipsum': 0, 'www.': 2, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 62, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
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