<commit_before>; firmware CPU determining code for minimOS
; version 0.9rc1
; (c) 2015-2016 <NAME>
; essentially from the work of <NAME>, Oct. '94
; last modified 20170511-1357

	LDY #$00			; by default, NMOS 6502
	SED					; decimal mode
	LDA #$99			; load highest BCD number
	CLC					; prepare to add
	ADC #$01			; will wrap around in Decimal mode
	CLD					; back to binary
		BMI cpuck_set		; NMOS, N flag not affected by decimal add
	LDY #$03			; let's assume now '816
	LDX #$00			; sets Z temporarily
	.byt	$BB			; TYX, 65802 instruction will clear Z, NOP on all 65C02s won't
		BNE cpuck_set		; Branch only on 65802/816
	LDX $EA				; save contents of $EA, really needed???
	DEY					; try now with Rockwell
	STY $EA				; store '2' there
	.byt	$17, $EA	; RMB1 $EA, Rockwell R65C02 instruction
	CPY $EA				; Location $EA unaffected on other 65C02
	STX $EA				; restore contents, really needed???
		BNE cpuck_set		; Branch only on Rockwell R65C02 (test CPY)
	DEY					; revert to generic 65C02
		BNE cpuck_set		; It's some form of 65C02, thus Y>0 (safer)
cpuck_list:
	.asc	"NBRV"		; codes for NMOS (N), generic CMOS (B), Rockwell 65C02 (R?) and 65816/65802 (V)
cpuck_set:
	LDA cpuck_list, Y	; get proper code from investigation
	STA fw_cpu			; store in variable ** firmware standard label
<commit_msg>CPUcheck minor cleanup<commit_after>; firmware CPU determining code for minimOS
; version 0.9.6a1
; (c) 2015-2017 <NAME>
; essentially from the work of <NAME>, Oct. '94
; last modified 20170721-1720

	LDY #$00			; by default, NMOS 6502 (0)
	SED					; decimal mode
	LDA #$99			; load highest BCD number
	CLC					; prepare to add
	ADC #$01			; will wrap around in Decimal mode
	CLD					; back to binary
		BMI cpuck_set		; NMOS, N flag not affected by decimal add
	LDY #$03			; let's assume now '816 (3)
	LDX #$00			; sets Z temporarily
	.byt	$BB			; TYX, 65816 instruction will clear Z, NOP on all 65C02s won't
		BNE cpuck_set		; Branch only on 65802/816
	DEY					; try now with Rockwell (2)
	STY $EA				; store '2' there, irrelevant contents
	.byt	$17, $EA	; RMB1 $EA, Rockwell R65C02 instruction will reset stored value, otherwise NOPs
	CPY $EA				; Location $EA unaffected on other 65C02
		BNE cpuck_set		; Branch only on Rockwell R65C02 (test CPY)
	DEY					; revert to generic 65C02 (1)
		BNE cpuck_set		; It's not zero, thus no need for BRA
cpuck_list:
	.asc	"NBRV"		; codes for NMOS (N), generic CMOS (B), Rockwell 65C02 (R?) and 65816/65802 (V)
cpuck_set:
	LDA cpuck_list, Y	; get proper code from investigation
	STA fw_cpu			; store in variable ** firmware standard label

{'fraction_non_alphanumeric': 0.08498253783469151, 'fraction_numerical': 0.07605743112145906, 'mean_word_length': 3.254125412541254, 'pattern_counts': {'":': 0, '<': 7, '<?xml version=': 0, '>': 8, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
{'dir': 'git-commits-cleaned', 'id': '4204045', 'n_tokens_mistral': 1194, 'n_tokens_neox': 975, 'n_words': 382}