<commit_before>#
# ------------------------------------------------------------
# Copyright (c) SILAB , Physics Institute of Bonn University
# ------------------------------------------------------------
#
# SVN revision information:
#  $Rev::                       $:
#  $Author::                    $:
#  $Date::                      $:
#

from RL.RegisterLayer import RegisterLayer
from utils.BitLogic import BitLogic
from utils import utils


class StdRegister(RegisterLayer):

    _bv = None

    def __init__(self, driver, conf):
        super(StdRegister, self).__init__(driver, conf)
        self._size = conf['size']
        self._fields = dict()

        if 'fields' in self._conf:
            for field in self._conf['fields']:
                if 'repeat' in field:
                    reg_list = []
                    for _ in range(field['repeat']):
                        reg = StdRegister(None, field)
                        reg_list.append(reg)
                    self._fields[field['name']] = reg_list
                else:
                    bv = BitLogic(field['size'])
                    self._fields[field['name']] = bv

        self._bv = BitLogic(self._conf['size'])

    def __getitem__(self, items):
        #print '__getitem__', items
        return self._fields[items]

    def __setitem__(self, key, value):
        if isinstance(key, slice):
            reg = self._construct_reg()
            reg[key.start:key.stop] = value
            self._deconstruct_reg(reg)
        elif isinstance(key, str):
            self._fields[key][len(self._fields[key]) - 1:0] = value
            if 'bit_order' in self._get_filed_config(key):
                new_val = BitLogic(len(self._fields[key]))
                for i, bit in enumerate(self._get_filed_config(key)['bit_order']):
                    new_val[len(self._fields[key]) - 1 - i] = self._fields[key][bit-2]
                self._fields[key] = new_val
        elif isinstance(key, (int, long)):
            reg = self._construct_reg()
            reg[key] = value
            self._deconstruct_reg(reg)
        else:
            raise TypeError("Invalid argument type.")

    def __len__(self):
        return self._conf['size']

    def __str__(self):
        fields = dict()
        full = dict()

        reg = self._construct_reg()
        full[self._conf['name']] = str(len(reg)) + 'b' + str(reg)
<commit_msg>BUG: Regression, Fix bit order.<commit_after>#
# ------------------------------------------------------------
# Copyright (c) SILAB , Physics Institute of Bonn University
# ------------------------------------------------------------
#
# SVN revision information:
#  $Rev::                       $:
#  $Author::                    $:
#  $Date::                      $:
#

from RL.RegisterLayer import RegisterLayer
from utils.BitLogic import BitLogic
from utils import utils


class StdRegister(RegisterLayer):

    _bv = None

    def __init__(self, driver, conf):
        super(StdRegister, self).__init__(driver, conf)
        self._size = conf['size']
        self._fields = dict()

        if 'fields' in self._conf:
            for field in self._conf['fields']:
                if 'repeat' in field:
                    reg_list = []
                    for _ in range(field['repeat']):
                        reg = StdRegister(None, field)
                        reg_list.append(reg)
                    self._fields[field['name']] = reg_list
                else:
                    bv = BitLogic(field['size'])
                    self._fields[field['name']] = bv

        self._bv = BitLogic(self._conf['size'])

    def __getitem__(self, items):
        #print '__getitem__', items
        return self._fields[items]

    def __setitem__(self, key, value):
        if isinstance(key, slice):
            reg = self._construct_reg()
            reg[key.start:key.stop] = value
            self._deconstruct_reg(reg)
        elif isinstance(key, str):
            self._fields[key][len(self._fields[key]) - 1:0] = value
            if 'bit_order' in self._get_filed_config(key):
                new_val = BitLogic(len(self._fields[key]))
                for i, bit in enumerate(self._get_filed_config(key)['bit_order']):
                    new_val[len(self._fields[key]) - 1 - i] = self._fields[key][bit]
                self._fields[key] = new_val
        elif isinstance(key, (int, long)):
            reg = self._construct_reg()
            reg[key] = value
            self._deconstruct_reg(reg)
        else:
            raise TypeError("Invalid argument type.")

    def __len__(self):
        return self._conf['size']

    def __str__(self):
        fields = dict()
        full = dict()

        reg = self._construct_reg()
        full[self._conf['name']] = str(len(reg)) + 'b' + str(reg)

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{'dir': 'git-commits-cleaned', 'id': '491202', 'n_tokens_mistral': 1368, 'n_tokens_neox': 1295, 'n_words': 292}