<commit_before>/* SPDX-License-Identifier: Apache-2.0
 *
 * Copyright(c) 2019 Intel Corporation. All rights reserved.
 *
 * Author: <NAME> <<EMAIL>>
 */

/**
 * \file cavs/lib/cpu.h
 * \brief DSP parameters, common for cAVS platforms.
 */

#ifndef __CAVS_CPU_H__
#define __CAVS_CPU_H__

/** \brief Number of available DSP cores (conf. by kconfig) */
#define PLATFORM_CORE_COUNT (defined(CONFIG_SMP) ? CONFIG_MP_NUM_CPUS : 1)

/** Id of master DSP core */
#define PLATFORM_PRIMARY_CORE_ID	0

#endif /* __CAVS_CPU_H__ */
<commit_msg>soc: xtensa: fix definition of PLATFORM_CORE_COUNT<commit_after>/* SPDX-License-Identifier: Apache-2.0
 *
 * Copyright(c) 2019 Intel Corporation. All rights reserved.
 *
 * Author: <NAME> <<EMAIL>>
 */

/**
 * DSP parameters, common for cAVS platforms.
 */

#ifndef __CAVS_CPU_H__
#define __CAVS_CPU_H__

/** Number of available DSP cores (conf. by kconfig) */
#if defined(CONFIG_SMP)
#define PLATFORM_CORE_COUNT CONFIG_MP_NUM_CPUS
#else
#define PLATFORM_CORE_COUNT 1
#endif

/** Id of master DSP core */
#define PLATFORM_PRIMARY_CORE_ID	0

#endif /* __CAVS_CPU_H__ */

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