<commit_before>/*******************************************************************************

Copyright (c) 2001-2012, Intel Corporation
All rights reserved.

Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:

 1. Redistributions of source code must retain the above copyright notice,
    this list of conditions and the following disclaimer.

 2. Redistributions in binary form must reproduce the above copyright
    notice, this list of conditions and the following disclaimer in the
    documentation and/or other materials provided with the distribution.

 3. Neither the name of the Intel Corporation nor the names of its
    contributors may be used to endorse or promote products derived from
    this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.

***************************************************************************/

/*
 * 82575EB Gigabit Network Connection
 * 82575EB Gigabit Backplane Connection
 * 82575GB Gigabit Network Connection
 * 82576 Gigabit Network Connection
 * 82576 Quad Port Gigabit Mezzanine Adapter
 * 82580 Gigabit Network Connection
 * I350 Gigabit Network Connection
 */

#include "e1000_api.h"
#include "e1000_i210.h"

STATIC s32  e1000_init_phy_params_82575(struct e1000_hw *hw);
STATIC s32  e1000_init_mac_params_82575(struct e1000_hw *hw);
STATIC s32  e1000_acquire_phy_82575(struct e1000_hw *hw);
STATIC void e1000_release_phy_82575(struct e1000_hw *hw);
STATIC s32  e1000_acquire_nvm_82575(struct e1000_hw *hw);
STATIC void e1000_release_nvm_82575(struct e1000_hw *hw);
STATIC s32  e1000_check_for_link_82575(struct e1000_hw *hw);
STATIC s32  e1000_check_for_link_media_swap(struct e1000_hw *hw);
STATIC s32  e1000_get_cfg_done_82575(struct e1000_hw *hw);
STATIC s32  e1000_get_link_up_info_82575(struct e1000_hw *hw, u16 *speed,
					 u16 *duplex);
STATIC s32  e1000_phy_hw_reset_sgmii_82575(struct e1000_hw *hw);
STATIC s32  e1000_read_phy_reg_sgmii_82575(struct e1000_hw *hw, u32 offset,
					   u16 *data);
STATIC s32  e1000_reset_hw_82575(struct e1000_hw *hw);
STATIC s32  e1000_reset_hw_82580(struct e1000_hw *hw);
STATIC s32  e1000_read_phy_reg_82580(struct e1000_hw *hw,
				     u32 offset, u16 *data);
STATIC s32  e1000_write_phy_reg_82580(struct e1000_hw *hw,
				      u32 offset, u16 data);
STATIC s32  e1000_set_d0_lplu_state_82580(struct e1000_hw *hw,
					  bool active);
STATIC s32  e1000_set_d3_lplu_state_82580(struct e1000_hw *hw,
					  bool active);
STATIC s32  e1000_set_d0_lplu_state_82575(struct e1000_hw *hw,
					  bool active);
STATIC s32  e1000_setup_copper_link_82575(struct e1000_hw *hw);
STATIC s32  e1000_setup_serdes_link_82575(struct e1000_hw *hw);
STATIC s32  e1000_get_media_type_82575(struct e1000_hw *hw);
STATIC s32  e1000_set_sfp_media_type_82575(struct e1000_hw *hw);
STATIC s32  e1000_valid_led_default_82575(struct e1000_hw *hw, u16 *data);
STATIC s32  e1000_write_phy_reg_sgmii_82575(struct e1000_hw *hw,
					    u32 offset, u16 data);
STATIC void e1000_clear_hw_cntrs_82575(struct e1000_hw *hw);
STATIC s32  e1000_acquire_swfw_sync_82575(struct e1000_hw *hw, u16 mask);
STATIC s32  e1000_get_pcs_speed_and_duplex_82575(struct e1000_hw *hw,
						 u16 *speed, u16 *duplex);
STATIC s32  e1000_get_phy_id_82575(struct e1000_hw *hw);
STATIC void e1000_release_swfw_sync_82575(struct e1000_hw *hw, u16 mask);
STATIC bool e1000_sgmii_active_82575(struct e1000_hw *hw);
STATIC s32  e1000_reset_init_script_82575(struct e1000_hw *hw);
STATIC s32  e1000_read_mac_addr_82575(struct e1000_hw *hw);
STATIC void e1000_config_collision_dist_82575(struct e1000_hw *hw);
STATIC void e1000_power_down_phy_copper_82575(struct e1000_hw *hw);
STATIC void e1000_shutdown_serdes_link_82575(struct e1000_hw *hw);
STATIC void e1000_power_up_serdes_link_82575(struct e1000_hw *hw);
STATIC s32 e1000_set_pcie_completion_timeout(struct e1000_hw *hw);
STATIC s32 e1000_reset_mdicnfg_82580(struct e1000_hw *hw);
STATIC s32 e1000_validate_nvm_checksum_82580(struct e1000_hw *hw);
STATIC s32 e1000_update_nvm_checksum_82580(struct e1000_hw *hw);
STATIC s32 e1000_update_nvm_checksum_with_offset(struct e1000_hw *hw,
						 u16 offset);
STATIC s32 e1000_validate_nvm_checksum_with_offset(struct e1000_hw *hw,
						   u16 offset);
STATIC s32 e1000_validate_nvm_checksum_i350(struct e1000_hw *hw);
STATIC s32 e1000_update_nvm_checksum_i350(struct e1000_hw *hw);
STATIC void e1000_write_vfta_i350(struct e1000_hw *hw, u32 offset, u32 value);
STATIC void e1000_clear_vfta_i350(struct e1000_hw *hw);

STATIC void e1000_i2c_start(struct e1000_hw *hw);
STATIC void e1000_i2c_stop(struct e1000_hw *hw);
STATIC s32 e1000_clock_in_i2c_byte(struct e1000_hw *hw, u8 *data);
STATIC s32 e1000_clock_out_i2c_byte(struct e1000_hw *hw, u8 data);
STATIC s32 e1000_get_i2c_ack(struct e1000_hw *hw);
STATIC s32 e1000_clock_in_i2c_bit(struct e1000_hw *hw, bool *data);
STATIC s32 e1000_clock_out_i2c_bit(struct e1000_hw *hw, bool data);
STATIC void e1000_raise_i2c_clk(struct e1000_hw *hw, u32 *i2cctl);
STATIC void e1000_lower_i2c_clk(struct e1000_hw *hw, u32 *i2cctl);
STATIC s32 e1000_set_i2c_data(struct e1000_hw *hw, u32 *i2cctl, bool data);
STATIC bool e1000_get_i2c_data(u32 *i2cctl);

STATIC const u16 e1000_82580_rxpbs_table[] = {
	36, 72, 144, 1, 2, 4, 8, 16, 35, 70, 140 };
#define E1000_82580_RXPBS_TABLE_SIZE \
	(sizeof(e1000_82580_rxpbs_table) / \
	 sizeof(e1000_82580_rxpbs_table[0]))


/**
 *  e1000_sgmii_uses_mdio_82575 - Determine if I2C pins are for external MDIO
 *  @hw: pointer to the HW structure
 *
 *  Called to determine if the I2C pins are being used for I2C or as an
 *  external MDIO interface since the two options are mutually exclusive.
 **/
STATIC bool e1000_sgmii_uses_mdio_82575(struct e1000_hw *hw)
{
	u32 reg = 0;
	bool ext_mdio = false;

	DEBUGFUNC("e1000_sgmii_uses_mdio_82575");

	switch (hw->mac.type) {
	case e1000_82575:
	case e1000_82576:
		reg = E1000_READ_REG(hw, E1000_MDIC);
		ext_mdio = !!(reg & E1000_MDIC_DEST);
		break;
	case e1000_82580:
	case e1000_i350:
	case e1000_i354:
	case e1000_i210:
	case e1000_i211:
		reg = E1000_READ_REG(hw, E1000_MDICNFG);
		ext_mdio = !!(reg & E1000_MDICNFG_EXT_MDIO);
		break;
	default:
		break;
	}
	return ext_mdio;
}

/**
 *  e1000_init_phy_params_82575 - Init PHY func ptrs.
 *  @hw: pointer to the HW structure
 **/
STATIC s32 e1000_init_phy_params_82575(struct e1000_hw *hw)
{
	struct e1000_phy_info *phy = &hw->phy;
	s32 ret_val = E1000_SUCCESS;
	u32 ctrl_ext;

	DEBUGFUNC("e1000_init_phy_params_82575");

	phy->ops.read_i2c_byte = e1000_read_i2c_byte_generic;
	phy->ops.write_i2c_byte = e1000_write_i2c_byte_generic;

	if (hw->phy.media_type != e1000_media_type_copper) {
		phy->type = e1000_phy_none;
		goto out;
	}

	phy->ops.power_up   = e1000_power_up_phy_copper;
	phy->ops.power_down = e1000_power_down_phy_copper_82575;

	phy->autoneg_mask	= AUTONEG_ADVERTISE_SPEED_DEFAULT;
	phy->reset_delay_us	= 100;

	phy->ops.acquire	= e1000_acquire_phy_82575;
	phy->ops.check_reset_block = e1000_check_reset_block_generic;
	phy->ops.commit		= e1000_phy_sw_reset_generic;
	phy->ops.get_cfg_done	= e1000_get_cfg_done_82575;
	phy->ops.release	= e1000_release_phy_82575;

	ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);

	if (e1000_sgmii_active_82575(hw)) {
		phy->ops.reset = e1000_phy_hw_reset_sgmii_82575;
		ctrl_ext |= E1000_CTRL_I2C_ENA;
	} else {
		phy->ops.reset = e1000_phy_hw_reset_generic;
		ctrl_ext &= ~E1000_CTRL_I2C_ENA;
	}

	E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
	e1000_reset_mdicnfg_82580(hw);

	if (e1000_sgmii_active_82575(hw) && !e1000_sgmii_uses_mdio_82575(hw)) {
		phy->ops.read_reg = e1000_read_phy_reg_sgmii_82575;
		phy->ops.write_reg = e1000_write_phy_reg_sgmii_82575;
	} else {
		switch (hw->mac.type) {
		case e1000_82580:
		case e1000_i350:
		case e1000_i354:
			phy->ops.read_reg = e1000_read_phy_reg_82580;
			phy->ops.write_reg = e1000_write_phy_reg_82580;
			break;
		case e1000_i210:
		case e1000_i211:
			phy->ops.read_reg = e1000_read_phy_reg_gs40g;
			phy->ops.write_reg = e1000_write_phy_reg_gs40g;
			break;
		default:
			phy->ops.read_reg = e1000_read_phy_reg_igp;
			phy->ops.write_reg = e1000_write_phy_reg_igp;
		}
	}

	/* Set phy->phy_addr and phy->id. */
	ret_val = e1000_get_phy_id_82575(hw);

	/* Verify phy id and set remaining function pointers */
	switch (phy->id) {
	case M88E1543_E_PHY_ID:
	case M88E1512_E_PHY_ID:
	case I347AT4_E_PHY_ID:
	case M88E1112_E_PHY_ID:
	case M88E1340M_E_PHY_ID:
	case M88E1111_I_PHY_ID:
		phy->type		= e1000_phy_m88;
		phy->ops.check_polarity	= e1000_check_polarity_m88;
		phy->ops.get_info	= e1000_get_phy_info_m88;
		if (phy->id == I347AT4_E_PHY_ID ||
		    phy->id == M88E1112_E_PHY_ID ||
		    phy->id == M88E1340M_E_PHY_ID)
			phy->ops.get_cable_length =
					 e1000_get_cable_length_m88_gen2;
		else if (phy->id == M88E1543_E_PHY_ID ||
			 phy->id == M88E1512_E_PHY_ID)
			phy->ops.get_cable_length =
					 e1000_get_cable_length_m88_gen2;
		else
			phy->ops.get_cable_length = e1000_get_cable_length_m88;
		phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_m88;
		/* Check if this PHY is confgured for media swap. */
		if (phy->id == M88E1112_E_PHY_ID) {
			u16 data;

			ret_val = phy->ops.write_reg(hw,
						     E1000_M88E1112_PAGE_ADDR,
						     2);
			if (ret_val)
				goto out;

			ret_val = phy->ops.read_reg(hw,
						    E1000_M88E1112_MAC_CTRL_1,
						    &data);
			if (ret_val)
				goto out;

			data = (data & E1000_M88E1112_MAC_CTRL_1_MODE_MASK) >>
			       E1000_M88E1112_MAC_CTRL_1_MODE_SHIFT;
			if (data == E1000_M88E1112_AUTO_COPPER_SGMII ||
			    data == E1000_M88E1112_AUTO_COPPER_BASEX)
				hw->mac.ops.check_for_link =
						e1000_check_for_link_media_swap;
		}
		break;
	case IGP03E1000_E_PHY_ID:
	case IGP04E1000_E_PHY_ID:
		phy->type = e1000_phy_igp_3;
		phy->ops.check_polarity = e1000_check_polarity_igp;
		phy->ops.get_info = e1000_get_phy_info_igp;
		phy->ops.get_cable_length = e1000_get_cable_length_igp_2;
		phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_igp;
		phy->ops.set_d0_lplu_state = e1000_set_d0_lplu_state_82575;
		phy->ops.set_d3_lplu_state = e1000_set_d3_lplu_state_generic;
		break;
	case I82580_I_PHY_ID:
	case I350_I_PHY_ID:
		phy->type = e1000_phy_82580;
		phy->ops.check_polarity = e1000_check_polarity_82577;
		phy->ops.force_speed_duplex =
					 e1000_phy_force_speed_duplex_82577;
		phy->ops.get_cable_length = e1000_get_cable_length_82577;
		phy->ops.get_info = e1000_get_phy_info_82577;
		phy->ops.set_d0_lplu_state = e1000_set_d0_lplu_state_82580;
		phy->ops.set_d3_lplu_state = e1000_set_d3_lplu_state_82580;
		break;
	case I210_I_PHY_ID:
		phy->type		= e1000_phy_i210;
		phy->ops.check_polarity	= e1000_check_polarity_m88;
		phy->ops.get_info	= e1000_get_phy_info_m88;
		phy->ops.get_cable_length = e1000_get_cable_length_m88_gen2;
		phy->ops.set_d0_lplu_state = e1000_set_d0_lplu_state_82580;
		phy->ops.set_d3_lplu_state = e1000_set_d3_lplu_state_82580;
		phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_m88;
		break;
	default:
		ret_val = -E1000_ERR_PHY;
		goto out;
	}

out:
	return ret_val;
}

/**
 *  e1000_init_nvm_params_82575 - Init NVM func ptrs.
 *  @hw: pointer to the HW structure
 **/
s32 e1000_init_nvm_params_82575(struct e1000_hw *hw)
{
	struct e1000_nvm_info *nvm = &hw->nvm;
	u32 eecd = E1000_READ_REG(hw, E1000_EECD);
	u16 size;

	DEBUGFUNC("e1000_init_nvm_params_82575");

	size = (u16)((eecd & E1000_EECD_SIZE_EX_MASK) >>
		     E1000_EECD_SIZE_EX_SHIFT);
	/*
	 * Added to a constant, "size" becomes the left-shift value
	 * for setting word_size.
	 */
	size += NVM_WORD_SIZE_BASE_SHIFT;

	/* Just in case size is out of range, cap it to the largest
	 * EEPROM size supported
	 */
	if (size > 15)
		size = 15;

	nvm->word_size = 1 << size;
	if (hw->mac.type < e1000_i210) {
		nvm->opcode_bits = 8;
		nvm->delay_usec = 1;

		switch (nvm->override) {
		case e1000_nvm_override_spi_large:
			nvm->page_size = 32;
			nvm->address_bits = 16;
			break;
		case e1000_nvm_override_spi_small:
			nvm->page_size = 8;
			nvm->address_bits = 8;
			break;
		default:
			nvm->page_size = eecd & E1000_EECD_ADDR_BITS ? 32 : 8;
			nvm->address_bits = eecd & E1000_EECD_ADDR_BITS ?
					    16 : 8;
			break;
		}
		if (nvm->word_size == (1 << 15))
			nvm->page_size = 128;

		nvm->type = e1000_nvm_eeprom_spi;
	} else {
		nvm->type = e1000_nvm_flash_hw;
	}

	/* Function Pointers */
	nvm->ops.acquire = e1000_acquire_nvm_82575;
	nvm->ops.release = e1000_release_nvm_82575;
	if (nvm->word_size < (1 << 15))
		nvm->ops.read = e1000_read_nvm_eerd;
	else
		nvm->ops.read = e1000_read_nvm_spi;

	nvm->ops.write = e1000_write_nvm_spi;
	nvm->ops.validate = e1000_validate_nvm_checksum_generic;
	nvm->ops.update = e1000_update_nvm_checksum_generic;
	nvm->ops.valid_led_default = e1000_valid_led_default_82575;

	/* override generic family function pointers for specific descendants */
	switch (hw->mac.type) {
	case e1000_82580:
		nvm->ops.validate = e1000_validate_nvm_checksum_82580;
		nvm->ops.update = e1000_update_nvm_checksum_82580;
		break;
	case e1000_i350:
		nvm->ops.validate = e1000_validate_nvm_checksum_i350;
		nvm->ops.update = e1000_update_nvm_checksum_i350;
		break;
	default:
		break;
	}

	return E1000_SUCCESS;
}

/**
 *  e1000_init_mac_params_82575 - Init MAC func ptrs.
 *  @hw: pointer to the HW structure
 **/
STATIC s32 e1000_init_mac_params_82575(struct e1000_hw *hw)
{
	struct e1000_mac_info *mac = &hw->mac;
	struct e1000_dev_spec_82575 *dev_spec = &hw->dev_spec._82575;

	DEBUGFUNC("e1000_init_mac_params_82575");

	/* Derives media type */
	e1000_get_media_type_82575(hw);
	/* Set mta register count */
	mac->mta_reg_count = 128;
	/* Set uta register count */
	mac->uta_reg_count = (hw->mac.type == e1000_82575) ? 0 : 128;<commit_msg>e1000/base: fix i354<commit_after>/*******************************************************************************

Copyright (c) 2001-2012, Intel Corporation
All rights reserved.

Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:

 1. Redistributions of source code must retain the above copyright notice,
    this list of conditions and the following disclaimer.

 2. Redistributions in binary form must reproduce the above copyright
    notice, this list of conditions and the following disclaimer in the
    documentation and/or other materials provided with the distribution.

 3. Neither the name of the Intel Corporation nor the names of its
    contributors may be used to endorse or promote products derived from
    this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.

***************************************************************************/

/*
 * 82575EB Gigabit Network Connection
 * 82575EB Gigabit Backplane Connection
 * 82575GB Gigabit Network Connection
 * 82576 Gigabit Network Connection
 * 82576 Quad Port Gigabit Mezzanine Adapter
 * 82580 Gigabit Network Connection
 * I350 Gigabit Network Connection
 */

#include "e1000_api.h"
#include "e1000_i210.h"

STATIC s32  e1000_init_phy_params_82575(struct e1000_hw *hw);
STATIC s32  e1000_init_mac_params_82575(struct e1000_hw *hw);
STATIC s32  e1000_acquire_phy_82575(struct e1000_hw *hw);
STATIC void e1000_release_phy_82575(struct e1000_hw *hw);
STATIC s32  e1000_acquire_nvm_82575(struct e1000_hw *hw);
STATIC void e1000_release_nvm_82575(struct e1000_hw *hw);
STATIC s32  e1000_check_for_link_82575(struct e1000_hw *hw);
STATIC s32  e1000_check_for_link_media_swap(struct e1000_hw *hw);
STATIC s32  e1000_get_cfg_done_82575(struct e1000_hw *hw);
STATIC s32  e1000_get_link_up_info_82575(struct e1000_hw *hw, u16 *speed,
					 u16 *duplex);
STATIC s32  e1000_phy_hw_reset_sgmii_82575(struct e1000_hw *hw);
STATIC s32  e1000_read_phy_reg_sgmii_82575(struct e1000_hw *hw, u32 offset,
					   u16 *data);
STATIC s32  e1000_reset_hw_82575(struct e1000_hw *hw);
STATIC s32  e1000_reset_hw_82580(struct e1000_hw *hw);
STATIC s32  e1000_read_phy_reg_82580(struct e1000_hw *hw,
				     u32 offset, u16 *data);
STATIC s32  e1000_write_phy_reg_82580(struct e1000_hw *hw,
				      u32 offset, u16 data);
STATIC s32  e1000_set_d0_lplu_state_82580(struct e1000_hw *hw,
					  bool active);
STATIC s32  e1000_set_d3_lplu_state_82580(struct e1000_hw *hw,
					  bool active);
STATIC s32  e1000_set_d0_lplu_state_82575(struct e1000_hw *hw,
					  bool active);
STATIC s32  e1000_setup_copper_link_82575(struct e1000_hw *hw);
STATIC s32  e1000_setup_serdes_link_82575(struct e1000_hw *hw);
STATIC s32  e1000_get_media_type_82575(struct e1000_hw *hw);
STATIC s32  e1000_set_sfp_media_type_82575(struct e1000_hw *hw);
STATIC s32  e1000_valid_led_default_82575(struct e1000_hw *hw, u16 *data);
STATIC s32  e1000_write_phy_reg_sgmii_82575(struct e1000_hw *hw,
					    u32 offset, u16 data);
STATIC void e1000_clear_hw_cntrs_82575(struct e1000_hw *hw);
STATIC s32  e1000_acquire_swfw_sync_82575(struct e1000_hw *hw, u16 mask);
STATIC s32  e1000_get_pcs_speed_and_duplex_82575(struct e1000_hw *hw,
						 u16 *speed, u16 *duplex);
STATIC s32  e1000_get_phy_id_82575(struct e1000_hw *hw);
STATIC void e1000_release_swfw_sync_82575(struct e1000_hw *hw, u16 mask);
STATIC bool e1000_sgmii_active_82575(struct e1000_hw *hw);
STATIC s32  e1000_reset_init_script_82575(struct e1000_hw *hw);
STATIC s32  e1000_read_mac_addr_82575(struct e1000_hw *hw);
STATIC void e1000_config_collision_dist_82575(struct e1000_hw *hw);
STATIC void e1000_power_down_phy_copper_82575(struct e1000_hw *hw);
STATIC void e1000_shutdown_serdes_link_82575(struct e1000_hw *hw);
STATIC void e1000_power_up_serdes_link_82575(struct e1000_hw *hw);
STATIC s32 e1000_set_pcie_completion_timeout(struct e1000_hw *hw);
STATIC s32 e1000_reset_mdicnfg_82580(struct e1000_hw *hw);
STATIC s32 e1000_validate_nvm_checksum_82580(struct e1000_hw *hw);
STATIC s32 e1000_update_nvm_checksum_82580(struct e1000_hw *hw);
STATIC s32 e1000_update_nvm_checksum_with_offset(struct e1000_hw *hw,
						 u16 offset);
STATIC s32 e1000_validate_nvm_checksum_with_offset(struct e1000_hw *hw,
						   u16 offset);
STATIC s32 e1000_validate_nvm_checksum_i350(struct e1000_hw *hw);
STATIC s32 e1000_update_nvm_checksum_i350(struct e1000_hw *hw);
STATIC void e1000_write_vfta_i350(struct e1000_hw *hw, u32 offset, u32 value);
STATIC void e1000_clear_vfta_i350(struct e1000_hw *hw);

STATIC void e1000_i2c_start(struct e1000_hw *hw);
STATIC void e1000_i2c_stop(struct e1000_hw *hw);
STATIC s32 e1000_clock_in_i2c_byte(struct e1000_hw *hw, u8 *data);
STATIC s32 e1000_clock_out_i2c_byte(struct e1000_hw *hw, u8 data);
STATIC s32 e1000_get_i2c_ack(struct e1000_hw *hw);
STATIC s32 e1000_clock_in_i2c_bit(struct e1000_hw *hw, bool *data);
STATIC s32 e1000_clock_out_i2c_bit(struct e1000_hw *hw, bool data);
STATIC void e1000_raise_i2c_clk(struct e1000_hw *hw, u32 *i2cctl);
STATIC void e1000_lower_i2c_clk(struct e1000_hw *hw, u32 *i2cctl);
STATIC s32 e1000_set_i2c_data(struct e1000_hw *hw, u32 *i2cctl, bool data);
STATIC bool e1000_get_i2c_data(u32 *i2cctl);

STATIC const u16 e1000_82580_rxpbs_table[] = {
	36, 72, 144, 1, 2, 4, 8, 16, 35, 70, 140 };
#define E1000_82580_RXPBS_TABLE_SIZE \
	(sizeof(e1000_82580_rxpbs_table) / \
	 sizeof(e1000_82580_rxpbs_table[0]))


/**
 *  e1000_sgmii_uses_mdio_82575 - Determine if I2C pins are for external MDIO
 *  @hw: pointer to the HW structure
 *
 *  Called to determine if the I2C pins are being used for I2C or as an
 *  external MDIO interface since the two options are mutually exclusive.
 **/
STATIC bool e1000_sgmii_uses_mdio_82575(struct e1000_hw *hw)
{
	u32 reg = 0;
	bool ext_mdio = false;

	DEBUGFUNC("e1000_sgmii_uses_mdio_82575");

	switch (hw->mac.type) {
	case e1000_82575:
	case e1000_82576:
		reg = E1000_READ_REG(hw, E1000_MDIC);
		ext_mdio = !!(reg & E1000_MDIC_DEST);
		break;
	case e1000_82580:
	case e1000_i350:
	case e1000_i354:
	case e1000_i210:
	case e1000_i211:
		reg = E1000_READ_REG(hw, E1000_MDICNFG);
		ext_mdio = !!(reg & E1000_MDICNFG_EXT_MDIO);
		break;
	default:
		break;
	}
	return ext_mdio;
}

/**
 *  e1000_init_phy_params_82575 - Init PHY func ptrs.
 *  @hw: pointer to the HW structure
 **/
STATIC s32 e1000_init_phy_params_82575(struct e1000_hw *hw)
{
	struct e1000_phy_info *phy = &hw->phy;
	s32 ret_val = E1000_SUCCESS;
	u32 ctrl_ext;

	DEBUGFUNC("e1000_init_phy_params_82575");

	phy->ops.read_i2c_byte = e1000_read_i2c_byte_generic;
	phy->ops.write_i2c_byte = e1000_write_i2c_byte_generic;

	if (hw->phy.media_type != e1000_media_type_copper) {
		phy->type = e1000_phy_none;
		goto out;
	}

	phy->ops.power_up   = e1000_power_up_phy_copper;
	phy->ops.power_down = e1000_power_down_phy_copper_82575;

	phy->autoneg_mask	= AUTONEG_ADVERTISE_SPEED_DEFAULT;
	phy->reset_delay_us	= 100;

	phy->ops.acquire	= e1000_acquire_phy_82575;
	phy->ops.check_reset_block = e1000_check_reset_block_generic;
	phy->ops.commit		= e1000_phy_sw_reset_generic;
	phy->ops.get_cfg_done	= e1000_get_cfg_done_82575;
	phy->ops.release	= e1000_release_phy_82575;

	ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);

	if (e1000_sgmii_active_82575(hw)) {
		phy->ops.reset = e1000_phy_hw_reset_sgmii_82575;
		ctrl_ext |= E1000_CTRL_I2C_ENA;
	} else {
		phy->ops.reset = e1000_phy_hw_reset_generic;
		ctrl_ext &= ~E1000_CTRL_I2C_ENA;
	}

	E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
	e1000_reset_mdicnfg_82580(hw);

	if (e1000_sgmii_active_82575(hw) && !e1000_sgmii_uses_mdio_82575(hw)) {
		phy->ops.read_reg = e1000_read_phy_reg_sgmii_82575;
		phy->ops.write_reg = e1000_write_phy_reg_sgmii_82575;
	} else {
		switch (hw->mac.type) {
		case e1000_82580:
		case e1000_i350:
		case e1000_i354:
			phy->ops.read_reg = e1000_read_phy_reg_82580;
			phy->ops.write_reg = e1000_write_phy_reg_82580;
			break;
		case e1000_i210:
		case e1000_i211:
			phy->ops.read_reg = e1000_read_phy_reg_gs40g;
			phy->ops.write_reg = e1000_write_phy_reg_gs40g;
			break;
		default:
			phy->ops.read_reg = e1000_read_phy_reg_igp;
			phy->ops.write_reg = e1000_write_phy_reg_igp;
		}
	}

	/* Set phy->phy_addr and phy->id. */
	ret_val = e1000_get_phy_id_82575(hw);

	/* Verify phy id and set remaining function pointers */
	switch (phy->id) {
	case M88E1543_E_PHY_ID:
	case M88E1512_E_PHY_ID:
	case I347AT4_E_PHY_ID:
	case M88E1112_E_PHY_ID:
	case M88E1340M_E_PHY_ID:
	case M88E1111_I_PHY_ID:
		phy->type		= e1000_phy_m88;
		phy->ops.check_polarity	= e1000_check_polarity_m88;
		phy->ops.get_info	= e1000_get_phy_info_m88;
		if (phy->id == I347AT4_E_PHY_ID ||
		    phy->id == M88E1112_E_PHY_ID ||
		    phy->id == M88E1340M_E_PHY_ID)
			phy->ops.get_cable_length =
					 e1000_get_cable_length_m88_gen2;
		else if (phy->id == M88E1543_E_PHY_ID ||
			 phy->id == M88E1512_E_PHY_ID)
			phy->ops.get_cable_length =
					 e1000_get_cable_length_m88_gen2;
		else
			phy->ops.get_cable_length = e1000_get_cable_length_m88;
		phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_m88;
		/* Check if this PHY is confgured for media swap. */
		if (phy->id == M88E1112_E_PHY_ID) {
			u16 data;

			ret_val = phy->ops.write_reg(hw,
						     E1000_M88E1112_PAGE_ADDR,
						     2);
			if (ret_val)
				goto out;

			ret_val = phy->ops.read_reg(hw,
						    E1000_M88E1112_MAC_CTRL_1,
						    &data);
			if (ret_val)
				goto out;

			data = (data & E1000_M88E1112_MAC_CTRL_1_MODE_MASK) >>
			       E1000_M88E1112_MAC_CTRL_1_MODE_SHIFT;
			if (data == E1000_M88E1112_AUTO_COPPER_SGMII ||
			    data == E1000_M88E1112_AUTO_COPPER_BASEX)
				hw->mac.ops.check_for_link =
						e1000_check_for_link_media_swap;
		}
		break;
	case IGP03E1000_E_PHY_ID:
	case IGP04E1000_E_PHY_ID:
		phy->type = e1000_phy_igp_3;
		phy->ops.check_polarity = e1000_check_polarity_igp;
		phy->ops.get_info = e1000_get_phy_info_igp;
		phy->ops.get_cable_length = e1000_get_cable_length_igp_2;
		phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_igp;
		phy->ops.set_d0_lplu_state = e1000_set_d0_lplu_state_82575;
		phy->ops.set_d3_lplu_state = e1000_set_d3_lplu_state_generic;
		break;
	case I82580_I_PHY_ID:
	case I350_I_PHY_ID:
		phy->type = e1000_phy_82580;
		phy->ops.check_polarity = e1000_check_polarity_82577;
		phy->ops.force_speed_duplex =
					 e1000_phy_force_speed_duplex_82577;
		phy->ops.get_cable_length = e1000_get_cable_length_82577;
		phy->ops.get_info = e1000_get_phy_info_82577;
		phy->ops.set_d0_lplu_state = e1000_set_d0_lplu_state_82580;
		phy->ops.set_d3_lplu_state = e1000_set_d3_lplu_state_82580;
		break;
	case I210_I_PHY_ID:
		phy->type		= e1000_phy_i210;
		phy->ops.check_polarity	= e1000_check_polarity_m88;
		phy->ops.get_info	= e1000_get_phy_info_m88;
		phy->ops.get_cable_length = e1000_get_cable_length_m88_gen2;
		phy->ops.set_d0_lplu_state = e1000_set_d0_lplu_state_82580;
		phy->ops.set_d3_lplu_state = e1000_set_d3_lplu_state_82580;
		phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_m88;
		break;
	default:
		ret_val = -E1000_ERR_PHY;
		goto out;
	}

out:
	return ret_val;
}

/**
 *  e1000_init_nvm_params_82575 - Init NVM func ptrs.
 *  @hw: pointer to the HW structure
 **/
s32 e1000_init_nvm_params_82575(struct e1000_hw *hw)
{
	struct e1000_nvm_info *nvm = &hw->nvm;
	u32 eecd = E1000_READ_REG(hw, E1000_EECD);
	u16 size;

	DEBUGFUNC("e1000_init_nvm_params_82575");

	size = (u16)((eecd & E1000_EECD_SIZE_EX_MASK) >>
		     E1000_EECD_SIZE_EX_SHIFT);
	/*
	 * Added to a constant, "size" becomes the left-shift value
	 * for setting word_size.
	 */
	size += NVM_WORD_SIZE_BASE_SHIFT;

	/* Just in case size is out of range, cap it to the largest
	 * EEPROM size supported
	 */
	if (size > 15)
		size = 15;

	nvm->word_size = 1 << size;
	if (hw->mac.type < e1000_i210) {
		nvm->opcode_bits = 8;
		nvm->delay_usec = 1;

		switch (nvm->override) {
		case e1000_nvm_override_spi_large:
			nvm->page_size = 32;
			nvm->address_bits = 16;
			break;
		case e1000_nvm_override_spi_small:
			nvm->page_size = 8;
			nvm->address_bits = 8;
			break;
		default:
			nvm->page_size = eecd & E1000_EECD_ADDR_BITS ? 32 : 8;
			nvm->address_bits = eecd & E1000_EECD_ADDR_BITS ?
					    16 : 8;
			break;
		}
		if (nvm->word_size == (1 << 15))
			nvm->page_size = 128;

		nvm->type = e1000_nvm_eeprom_spi;
	} else {
		nvm->type = e1000_nvm_flash_hw;
	}

	/* Function Pointers */
	nvm->ops.acquire = e1000_acquire_nvm_82575;
	nvm->ops.release = e1000_release_nvm_82575;
	if (nvm->word_size < (1 << 15))
		nvm->ops.read = e1000_read_nvm_eerd;
	else
		nvm->ops.read = e1000_read_nvm_spi;

	nvm->ops.write = e1000_write_nvm_spi;
	nvm->ops.validate = e1000_validate_nvm_checksum_generic;
	nvm->ops.update = e1000_update_nvm_checksum_generic;
	nvm->ops.valid_led_default = e1000_valid_led_default_82575;

	/* override generic family function pointers for specific descendants */
	switch (hw->mac.type) {
	case e1000_82580:
		nvm->ops.validate = e1000_validate_nvm_checksum_82580;
		nvm->ops.update = e1000_update_nvm_checksum_82580;
		break;
	case e1000_i350:
	case e1000_i354:
		nvm->ops.validate = e1000_validate_nvm_checksum_i350;
		nvm->ops.update = e1000_update_nvm_checksum_i350;
		break;
	default:
		break;
	}

	return E1000_SUCCESS;
}

/**
 *  e1000_init_mac_params_82575 - Init MAC func ptrs.
 *  @hw: pointer to the HW structure
 **/
STATIC s32 e1000_init_mac_params_82575(struct e1000_hw *hw)
{
	struct e1000_mac_info *mac = &hw->mac;
	struct e1000_dev_spec_82575 *dev_spec = &hw->dev_spec._82575;

	DEBUGFUNC("e1000_init_mac_params_82575");

	/* Derives media type */
	e1000_get_media_type_82575(hw);
	/* Set mta register count */
	mac->mta_reg_count = 128;
	/* Set uta register count */
	mac->uta_reg_count = (hw->mac.type == e1000_82575) ? 0 : 128;
{'fraction_non_alphanumeric': 0.09534124118961664, 'fraction_numerical': 0.1381468110709988, 'mean_word_length': 5.174060708978986, 'pattern_counts': {'":': 0, '<': 19, '<?xml version=': 0, '>': 215, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
{'dir': 'git-commits-cleaned', 'id': '7576115', 'n_tokens_mistral': 15277, 'n_tokens_neox': 11707, 'n_words': 2385}