<commit_before>/*
 * Copyright (c) 2016 Open-RnD Sp. z o.o.
 * Copyright (c) 2016 BayLibre, SAS
 * Copyright (c) 2018-2019 Centaur Analytics, Inc
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#ifndef ZEPHYR_DRIVERS_PINMUX_STM32_PINMUX_STM32L4X_H_
#define ZEPHYR_DRIVERS_PINMUX_STM32_PINMUX_STM32L4X_H_

/**
 * @file Header for STM32L4X pin multiplexing helper
 */

/*
 * Note: The SPIx_SCK and MOSI pin speeds must be set to VERY_HIGH to
 * avoid device hangs during boot with higher SPI speeds (e.g. 40MHz
 * on L4+)
 */

/* Port A */
#define STM32L4X_PINMUX_FUNC_PA0_PWM2_CH1                                      \
	(STM32_PINMUX_ALT_FUNC_1 | STM32_PUSHPULL_NOPULL)
#define STM32L4X_PINMUX_FUNC_PA0_USART2_CTS                                    \
	(STM32_PINMUX_ALT_FUNC_7 | STM32_OPENDRAIN_PULLUP)
#define STM32L4X_PINMUX_FUNC_PA0_UART4_TX                                      \
	(STM32_PINMUX_ALT_FUNC_8 | STM32_PUSHPULL_PULLUP)
#define STM32L4X_PINMUX_FUNC_PA0_ADC12_IN5 STM32_MODER_ANALOG_MODE

#define STM32L4X_PINMUX_FUNC_PA1_USART2_RTS                                    \
	(STM32_PINMUX_ALT_FUNC_7 | STM32_OPENDRAIN_PULLUP)
#define STM32L4X_PINMUX_FUNC_PA1_UART4_RX                                      \
	(STM32_PINMUX_ALT_FUNC_8 | STM32_PUPDR_NO_PULL)
#define STM32L4X_PINMUX_FUNC_PA1_ADC12_IN6 STM32_MODER_ANALOG_MODE

#define STM32L4X_PINMUX_FUNC_PA2_USART2_TX                                     \
	(STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_PULLUP)
#define STM32L4X_PINMUX_FUNC_PA2_ADC12_IN7 STM32_MODER_ANALOG_MODE

#define STM32L4X_PINMUX_FUNC_PA3_USART2_RX                                     \
	(STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_PULLUP)
#define STM32L4X_PINMUX_FUNC_PA3_ADC12_IN8 STM32_MODER_ANALOG_MODE

#define STM32L4X_PINMUX_FUNC_PA4_SPI1_NSS                                      \
	(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_PULLUP)
#define STM32L4X_PINMUX_FUNC_PA4_ADC12_IN9 STM32_MODER_ANALOG_MODE

#define STM32L4X_PINMUX_FUNC_PA5_PWM2_CH1                                      \
	(STM32_PINMUX_ALT_FUNC_1 | STM32_PUSHPULL_NOPULL)
#define STM32L4X_PINMUX_FUNC_PA5_SPI1_SCK                                      \
	(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN | \
	 STM32_OSPEEDR_VERY_HIGH_SPEED)
#define STM32L4X_PINMUX_FUNC_PA5_ADC12_IN10 STM32_MODER_ANALOG_MODE

#define STM32L4X_PINMUX_FUNC_PA6_SPI1_MISO                                     \
	(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN)
#define STM32L4X_PINMUX_FUNC_PA6_USART3_CTS                                    \
	(STM32_PINMUX_ALT_FUNC_7 | STM32_OPENDRAIN_PULLUP)
#define STM32L4X_PINMUX_FUNC_PA6_LPUART1_CTS                                   \
	(STM32_PINMUX_ALT_FUNC_8 | STM32_OPENDRAIN_PULLUP)
#define STM32L4X_PINMUX_FUNC_PA6_ADC12_IN11 STM32_MODER_ANALOG_MODE

#if defined(CONFIG_SOC_STM32L496XX)
#define STM32L4X_PINMUX_FUNC_PA7_I2C3_SCL                                      \
	(STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP)
#endif /* CONFIG_SOC_STM32L496XX */
#define STM32L4X_PINMUX_FUNC_PA7_SPI1_MOSI                                     \
	(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN | \
	 STM32_OSPEEDR_VERY_HIGH_SPEED)
#define STM32L4X_PINMUX_FUNC_PA7_ADC12_IN12 STM32_MODER_ANALOG_MODE

#define STM32L4X_PINMUX_FUNC_PA9_USART1_TX                                     \
	(STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_PULLUP)

#define STM32L4X_PINMUX_FUNC_PA10_USART1_RX                                    \
	(STM32_PINMUX_ALT_FUNC_7 | STM32_PUPDR_NO_PULL)
#define STM32L4X_PINMUX_FUNC_PA10_OTG_FS_ID                                    \
	(STM32_PINMUX_ALT_FUNC_10 | STM32_PUSHPULL_PULLUP)

#define STM32L4X_PINMUX_FUNC_PA11_USART1_CTS                                   \
	(STM32_PINMUX_ALT_FUNC_7 | STM32_OPENDRAIN_PULLUP)
#define STM32L4X_PINMUX_FUNC_PA11_CAN_RX                                       \
	(STM32_PINMUX_ALT_FUNC_9 | STM32_PUSHPULL_NOPULL)
#define STM32L4X_PINMUX_FUNC_PA11_OTG_FS_DM                                    \
	(STM32_PINMUX_ALT_FUNC_10 | STM32_PUSHPULL_NOPULL)

#define STM32L4X_PINMUX_FUNC_PA12_USART1_RTS                                   \
	(STM32_PINMUX_ALT_FUNC_7 | STM32_OPENDRAIN_PULLUP)
#define STM32L4X_PINMUX_FUNC_PA12_CAN_TX                                       \<commit_msg>drivers: pinmux: stm32l4: Add extra pins for I2C1<commit_after>/*
 * Copyright (c) 2016 Open-RnD Sp. z o.o.
 * Copyright (c) 2016 BayLibre, SAS
 * Copyright (c) 2018-2019 Centaur Analytics, Inc
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#ifndef ZEPHYR_DRIVERS_PINMUX_STM32_PINMUX_STM32L4X_H_
#define ZEPHYR_DRIVERS_PINMUX_STM32_PINMUX_STM32L4X_H_

/**
 * @file Header for STM32L4X pin multiplexing helper
 */

/*
 * Note: The SPIx_SCK and MOSI pin speeds must be set to VERY_HIGH to
 * avoid device hangs during boot with higher SPI speeds (e.g. 40MHz
 * on L4+)
 */

/* Port A */
#define STM32L4X_PINMUX_FUNC_PA0_PWM2_CH1                                      \
	(STM32_PINMUX_ALT_FUNC_1 | STM32_PUSHPULL_NOPULL)
#define STM32L4X_PINMUX_FUNC_PA0_USART2_CTS                                    \
	(STM32_PINMUX_ALT_FUNC_7 | STM32_OPENDRAIN_PULLUP)
#define STM32L4X_PINMUX_FUNC_PA0_UART4_TX                                      \
	(STM32_PINMUX_ALT_FUNC_8 | STM32_PUSHPULL_PULLUP)
#define STM32L4X_PINMUX_FUNC_PA0_ADC12_IN5 STM32_MODER_ANALOG_MODE

#define STM32L4X_PINMUX_FUNC_PA1_USART2_RTS                                    \
	(STM32_PINMUX_ALT_FUNC_7 | STM32_OPENDRAIN_PULLUP)
#define STM32L4X_PINMUX_FUNC_PA1_UART4_RX                                      \
	(STM32_PINMUX_ALT_FUNC_8 | STM32_PUPDR_NO_PULL)
#define STM32L4X_PINMUX_FUNC_PA1_ADC12_IN6 STM32_MODER_ANALOG_MODE

#define STM32L4X_PINMUX_FUNC_PA2_USART2_TX                                     \
	(STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_PULLUP)
#define STM32L4X_PINMUX_FUNC_PA2_ADC12_IN7 STM32_MODER_ANALOG_MODE

#define STM32L4X_PINMUX_FUNC_PA3_USART2_RX                                     \
	(STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_PULLUP)
#define STM32L4X_PINMUX_FUNC_PA3_ADC12_IN8 STM32_MODER_ANALOG_MODE

#define STM32L4X_PINMUX_FUNC_PA4_SPI1_NSS                                      \
	(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_PULLUP)
#define STM32L4X_PINMUX_FUNC_PA4_ADC12_IN9 STM32_MODER_ANALOG_MODE

#define STM32L4X_PINMUX_FUNC_PA5_PWM2_CH1                                      \
	(STM32_PINMUX_ALT_FUNC_1 | STM32_PUSHPULL_NOPULL)
#define STM32L4X_PINMUX_FUNC_PA5_SPI1_SCK                                      \
	(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN | \
	 STM32_OSPEEDR_VERY_HIGH_SPEED)
#define STM32L4X_PINMUX_FUNC_PA5_ADC12_IN10 STM32_MODER_ANALOG_MODE

#define STM32L4X_PINMUX_FUNC_PA6_SPI1_MISO                                     \
	(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN)
#define STM32L4X_PINMUX_FUNC_PA6_USART3_CTS                                    \
	(STM32_PINMUX_ALT_FUNC_7 | STM32_OPENDRAIN_PULLUP)
#define STM32L4X_PINMUX_FUNC_PA6_LPUART1_CTS                                   \
	(STM32_PINMUX_ALT_FUNC_8 | STM32_OPENDRAIN_PULLUP)
#define STM32L4X_PINMUX_FUNC_PA6_ADC12_IN11 STM32_MODER_ANALOG_MODE

#if defined(CONFIG_SOC_STM32L496XX)
#define STM32L4X_PINMUX_FUNC_PA7_I2C3_SCL                                      \
	(STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP)
#endif /* CONFIG_SOC_STM32L496XX */
#define STM32L4X_PINMUX_FUNC_PA7_SPI1_MOSI                                     \
	(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN | \
	 STM32_OSPEEDR_VERY_HIGH_SPEED)
#define STM32L4X_PINMUX_FUNC_PA7_ADC12_IN12 STM32_MODER_ANALOG_MODE

#define STM32L4X_PINMUX_FUNC_PA9_I2C1_SCL                                      \
	(STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP)
#define STM32L4X_PINMUX_FUNC_PA9_USART1_TX                                     \
	(STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_PULLUP)

#define STM32L4X_PINMUX_FUNC_PA10_I2C1_SDA                                     \
	(STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP)
#define STM32L4X_PINMUX_FUNC_PA10_USART1_RX                                    \
	(STM32_PINMUX_ALT_FUNC_7 | STM32_PUPDR_NO_PULL)
#define STM32L4X_PINMUX_FUNC_PA10_OTG_FS_ID                                    \
	(STM32_PINMUX_ALT_FUNC_10 | STM32_PUSHPULL_PULLUP)

#define STM32L4X_PINMUX_FUNC_PA11_USART1_CTS                                   \
	(STM32_PINMUX_ALT_FUNC_7 | STM32_OPENDRAIN_PULLUP)
#define STM32L4X_PINMUX_FUNC_PA11_CAN_RX                                       \
	(STM32_PINMUX_ALT_FUNC_9 | STM32_PUSHPULL_NOPULL)
#define STM32L4X_PINMUX_FUNC_PA11_OTG_FS_DM                                    \
	(STM32_PINMUX_ALT_FUNC_10 | STM32_PUSHPULL_NOPULL)

#define STM32L4X_PINMUX_FUNC_PA12_USART1_RTS                                   \
	(STM32_PINMUX_ALT_FUNC_7 | STM32_OPENDRAIN_PULLUP)
#define STM32L4X_PINMUX_FUNC_PA12_CAN_TX                                       \
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