<commit_before>import claripy
from .plugin import SimStatePlugin

class SimRegNameView(SimStatePlugin):
    def __init__(self):
        super(SimRegNameView, self).__init__()

    def __getattr__(self, k):
        try:
            return self.state.registers.load(self.state.arch.registers[k][0], self.state.arch.registers[k][1])
        except KeyError:
            return getattr(super(SimRegNameView, self), k)

    def __setattr__(self, k, v):
        if k == 'state':
            return object.__setattr__(self, k, v)

        v = _raw_ast(v)
        if not isinstance(v, claripy.Bits):
            v = self.state.se.BVV(v, self.state.arch.registers[k][1]*8)

        try:
            return self.state.registers.store(self.state.arch.registers[k][0], v)
        except KeyError:
            raise AttributeError(k)

    def __dir__(self):
        return self.state.arch.registers.keys()

    def copy(self):
        return SimRegNameView()

    def merge(self, others, merge_flag, flag_values):
        return False, [ ]

    def widen(self, others, merge_flag, flag_values):
        return False, [ ]

class SimMemView(SimStatePlugin):
    def __init__(self, ty=None, addr=None, state=None):
        super(SimMemView, self).__init__()
        self._type = ty
        self._addr = addr
        if state is not None:
            self.set_state(state)

    def set_state(self, state):
        super(SimMemView, self).set_state(state)

    def _deeper(self, **kwargs):
        if 'ty' not in kwargs:
            kwargs['ty'] = self._type
        if 'addr' not in kwargs:
            kwargs['addr'] = self._addr
        if 'state' not in kwargs:
            kwargs['state'] = self.state
        return SimMemView(**kwargs)

    def __getitem__(self, k):
        if isinstance(k, slice):
            if k.step is not None:
                raise ValueError("Slices with strides are not supported")
            elif k.start is None:
                raise ValueError("Must specify start index")
            elif k.stop is not None:
                raise ValueError("Slices with stop index are not supported")
            else:
                addr = k.start
        else:
            addr = k
        return self._deeper(addr=addr)

    def __setitem__(self, k, v):
        self.__getitem__(k).store(v)

    types = {}
    state = None

    def __repr__(self):
        value = '<unresolvable>' if not self.resolvable else self.resolved
        if isinstance(self._addr, claripy.ast.BV) and not self._addr.symbolic:
            if hasattr(self._addr.model, 'value'):
                addr = format(self._addr.model.value, '#x')
            else:
                addr = repr(self._addr.model)
        else:
            addr = repr(self._addr)
        type_name = self._type.name if self._type is not None else '<untyped>'
        return '<{} {} at {}>'.format(type_name,
                                      value,
                                      addr)

    def __dir__(self):
        return self._type._refine_dir() if self._type else SimMemView.types.keys()

    def __getattr__(self, k):
        if k in ('resolvable', 'resolved'):
            return object.__getattribute__(self, k)
        return self._type._refine(self, k) if self._type else self._deeper(ty=SimMemView.types[k](self.state.arch))

    def __setattr__(self, k, v):
        if k in ('state', '_addr', '_type'):<commit_msg>Properly raise AttributeError in SimMemView<commit_after>import claripy
from .plugin import SimStatePlugin

class SimRegNameView(SimStatePlugin):
    def __init__(self):
        super(SimRegNameView, self).__init__()

    def __getattr__(self, k):
        try:
            return self.state.registers.load(self.state.arch.registers[k][0], self.state.arch.registers[k][1])
        except KeyError:
            return getattr(super(SimRegNameView, self), k)

    def __setattr__(self, k, v):
        if k == 'state':
            return object.__setattr__(self, k, v)

        v = _raw_ast(v)
        if not isinstance(v, claripy.Bits):
            v = self.state.se.BVV(v, self.state.arch.registers[k][1]*8)

        try:
            return self.state.registers.store(self.state.arch.registers[k][0], v)
        except KeyError:
            raise AttributeError(k)

    def __dir__(self):
        return self.state.arch.registers.keys()

    def copy(self):
        return SimRegNameView()

    def merge(self, others, merge_flag, flag_values):
        return False, [ ]

    def widen(self, others, merge_flag, flag_values):
        return False, [ ]

class SimMemView(SimStatePlugin):
    def __init__(self, ty=None, addr=None, state=None):
        super(SimMemView, self).__init__()
        self._type = ty
        self._addr = addr
        if state is not None:
            self.set_state(state)

    def __getstate__(self):
        return {'type': self._type, 'addr': self._addr, 'state': self.state}

    def __setstate__(self, data):
        self.__init__(data['type'], data['addr'], data['state'])

    def set_state(self, state):
        super(SimMemView, self).set_state(state)

    def _deeper(self, **kwargs):
        if 'ty' not in kwargs:
            kwargs['ty'] = self._type
        if 'addr' not in kwargs:
            kwargs['addr'] = self._addr
        if 'state' not in kwargs:
            kwargs['state'] = self.state
        return SimMemView(**kwargs)

    def __getitem__(self, k):
        if isinstance(k, slice):
            if k.step is not None:
                raise ValueError("Slices with strides are not supported")
            elif k.start is None:
                raise ValueError("Must specify start index")
            elif k.stop is not None:
                raise ValueError("Slices with stop index are not supported")
            else:
                addr = k.start
        else:
            addr = k
        return self._deeper(addr=addr)

    def __setitem__(self, k, v):
        self.__getitem__(k).store(v)

    types = {}
    state = None

    def __repr__(self):
        value = '<unresolvable>' if not self.resolvable else self.resolved
        if isinstance(self._addr, claripy.ast.BV) and not self._addr.symbolic:
            if hasattr(self._addr.model, 'value'):
                addr = format(self._addr.model.value, '#x')
            else:
                addr = repr(self._addr.model)
        else:
            addr = repr(self._addr)
        type_name = self._type.name if self._type is not None else '<untyped>'
        return '<{} {} at {}>'.format(type_name,
                                      value,
                                      addr)

    def __dir__(self):
        return self._type._refine_dir() if self._type else SimMemView.types.keys()

    def __getattr__(self, k):
        if k in ('resolvable', 'resolved'):
            return object.__getattribute__(self, k)
        if self._type:
            return self._type._refine(self, k)
        if k in SimMemView.types:
            return self._deeper(ty=SimMemView.types[k](self.state.arch))
        raise AttributeError(k)

    def __setattr__(self, k, v):
        if k in ('state', '_addr', '_type'):
{'fraction_non_alphanumeric': 0.11588706278971765, 'fraction_numerical': 0.0014046916701783959, 'mean_word_length': 2.0466409927257168, 'pattern_counts': {'":': 0, '<': 9, '<?xml version=': 0, '>': 9, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 4, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
{'dir': 'git-commits-cleaned', 'id': '5865503', 'n_tokens_mistral': 2154, 'n_tokens_neox': 2103, 'n_words': 540}