<commit_before>message user_x86_regs_entry {
	required uint64			r15		=  1;
	required uint64			r14		=  2;
	required uint64			r13		=  3;
	required uint64			r12		=  4;
	required uint64			bp		=  5;
	required uint64			bx		=  6;
	required uint64			r11		=  7;
	required uint64			r10		=  8;
	required uint64			r9		=  9;
	required uint64			r8		= 10;
	required uint64			ax		= 11;
	required uint64			cx		= 12;
	required uint64			dx		= 13;
	required uint64			si		= 14;
	required uint64			di		= 15;
	required uint64			orig_ax	 	= 16;
	required uint64			ip	 	= 17;
	required uint64			cs		= 18;
	required uint64			flags		= 19;
	required uint64			sp		= 20;
	required uint64			ss		= 21;
	required uint64			fs_base		= 22;
	required uint64			gs_base		= 23;
	required uint64			ds		= 24;
	required uint64			es		= 25;
	required uint64			fs		= 26;
	required uint64			gs		= 27;
}

message user_x86_xsave_entry {
	required uint64			xstate_bv	=  1;
	repeated uint32			ymmh_space	=  2;
}

message user_x86_fpregs_entry {

	/* fxsave data */
	required uint32			cwd		=  1;
	required uint32			swd		=  2;
	required uint32			twd		=  3;
	required uint32			fop		=  4;
	required uint64			rip		=  5;
	required uint64			rdp		=  6;
	required uint32			mxcsr		=  7;
	required uint32			mxcsr_mask	=  8;
	repeated uint32			st_space	=  9;
	repeated uint32			xmm_space	= 10;

	/* Unused, but present for backward compatibility */
	repeated uint32			padding		= 11;

	/* xsave extension */
	optional user_x86_xsave_entry	xsave		= 13;
}

message task_core_entry {
	required uint32			task_state	= 1;
	required uint32			exit_code	= 2;

	required uint32			personality	= 3;
	required uint32			flags		= 4;
	required uint64			blk_sigset	= 5;

	required string			comm		= 6;
}

message task_kobj_ids_entry {
	required uint32			vm_id		= 1;
	required uint32			files_id	= 2;
	required uint32			fs_id		= 3;
	required uint32			sighand_id	= 4;

	optional uint32			pid_ns_id	= 5;
	optional uint32			net_ns_id	= 6;
	optional uint32			ipc_ns_id	= 7;
	optional uint32			uts_ns_id	= 8;
	optional uint32			mnt_ns_id	= 9;
}

message thread_info_x86 {
	required uint64			clear_tid_addr	= 1;
	required user_x86_regs_entry	gpregs		= 2;
	required user_x86_fpregs_entry	fpregs		= 3;
}

message thread_core_entry {
	required uint64			futex_rla	= 1;
	required uint32			futex_rla_len	= 2;
	optional sint32			sched_nice	= 3;
	optional uint32			sched_policy	= 4;
	optional uint32			sched_prio	= 5;
	optional uint64			blk_sigset	= 6;
}

message core_entry {
	enum march {
		UNKNOWN		= 0;
		X86_64		= 1;
	}

	required march			mtype		= 1;
	optional thread_info_x86	thread_info	= 2;

	optional task_core_entry	tc		= 3;
	optional task_kobj_ids_entry	ids		= 4;
	optional thread_core_entry	thread_core	= 5;
}<commit_msg>core.proto: added ARM-specific parts to a Core message<commit_after>// x86-specific

message user_x86_regs_entry {
	required uint64			r15		=  1;
	required uint64			r14		=  2;
	required uint64			r13		=  3;
	required uint64			r12		=  4;
	required uint64			bp		=  5;
	required uint64			bx		=  6;
	required uint64			r11		=  7;
	required uint64			r10		=  8;
	required uint64			r9		=  9;
	required uint64			r8		= 10;
	required uint64			ax		= 11;
	required uint64			cx		= 12;
	required uint64			dx		= 13;
	required uint64			si		= 14;
	required uint64			di		= 15;
	required uint64			orig_ax	 	= 16;
	required uint64			ip	 	= 17;
	required uint64			cs		= 18;
	required uint64			flags		= 19;
	required uint64			sp		= 20;
	required uint64			ss		= 21;
	required uint64			fs_base		= 22;
	required uint64			gs_base		= 23;
	required uint64			ds		= 24;
	required uint64			es		= 25;
	required uint64			fs		= 26;
	required uint64			gs		= 27;
}

message user_x86_xsave_entry {
	required uint64			xstate_bv	=  1;
	repeated uint32			ymmh_space	=  2;
}

message user_x86_fpregs_entry {

	/* fxsave data */
	required uint32			cwd		=  1;
	required uint32			swd		=  2;
	required uint32			twd		=  3;
	required uint32			fop		=  4;
	required uint64			rip		=  5;
	required uint64			rdp		=  6;
	required uint32			mxcsr		=  7;
	required uint32			mxcsr_mask	=  8;
	repeated uint32			st_space	=  9;
	repeated uint32			xmm_space	= 10;

	/* Unused, but present for backward compatibility */
	repeated uint32			padding		= 11;

	/* xsave extension */
	optional user_x86_xsave_entry	xsave		= 13;
}

message thread_info_x86 {
	required uint64			clear_tid_addr	= 1;
	required user_x86_regs_entry	gpregs		= 2;
	required user_x86_fpregs_entry	fpregs		= 3;
}

// --------------------------------------------------------------------------------

// ARM-specific

message user_arm_regs_entry {
	required uint32 r0      = 1;
	required uint32 r1      = 2;
	required uint32 r2      = 3;
	required uint32 r3      = 4;
	required uint32 r4      = 5;
	required uint32 r5      = 6;
	required uint32 r6      = 7;
	required uint32 r7      = 8;
	required uint32 r8      = 9;
	required uint32 r9      = 10;
	required uint32 r10     = 11;
	required uint32 fp      = 12;
	required uint32 ip      = 13;
	required uint32 sp      = 14;
	required uint32 lr      = 15;
	required uint32 pc      = 16;
	required uint32 cpsr    = 17;
	required uint32 orig_r0 = 18;
}

message user_arm_vfpstate_entry {
	repeated uint64 vfp_regs = 1;
	required uint32 fpscr    = 2;
	required uint32 fpexc    = 3;
	required uint32 fpinst   = 4;
	required uint32 fpinst2  = 5;
}

message thread_info_arm {
	required uint64			 clear_tid_addr	= 1;
	required uint32                  tls            = 2;
	required user_arm_regs_entry	 gpregs		= 3;
	required user_arm_vfpstate_entry fpstate	= 4;
}

// --------------------------------------------------------------------------------

message task_core_entry {
	required uint32			task_state	= 1;
	required uint32			exit_code	= 2;

	required uint32			personality	= 3;
	required uint32			flags		= 4;
	required uint64			blk_sigset	= 5;

	required string			comm		= 6;
}

message task_kobj_ids_entry {
	required uint32			vm_id		= 1;
	required uint32			files_id	= 2;
	required uint32			fs_id		= 3;
	required uint32			sighand_id	= 4;

	optional uint32			pid_ns_id	= 5;
	optional uint32			net_ns_id	= 6;
	optional uint32			ipc_ns_id	= 7;
	optional uint32			uts_ns_id	= 8;
	optional uint32			mnt_ns_id	= 9;
}

message thread_core_entry {
	required uint64			futex_rla	= 1;
	required uint32			futex_rla_len	= 2;
	optional sint32			sched_nice	= 3;
	optional uint32			sched_policy	= 4;
	optional uint32			sched_prio	= 5;
	optional uint64			blk_sigset	= 6;
}

message core_entry {
	enum march {
		UNKNOWN		= 0;
		X86_64		= 1;
		ARM             = 2;
	}

	required march			mtype		= 1;
	optional thread_info_x86	thread_info	= 2;
	optional thread_info_arm	ti_arm		= 6;

	optional task_core_entry	tc		= 3;
	optional task_kobj_ids_entry	ids		= 4;
	optional thread_core_entry	thread_core	= 5;
}
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