<commit_before>// ======================================================================== //
// Copyright 2009-2017 Intel Corporation                                    //
//                                                                          //
// Licensed under the Apache License, Version 2.0 (the "License");          //
// you may not use this file except in compliance with the License.         //
// You may obtain a copy of the License at                                  //
//                                                                          //
//     http://www.apache.org/licenses/LICENSE-2.0                           //
//                                                                          //
// Unless required by applicable law or agreed to in writing, software      //
// distributed under the License is distributed on an "AS IS" BASIS,        //
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. //
// See the License for the specific language governing permissions and      //
// limitations under the License.                                           //
// ======================================================================== //

#pragma once

namespace embree
{
  /* 16-wide AVX-512 float type */
  template<>
    struct vfloat<16>
  {
    typedef vboolf16 Bool;
    typedef vint16   Int;
    typedef vfloat16 Float;

    enum  { size = 16 }; // number of SIMD elements
    union {              // data
      __m512 v; 
      float f[16];
      int i[16];
    };

    ////////////////////////////////////////////////////////////////////////////////
    /// Constructors, Assignment & Cast Operators
    ////////////////////////////////////////////////////////////////////////////////
        
    __forceinline vfloat() {}
    __forceinline vfloat(const vfloat16& t) { v = t; }
    __forceinline vfloat16& operator=(const vfloat16& f) { v = f.v; return *this; }

    __forceinline vfloat(const __m512& t) { v = t; }
    __forceinline operator __m512 () const { return v; }
    __forceinline operator __m256 () const { return _mm512_castps512_ps256(v); }
    
    __forceinline vfloat(const float& f) {
      v = _mm512_set1_ps(f);
    }
    __forceinline vfloat(const float& a, const float& b, const float& c, const float& d) {
      v = _mm512_set4_ps(a,b,c,d);  
    }

    __forceinline vfloat(const vfloat4 &i) {
      v = _mm512_broadcast_f32x4(i);
    }

    __forceinline vfloat(const vfloat4 &a, const vfloat4 &b, const vfloat4 &c, const vfloat4 &d) {
      v = _mm512_broadcast_f32x4(a);
      v = _mm512_insertf32x4(v, b, 1);
      v = _mm512_insertf32x4(v, c, 2);
      v = _mm512_insertf32x4(v, d, 3);
    }

    __forceinline vfloat(const vboolf16& mask, const vfloat4 &a, const vfloat4 &b) { 
      v = _mm512_broadcast_f32x4(a);
      v = _mm512_mask_broadcast_f32x4(v,mask,b);
    }

    __forceinline vfloat(const vfloat8 &i) {
      v = _mm512_castpd_ps(_mm512_broadcast_f64x4(_mm256_castps_pd(i)));
    }

    __forceinline vfloat(const vfloat8 &a, const vfloat8 &b) { // FIXME: optimize
      const vfloat aa = _mm512_castpd_ps(_mm512_broadcast_f64x4(_mm256_castps_pd(a)));
      const vfloat bb = _mm512_castpd_ps(_mm512_broadcast_f64x4(_mm256_castps_pd(b)));
      v = _mm512_mask_blend_ps(0xff, bb, aa);
    }

    /* WARNING: due to f64x4 the mask is considered as an 8bit mask */
    __forceinline vfloat(const vboolf16& mask, const vfloat8 &a, const vfloat8 &b) { 
      __m512d aa = _mm512_broadcast_f64x4(_mm256_castps_pd(a));
      aa = _mm512_mask_broadcast_f64x4(aa,mask,_mm256_castps_pd(b));
      v = _mm512_castpd_ps(aa);
    }
    
    __forceinline explicit vfloat(const __m512i& a) {
      v = _mm512_cvtepi32_ps(a);
    }

    ////////////////////////////////////////////////////////////////////////////////
    /// Loads and Stores
    ////////////////////////////////////////////////////////////////////////////////

    static __forceinline vfloat16 load (const void* const ptr) { return _mm512_load_ps((float*)ptr);  }
    static __forceinline vfloat16 loadu(const void* const ptr) { return _mm512_loadu_ps((float*)ptr); }

    static __forceinline vfloat16 load (const vboolf16& mask, const void* const ptr) { return _mm512_mask_load_ps (_mm512_setzero_ps(),mask,(float*)ptr); }
    static __forceinline vfloat16 loadu(const vboolf16& mask, const void* const ptr) { return _mm512_mask_loadu_ps(_mm512_setzero_ps(),mask,(float*)ptr); }

    static __forceinline void store (void* const ptr, const vfloat16& v) { _mm512_store_ps ((float*)ptr,v); }
    static __forceinline void storeu(void* const ptr, const vfloat16& v) { _mm512_storeu_ps((float*)ptr,v); }

    static __forceinline void store (const vboolf16& mask, void* ptr, const vfloat16& v) { _mm512_mask_store_ps ((float*)ptr,mask,v); }
    static __forceinline void storeu(const vboolf16& mask, void* ptr, const vfloat16& v) { _mm512_mask_storeu_ps((float*)ptr,mask,v); }

    static __forceinline void store_nt(void *__restrict__ ptr, const vfloat16& a) {
      _mm512_stream_ps((float*)ptr,a);
    }

    static __forceinline vfloat16 broadcast(const float *const f) {
      return _mm512_set1_ps(*f);
    }

    static __forceinline vfloat16 compact(const vboolf16& mask, vfloat16 &v) {
      return _mm512_mask_compress_ps(v,mask,v);
    }
    static __forceinline vfloat16 compact(const vboolf16& mask, const vfloat16 &a, vfloat16 &b) {
      return _mm512_mask_compress_ps(a,mask,b);
    }

    static __forceinline vfloat16 loadu_compact(const vboolf16& mask, const void *const ptr) {
      return _mm512_mask_expandloadu_ps(vfloat16::undefined(),mask,(float*)ptr);
    }

    static __forceinline void storeu_compact(const vboolf16& mask, float *addr, const vfloat16 reg) {
      _mm512_mask_compressstoreu_ps(addr,mask,reg);
    }
    
    static __forceinline void storeu_compact_single(const vboolf16& mask, float * addr, const vfloat16 &reg) {
      //_mm512_mask_compressstoreu_ps(addr,mask,reg);
      *addr = mm512_cvtss_f32(_mm512_mask_compress_ps(reg,mask,reg));
    }


    ////////////////////////////////////////////////////////////////////////////////
    /// Constants
    ////////////////////////////////////////////////////////////////////////////////
    
    __forceinline vfloat( ZeroTy   ) : v(_mm512_setzero_ps()) {}
    __forceinline vfloat( OneTy    ) : v(_mm512_set1_ps(1.0f)) {}
    __forceinline vfloat( PosInfTy ) : v(_mm512_set1_ps(pos_inf)) {}
    __forceinline vfloat( NegInfTy ) : v(_mm512_set1_ps(neg_inf)) {}
    __forceinline vfloat( StepTy )   : v(_mm512_set_ps(15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0)) {}
    __forceinline vfloat( NaNTy    ) : v(_mm512_set1_ps(nan)) {}

    __forceinline static vfloat16 undefined() { return _mm512_undefined_ps(); }
    __forceinline static vfloat16 zero() { return _mm512_setzero_ps(); }
    __forceinline static vfloat16 one () { return _mm512_set1_ps(1.0f); }
    __forceinline static vfloat16 ulp () { return _mm512_set1_ps(embree::ulp); }
    __forceinline static vfloat16 inf () { return _mm512_set1_ps((float)pos_inf); }
    __forceinline static vfloat16 minus_inf () { return _mm512_set1_ps((float)neg_inf); }

    ////////////////////////////////////////////////////////////////////////////////
    /// Array Access
    ////////////////////////////////////////////////////////////////////////////////
    
    __forceinline       float& operator [](const size_t index)       { assert(index < 16); return f[index]; }
    __forceinline const float& operator [](const size_t index) const { assert(index < 16); return f[index]; }
  };

  ////////////////////////////////////////////////////////////////////////////////
  /// Unary Operators
  ////////////////////////////////////////////////////////////////////////////////

  __forceinline const vfloat16 asFloat   ( const __m512i&  a ) { return _mm512_castsi512_ps(a); }
  __forceinline const vfloat16 operator +( const vfloat16& a ) { return a; }
  __forceinline const vfloat16 operator -( const vfloat16& a ) { return _mm512_mul_ps(a,vfloat16(-1)); }
  __forceinline const vfloat16 abs       ( const vfloat16& a ) { return _mm512_abs_ps(a); }
  
  __forceinline const vfloat16 signmsk   ( const vfloat16& a ) { return _mm512_castsi512_ps(_mm512_and_epi32(_mm512_castps_si512(a),_mm512_set1_epi32(0x80000000))); }

  __forceinline const vfloat16 rcp(const vfloat16& a) {
#if defined(__AVX512ER__)
    return _mm512_rcp28_ps(a);
#else
    const vfloat16 r = _mm512_rcp14_ps(a.v);
    return _mm512_mul_ps(r, _mm512_fnmadd_ps(r, a, vfloat16(2.0f)));
#endif
  }

  __forceinline const vfloat16 sqr  ( const vfloat16& a ) { return _mm512_mul_ps(a,a); }<commit_msg>replaced _mm512_abs_ps as not yet supported by GCC.<commit_after>// ======================================================================== //
// Copyright 2009-2017 Intel Corporation                                    //
//                                                                          //
// Licensed under the Apache License, Version 2.0 (the "License");          //
// you may not use this file except in compliance with the License.         //
// You may obtain a copy of the License at                                  //
//                                                                          //
//     http://www.apache.org/licenses/LICENSE-2.0                           //
//                                                                          //
// Unless required by applicable law or agreed to in writing, software      //
// distributed under the License is distributed on an "AS IS" BASIS,        //
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. //
// See the License for the specific language governing permissions and      //
// limitations under the License.                                           //
// ======================================================================== //

#pragma once

namespace embree
{
  /* 16-wide AVX-512 float type */
  template<>
    struct vfloat<16>
  {
    typedef vboolf16 Bool;
    typedef vint16   Int;
    typedef vfloat16 Float;

    enum  { size = 16 }; // number of SIMD elements
    union {              // data
      __m512 v; 
      float f[16];
      int i[16];
    };

    ////////////////////////////////////////////////////////////////////////////////
    /// Constructors, Assignment & Cast Operators
    ////////////////////////////////////////////////////////////////////////////////
        
    __forceinline vfloat() {}
    __forceinline vfloat(const vfloat16& t) { v = t; }
    __forceinline vfloat16& operator=(const vfloat16& f) { v = f.v; return *this; }

    __forceinline vfloat(const __m512& t) { v = t; }
    __forceinline operator __m512 () const { return v; }
    __forceinline operator __m256 () const { return _mm512_castps512_ps256(v); }
    
    __forceinline vfloat(const float& f) {
      v = _mm512_set1_ps(f);
    }
    __forceinline vfloat(const float& a, const float& b, const float& c, const float& d) {
      v = _mm512_set4_ps(a,b,c,d);  
    }

    __forceinline vfloat(const vfloat4 &i) {
      v = _mm512_broadcast_f32x4(i);
    }

    __forceinline vfloat(const vfloat4 &a, const vfloat4 &b, const vfloat4 &c, const vfloat4 &d) {
      v = _mm512_broadcast_f32x4(a);
      v = _mm512_insertf32x4(v, b, 1);
      v = _mm512_insertf32x4(v, c, 2);
      v = _mm512_insertf32x4(v, d, 3);
    }

    __forceinline vfloat(const vboolf16& mask, const vfloat4 &a, const vfloat4 &b) { 
      v = _mm512_broadcast_f32x4(a);
      v = _mm512_mask_broadcast_f32x4(v,mask,b);
    }

    __forceinline vfloat(const vfloat8 &i) {
      v = _mm512_castpd_ps(_mm512_broadcast_f64x4(_mm256_castps_pd(i)));
    }

    __forceinline vfloat(const vfloat8 &a, const vfloat8 &b) { // FIXME: optimize
      const vfloat aa = _mm512_castpd_ps(_mm512_broadcast_f64x4(_mm256_castps_pd(a)));
      const vfloat bb = _mm512_castpd_ps(_mm512_broadcast_f64x4(_mm256_castps_pd(b)));
      v = _mm512_mask_blend_ps(0xff, bb, aa);
    }

    /* WARNING: due to f64x4 the mask is considered as an 8bit mask */
    __forceinline vfloat(const vboolf16& mask, const vfloat8 &a, const vfloat8 &b) { 
      __m512d aa = _mm512_broadcast_f64x4(_mm256_castps_pd(a));
      aa = _mm512_mask_broadcast_f64x4(aa,mask,_mm256_castps_pd(b));
      v = _mm512_castpd_ps(aa);
    }
    
    __forceinline explicit vfloat(const __m512i& a) {
      v = _mm512_cvtepi32_ps(a);
    }

    ////////////////////////////////////////////////////////////////////////////////
    /// Loads and Stores
    ////////////////////////////////////////////////////////////////////////////////

    static __forceinline vfloat16 load (const void* const ptr) { return _mm512_load_ps((float*)ptr);  }
    static __forceinline vfloat16 loadu(const void* const ptr) { return _mm512_loadu_ps((float*)ptr); }

    static __forceinline vfloat16 load (const vboolf16& mask, const void* const ptr) { return _mm512_mask_load_ps (_mm512_setzero_ps(),mask,(float*)ptr); }
    static __forceinline vfloat16 loadu(const vboolf16& mask, const void* const ptr) { return _mm512_mask_loadu_ps(_mm512_setzero_ps(),mask,(float*)ptr); }

    static __forceinline void store (void* const ptr, const vfloat16& v) { _mm512_store_ps ((float*)ptr,v); }
    static __forceinline void storeu(void* const ptr, const vfloat16& v) { _mm512_storeu_ps((float*)ptr,v); }

    static __forceinline void store (const vboolf16& mask, void* ptr, const vfloat16& v) { _mm512_mask_store_ps ((float*)ptr,mask,v); }
    static __forceinline void storeu(const vboolf16& mask, void* ptr, const vfloat16& v) { _mm512_mask_storeu_ps((float*)ptr,mask,v); }

    static __forceinline void store_nt(void *__restrict__ ptr, const vfloat16& a) {
      _mm512_stream_ps((float*)ptr,a);
    }

    static __forceinline vfloat16 broadcast(const float *const f) {
      return _mm512_set1_ps(*f);
    }

    static __forceinline vfloat16 compact(const vboolf16& mask, vfloat16 &v) {
      return _mm512_mask_compress_ps(v,mask,v);
    }
    static __forceinline vfloat16 compact(const vboolf16& mask, const vfloat16 &a, vfloat16 &b) {
      return _mm512_mask_compress_ps(a,mask,b);
    }

    static __forceinline vfloat16 loadu_compact(const vboolf16& mask, const void *const ptr) {
      return _mm512_mask_expandloadu_ps(vfloat16::undefined(),mask,(float*)ptr);
    }

    static __forceinline void storeu_compact(const vboolf16& mask, float *addr, const vfloat16 reg) {
      _mm512_mask_compressstoreu_ps(addr,mask,reg);
    }
    
    static __forceinline void storeu_compact_single(const vboolf16& mask, float * addr, const vfloat16 &reg) {
      //_mm512_mask_compressstoreu_ps(addr,mask,reg);
      *addr = mm512_cvtss_f32(_mm512_mask_compress_ps(reg,mask,reg));
    }


    ////////////////////////////////////////////////////////////////////////////////
    /// Constants
    ////////////////////////////////////////////////////////////////////////////////
    
    __forceinline vfloat( ZeroTy   ) : v(_mm512_setzero_ps()) {}
    __forceinline vfloat( OneTy    ) : v(_mm512_set1_ps(1.0f)) {}
    __forceinline vfloat( PosInfTy ) : v(_mm512_set1_ps(pos_inf)) {}
    __forceinline vfloat( NegInfTy ) : v(_mm512_set1_ps(neg_inf)) {}
    __forceinline vfloat( StepTy )   : v(_mm512_set_ps(15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0)) {}
    __forceinline vfloat( NaNTy    ) : v(_mm512_set1_ps(nan)) {}

    __forceinline static vfloat16 undefined() { return _mm512_undefined_ps(); }
    __forceinline static vfloat16 zero() { return _mm512_setzero_ps(); }
    __forceinline static vfloat16 one () { return _mm512_set1_ps(1.0f); }
    __forceinline static vfloat16 ulp () { return _mm512_set1_ps(embree::ulp); }
    __forceinline static vfloat16 inf () { return _mm512_set1_ps((float)pos_inf); }
    __forceinline static vfloat16 minus_inf () { return _mm512_set1_ps((float)neg_inf); }

    ////////////////////////////////////////////////////////////////////////////////
    /// Array Access
    ////////////////////////////////////////////////////////////////////////////////
    
    __forceinline       float& operator [](const size_t index)       { assert(index < 16); return f[index]; }
    __forceinline const float& operator [](const size_t index) const { assert(index < 16); return f[index]; }
  };

  ////////////////////////////////////////////////////////////////////////////////
  /// Unary Operators
  ////////////////////////////////////////////////////////////////////////////////

  __forceinline const vfloat16 asFloat   ( const __m512i&  a ) { return _mm512_castsi512_ps(a); }
  __forceinline const vfloat16 operator +( const vfloat16& a ) { return a; }
  __forceinline const vfloat16 operator -( const vfloat16& a ) { return _mm512_mul_ps(a,vfloat16(-1)); }
  __forceinline const vfloat16 abs       ( const vfloat16& a ) { return _mm512_castsi512_ps(_mm512_and_epi32(_mm512_castps_si512(a),_mm512_set1_epi32(0x7FFFFFFF))); }
  __forceinline const vfloat16 signmsk   ( const vfloat16& a ) { return _mm512_castsi512_ps(_mm512_and_epi32(_mm512_castps_si512(a),_mm512_set1_epi32(0x80000000))); }

  __forceinline const vfloat16 rcp(const vfloat16& a) {
#if defined(__AVX512ER__)
    return _mm512_rcp28_ps(a);
#else
    const vfloat16 r = _mm512_rcp14_ps(a.v);
    return _mm512_mul_ps(r, _mm512_fnmadd_ps(r, a, vfloat16(2.0f)));
#endif
  }

  __forceinline const vfloat16 sqr  ( const vfloat16& a ) { return _mm512_mul_ps(a,a); }
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