<commit_before>#include "pipe/p_screen.h"
#include "pipe/p_state.h"
#include "util/u_format_s3tc.h"
#include "util/u_simple_screen.h"

#include "nouveau/nouveau_screen.h"

#include "nvfx_context.h"
#include "nvfx_screen.h"
#include "nvfx_resource.h"
#include "nvfx_tex.h"

#define NV30TCL_CHIPSET_3X_MASK 0x00000003
#define NV34TCL_CHIPSET_3X_MASK 0x00000010
#define NV35TCL_CHIPSET_3X_MASK 0x000001e0

#define NV4X_GRCLASS4097_CHIPSETS 0x00000baf
#define NV4X_GRCLASS4497_CHIPSETS 0x00005450
#define NV6X_GRCLASS4497_CHIPSETS 0x00000088

static int
nvfx_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
{
	struct nvfx_screen *screen = nvfx_screen(pscreen);

	switch (param) {
	case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
		return 16;
	case PIPE_CAP_NPOT_TEXTURES:
		return !!screen->is_nv4x;
	case PIPE_CAP_TWO_SIDED_STENCIL:
		return 1;
	case PIPE_CAP_GLSL:
		return 1;
	case PIPE_CAP_ANISOTROPIC_FILTER:
		return 1;
	case PIPE_CAP_POINT_SPRITE:
		return 1;
	case PIPE_CAP_MAX_RENDER_TARGETS:
		return screen->is_nv4x ? 4 : 2;
	case PIPE_CAP_OCCLUSION_QUERY:
		return 1;
        case PIPE_CAP_TIMER_QUERY:
		return 0;
	case PIPE_CAP_TEXTURE_SHADOW_MAP:
		return 1;
	case PIPE_CAP_TEXTURE_SWIZZLE:
		return 1;
	case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
		return 13;
	case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
		return 10;
	case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
		return 13;
	case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
		return !!screen->is_nv4x;
	case PIPE_CAP_TEXTURE_MIRROR_REPEAT:
		return 1;
	case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
		return 0; /* We have 4 on nv40 - but unsupported currently */
	case PIPE_CAP_TGSI_CONT_SUPPORTED:
		return 0;
	case PIPE_CAP_BLEND_EQUATION_SEPARATE:
		return !!screen->is_nv4x;
	case PIPE_CAP_MAX_COMBINED_SAMPLERS:
		return 16;
	case PIPE_CAP_INDEP_BLEND_ENABLE:
		/* TODO: on nv40 we have separate color masks */
		/* TODO: nv40 mrt blending is probably broken */
		return 0;
	case PIPE_CAP_INDEP_BLEND_FUNC:
		return 0;
	case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
		return 0;
	case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
	case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
	case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
	case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
		return 1;
	case PIPE_CAP_MAX_FS_INSTRUCTIONS:
	case PIPE_CAP_MAX_FS_ALU_INSTRUCTIONS:
	case PIPE_CAP_MAX_FS_TEX_INSTRUCTIONS:
	case PIPE_CAP_MAX_FS_TEX_INDIRECTIONS:
		return 4096;
	case PIPE_CAP_MAX_FS_CONTROL_FLOW_DEPTH:
		/* FIXME: is it the dynamic (nv30:0/nv40:24) or the static
		   value (nv30:0/nv40:4) ? */
		return screen->is_nv4x ? 4 : 0;
	case PIPE_CAP_MAX_FS_INPUTS:
		return screen->is_nv4x ? 12 : 10;
	case PIPE_CAP_MAX_FS_CONSTS:
		return screen->is_nv4x ? 224 : 32;
	case PIPE_CAP_MAX_FS_TEMPS:
		return 32;
	case PIPE_CAP_MAX_FS_ADDRS:
		return screen->is_nv4x ? 1 : 0;
	case PIPE_CAP_MAX_FS_PREDS:
		return 0; /* we could expose these, but nothing uses them */
	case PIPE_CAP_MAX_VS_INSTRUCTIONS:
	case PIPE_CAP_MAX_VS_ALU_INSTRUCTIONS:
		return screen->is_nv4x ? 512 : 256;
	case PIPE_CAP_MAX_VS_TEX_INSTRUCTIONS:
	case PIPE_CAP_MAX_VS_TEX_INDIRECTIONS:
		return screen->is_nv4x ? 512 : 0;
	case PIPE_CAP_MAX_VS_CONTROL_FLOW_DEPTH:
		/* FIXME: is it the dynamic (nv30:24/nv40:24) or the static
		   value (nv30:1/nv40:4) ? */
		return screen->is_nv4x ? 4 : 1;
	case PIPE_CAP_MAX_VS_INPUTS:
		return 16;
	case PIPE_CAP_MAX_VS_CONSTS:
		/* - 6 is for clip planes; Gallium should be fixed to put
		 * them in the vertex shader itself, so we don't need to reserve these */
		return (screen->is_nv4x ? 468 : 256) - 6;
	case PIPE_CAP_MAX_VS_TEMPS:
		return screen->is_nv4x ? 32 : 13;
	case PIPE_CAP_MAX_VS_ADDRS:
		return 2;
	case PIPE_CAP_MAX_VS_PREDS:
		return 0; /* we could expose these, but nothing uses them */
	case PIPE_CAP_GEOMETRY_SHADER4:
		return 0;
	case PIPE_CAP_DEPTH_CLAMP:
		return 0; // TODO: implement depth clamp
	default:
		NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param);
		return 0;
	}
}

static float
nvfx_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_cap param)
{
	struct nvfx_screen *screen = nvfx_screen(pscreen);

	switch (param) {
	case PIPE_CAP_MAX_LINE_WIDTH:
	case PIPE_CAP_MAX_LINE_WIDTH_AA:
		return 10.0;
	case PIPE_CAP_MAX_POINT_WIDTH:<commit_msg>nvfx: use a piglit-ignored format for unknown cap message<commit_after>#include "pipe/p_screen.h"
#include "pipe/p_state.h"
#include "util/u_format_s3tc.h"
#include "util/u_simple_screen.h"

#include "nouveau/nouveau_screen.h"

#include "nvfx_context.h"
#include "nvfx_screen.h"
#include "nvfx_resource.h"
#include "nvfx_tex.h"

#define NV30TCL_CHIPSET_3X_MASK 0x00000003
#define NV34TCL_CHIPSET_3X_MASK 0x00000010
#define NV35TCL_CHIPSET_3X_MASK 0x000001e0

#define NV4X_GRCLASS4097_CHIPSETS 0x00000baf
#define NV4X_GRCLASS4497_CHIPSETS 0x00005450
#define NV6X_GRCLASS4497_CHIPSETS 0x00000088

static int
nvfx_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
{
	struct nvfx_screen *screen = nvfx_screen(pscreen);

	switch (param) {
	case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
		return 16;
	case PIPE_CAP_NPOT_TEXTURES:
		return !!screen->is_nv4x;
	case PIPE_CAP_TWO_SIDED_STENCIL:
		return 1;
	case PIPE_CAP_GLSL:
		return 1;
	case PIPE_CAP_ANISOTROPIC_FILTER:
		return 1;
	case PIPE_CAP_POINT_SPRITE:
		return 1;
	case PIPE_CAP_MAX_RENDER_TARGETS:
		return screen->is_nv4x ? 4 : 2;
	case PIPE_CAP_OCCLUSION_QUERY:
		return 1;
        case PIPE_CAP_TIMER_QUERY:
		return 0;
	case PIPE_CAP_TEXTURE_SHADOW_MAP:
		return 1;
	case PIPE_CAP_TEXTURE_SWIZZLE:
		return 1;
	case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
		return 13;
	case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
		return 10;
	case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
		return 13;
	case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
		return !!screen->is_nv4x;
	case PIPE_CAP_TEXTURE_MIRROR_REPEAT:
		return 1;
	case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
		return 0; /* We have 4 on nv40 - but unsupported currently */
	case PIPE_CAP_TGSI_CONT_SUPPORTED:
		return 0;
	case PIPE_CAP_BLEND_EQUATION_SEPARATE:
		return !!screen->is_nv4x;
	case PIPE_CAP_MAX_COMBINED_SAMPLERS:
		return 16;
	case PIPE_CAP_INDEP_BLEND_ENABLE:
		/* TODO: on nv40 we have separate color masks */
		/* TODO: nv40 mrt blending is probably broken */
		return 0;
	case PIPE_CAP_INDEP_BLEND_FUNC:
		return 0;
	case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
		return 0;
	case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
	case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
	case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
	case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
		return 1;
	case PIPE_CAP_MAX_FS_INSTRUCTIONS:
	case PIPE_CAP_MAX_FS_ALU_INSTRUCTIONS:
	case PIPE_CAP_MAX_FS_TEX_INSTRUCTIONS:
	case PIPE_CAP_MAX_FS_TEX_INDIRECTIONS:
		return 4096;
	case PIPE_CAP_MAX_FS_CONTROL_FLOW_DEPTH:
		/* FIXME: is it the dynamic (nv30:0/nv40:24) or the static
		   value (nv30:0/nv40:4) ? */
		return screen->is_nv4x ? 4 : 0;
	case PIPE_CAP_MAX_FS_INPUTS:
		return screen->is_nv4x ? 12 : 10;
	case PIPE_CAP_MAX_FS_CONSTS:
		return screen->is_nv4x ? 224 : 32;
	case PIPE_CAP_MAX_FS_TEMPS:
		return 32;
	case PIPE_CAP_MAX_FS_ADDRS:
		return screen->is_nv4x ? 1 : 0;
	case PIPE_CAP_MAX_FS_PREDS:
		return 0; /* we could expose these, but nothing uses them */
	case PIPE_CAP_MAX_VS_INSTRUCTIONS:
	case PIPE_CAP_MAX_VS_ALU_INSTRUCTIONS:
		return screen->is_nv4x ? 512 : 256;
	case PIPE_CAP_MAX_VS_TEX_INSTRUCTIONS:
	case PIPE_CAP_MAX_VS_TEX_INDIRECTIONS:
		return screen->is_nv4x ? 512 : 0;
	case PIPE_CAP_MAX_VS_CONTROL_FLOW_DEPTH:
		/* FIXME: is it the dynamic (nv30:24/nv40:24) or the static
		   value (nv30:1/nv40:4) ? */
		return screen->is_nv4x ? 4 : 1;
	case PIPE_CAP_MAX_VS_INPUTS:
		return 16;
	case PIPE_CAP_MAX_VS_CONSTS:
		/* - 6 is for clip planes; Gallium should be fixed to put
		 * them in the vertex shader itself, so we don't need to reserve these */
		return (screen->is_nv4x ? 468 : 256) - 6;
	case PIPE_CAP_MAX_VS_TEMPS:
		return screen->is_nv4x ? 32 : 13;
	case PIPE_CAP_MAX_VS_ADDRS:
		return 2;
	case PIPE_CAP_MAX_VS_PREDS:
		return 0; /* we could expose these, but nothing uses them */
	case PIPE_CAP_GEOMETRY_SHADER4:
		return 0;
	case PIPE_CAP_DEPTH_CLAMP:
		return 0; // TODO: implement depth clamp
	default:
		NOUVEAU_ERR("Warning: unknown PIPE_CAP %d\n", param);
		return 0;
	}
}

static float
nvfx_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_cap param)
{
	struct nvfx_screen *screen = nvfx_screen(pscreen);

	switch (param) {
	case PIPE_CAP_MAX_LINE_WIDTH:
	case PIPE_CAP_MAX_LINE_WIDTH_AA:
		return 10.0;
	case PIPE_CAP_MAX_POINT_WIDTH:
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