<commit_before>/*
 * include/asm-arm/arch-ixp2000/ixp2000-regs.h
 *
 * Chipset register definitions for IXP2400/2800 based systems.
 *
 * Original Author: <NAME> <<EMAIL>>
 *
 * Maintainer: <NAME> <<EMAIL>>
 *
 * Copyright (C) 2002 Intel Corp.
 * Copyright (C) 2003-2004 MontaVista Software, Inc.
 *
 *  This program is free software; you can redistribute  it and/or modify it
 *  under  the terms of  the GNU General  Public License as published by the
 *  Free Software Foundation;  either version 2 of the  License, or (at your
 *  option) any later version.
 */
#ifndef _IXP2000_REGS_H_
#define _IXP2000_REGS_H_

/* 
 * Static I/O regions.
 *
 * Most of the registers are clumped in 4K regions spread throughout
 * the 0xc0000000 -> 0xc0100000 address range, but we just map in
 * the whole range using a single 1 MB section instead of small
 * 4K pages.  This has two advantages for us:
 *
 * 1) We use only one TLB entry for large number of on-chip I/O devices.
 *
 * 2) We can easily set the Section attributes to XCB=101 on the IXP2400
 *    as required per erratum #66.  We accomplish this by using a
 *    new MT_IXP2000_DEVICE memory type with the bits set as required.
 *
 * CAP stands for CSR Access Proxy.
 *
 * If you change the virtual address of this mapping, please propagate
 * the change to arch/arm/kernel/debug.S, which hardcodes the virtual
 * address of the UART located in this region.
 */

#define	IXP2000_CAP_PHYS_BASE		0xc0000000
#define	IXP2000_CAP_VIRT_BASE		0xfef00000
#define	IXP2000_CAP_SIZE		0x00100000

/*
 * Addresses for specific on-chip peripherals
 */
#define	IXP2000_SLOWPORT_CSR_VIRT_BASE	0xfef80000<commit_msg>[PATCH] ARM: 2755/1: describe ixp2000 virtual memory map layout<commit_after>/*
 * include/asm-arm/arch-ixp2000/ixp2000-regs.h
 *
 * Chipset register definitions for IXP2400/2800 based systems.
 *
 * Original Author: <NAME> <<EMAIL>>
 *
 * Maintainer: <NAME> <<EMAIL>>
 *
 * Copyright (C) 2002 Intel Corp.
 * Copyright (C) 2003-2004 MontaVista Software, Inc.
 *
 *  This program is free software; you can redistribute  it and/or modify it
 *  under  the terms of  the GNU General  Public License as published by the
 *  Free Software Foundation;  either version 2 of the  License, or (at your
 *  option) any later version.
 */
#ifndef _IXP2000_REGS_H_
#define _IXP2000_REGS_H_

/*
 * IXP2000 linux memory map:
 *
 * virt		phys		size
 * fb000000	db000000	16M		PCI CFG1
 * fc000000	da000000	16M		PCI CFG0
 * fd000000	d8000000	16M		PCI I/O
 * fe[0-7]00000			8M		per-platform mappings
 * feb00000	c8000000	1M		MSF
 * fec00000	df000000	1M		PCI CSRs
 * fed00000	de000000	1M		PCI CREG
 * fee00000	d6000000	1M		INTCTL
 * fef00000	c0000000	1M		CAP
 */

/* 
 * Static I/O regions.
 *
 * Most of the registers are clumped in 4K regions spread throughout
 * the 0xc0000000 -> 0xc0100000 address range, but we just map in
 * the whole range using a single 1 MB section instead of small
 * 4K pages.  This has two advantages for us:
 *
 * 1) We use only one TLB entry for large number of on-chip I/O devices.
 *
 * 2) We can easily set the Section attributes to XCB=101 on the IXP2400
 *    as required per erratum #66.  We accomplish this by using a
 *    new MT_IXP2000_DEVICE memory type with the bits set as required.
 *
 * CAP stands for CSR Access Proxy.
 *
 * If you change the virtual address of this mapping, please propagate
 * the change to arch/arm/kernel/debug.S, which hardcodes the virtual
 * address of the UART located in this region.
 */

#define	IXP2000_CAP_PHYS_BASE		0xc0000000
#define	IXP2000_CAP_VIRT_BASE		0xfef00000
#define	IXP2000_CAP_SIZE		0x00100000

/*
 * Addresses for specific on-chip peripherals
 */
#define	IXP2000_SLOWPORT_CSR_VIRT_BASE	0xfef80000
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