<commit_before>/**************************************************************************/
/*! 
    @file     gpio.c
    @author   <NAME> (microBuilder.eu)
    @date     22 March 2010
    @version  0.10

    @section DESCRIPTION
	
    Controls the general purpose digital IO.

    @section LICENSE

    Software License Agreement (BSD License)

    Copyright (c) 2010, microBuilder SARL
    All rights reserved.

    Redistribution and use in source and binary forms, with or without
    modification, are permitted provided that the following conditions are met:
    1. Redistributions of source code must retain the above copyright
    notice, this list of conditions and the following disclaimer.
    2. Redistributions in binary form must reproduce the above copyright
    notice, this list of conditions and the following disclaimer in the
    documentation and/or other materials provided with the distribution.
    3. Neither the name of the copyright holders nor the
    names of its contributors may be used to endorse or promote products
    derived from this software without specific prior written permission.

    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY
    EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
    WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
    DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY
    DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
    (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
    LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
    ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
    (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
    SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/**************************************************************************/

#include "gpio.h"

#ifdef CFG_CHIBI
#include "drivers/rf/chibi/chb_drvr.h"
volatile uint32_t chibi_counter  = 0;
#endif

#ifdef CFG_ALTRESET
#include "core/cpu/cpu.h"
#endif

static bool _gpioInitialised = false;

/**************************************************************************/
/*! 
    @brief IRQ Handler for GPIO port 0 (currently checks pin 0.1)

    @note  By default, this IRQ handler is probably disabled in
           projectconfig.h (see GPIO_ENABLE_IRQ0), but you can use
           the code below as a model to implement this interrupt
           handler in an appropriate place in your project.
*/
/**************************************************************************/
#if defined GPIO_ENABLE_IRQ0
void PIOINT0_IRQHandler(void)
{
  uint32_t regVal;

  regVal = gpioIntStatus(0, 1);
  if (regVal)
  {
    gpioIntClear(0, 1);
  }		
  return;
}
#endif

/**************************************************************************/
/*! 
    @brief IRQ Handler for GPIO port 1 (currently checks pin 1.1)
*/
/**************************************************************************/
#if defined GPIO_ENABLE_IRQ1
void PIOINT1_IRQHandler(void)
{
  uint32_t regVal;

#if defined CFG_ALTRESET && CFG_ALTRESET_PORT == 1
  regVal = gpioIntStatus(CFG_ALTRESET_PORT, CFG_ALTRESET_PIN);
  if (regVal)
  {
    // Cause a reset and wait
    cpuReset();
  }
#endif

#ifdef CFG_CHIBI
  // Check for interrupt on 1.8
  regVal = gpioIntStatus(1, 8);
  if (regVal)
  {
    chibi_counter++;
    chb_ISR_Handler();
    gpioIntClear(1, 8);
  }		
#else
  regVal = gpioIntStatus(1, 1);
  if ( regVal )
  {
    gpioIntClear(1, 1);
  }
#endif

  return;
}
#endif

/**************************************************************************/
/*! 
    @brief IRQ Handler for GPIO port 2 (currently checks pin 2.1)

    @note  By default, this IRQ handler is probably disabled in
           projectconfig.h (see GPIO_ENABLE_IRQ2), but you can use
           the code below as a model to implement this interrupt
           handler in an appropriate place in your project.
*/
/**************************************************************************/
#if defined GPIO_ENABLE_IRQ2
void PIOINT2_IRQHandler(void)
{
  uint32_t regVal;

  regVal = gpioIntStatus(2, 1);
  if ( regVal )
  {
    gpioIntClear(2, 1);
  }		
  return;
}
#endif

/**************************************************************************/
/*! 
    @brief IRQ Handler for GPIO port 3 (currently checks pin 3.1)

    @note  By default, this IRQ handler is probably disabled in
           projectconfig.h (see GPIO_ENABLE_IRQ3), but you can use
           the code below as a model to implement this interrupt
           handler in an appropriate place in your project.
*/
/**************************************************************************/
#if defined GPIO_ENABLE_IRQ3
void PIOINT3_IRQHandler(void)
{
  uint32_t regVal;

  regVal = gpioIntStatus(3, 1);
  if ( regVal )
  {
    gpioIntClear(3, 1);
  }		
  return;
}
#endif

/**************************************************************************/
/*! 
    @brief Initialises GPIO and enables the GPIO interrupt
           handler for all GPIO ports.
*/
/**************************************************************************/
void gpioInit (void)
{
  /* Enable AHB clock to the GPIO domain. */
  SCB_SYSAHBCLKCTRL |= (SCB_SYSAHBCLKCTRL_GPIO);

  /* Set up NVIC when I/O pins are configured as external interrupts. */
  NVIC_EnableIRQ(EINT0_IRQn);
  NVIC_EnableIRQ(EINT1_IRQn);
  NVIC_EnableIRQ(EINT2_IRQn);
  NVIC_EnableIRQ(EINT3_IRQn);

  /* Set initialisation flag */
  _gpioInitialised = true;

  return;
}

/**************************************************************************/
/*! 
    @brief Sets the direction (input/output) for a specific port pin

    @param[in]  portNum
                The port number (0..3)
    @param[in]  bitPos
                The bit position (0..11)
    @param[in]  dir
                The pin direction (gpioDirection_Input or
                gpioDirection_Output)
*/
/**************************************************************************/
void gpioSetDir (uint32_t portNum, uint32_t bitPos, gpioDirection_t dir)
{
  if (!_gpioInitialised) gpioInit();

  // Get the appropriate register (handled this way to optimise code size)
  REG32 *gpiodir = &GPIO_GPIO0DIR;
  switch (portNum)
  {
    case 0:
      gpiodir = &GPIO_GPIO0DIR;
      break;
    case 1:
      gpiodir = &GPIO_GPIO1DIR;
      break;
    case 2:
      gpiodir = &GPIO_GPIO2DIR;
      break;
    case 3:
      gpiodir = &GPIO_GPIO3DIR;
      break;
  }

  // Toggle dir
  dir == gpioDirection_Output ? (*gpiodir |= (1 << bitPos)) : (*gpiodir &= ~(1 << bitPos));
}

/**************************************************************************/
/*! 
    @brief Sets the interrupt sense, event, etc.

    @param[in]  portNum
                The port number (0..3)
    @param[in]  bitPos
                The bit position (0..31)
    @param[in]  sense
                Whether the interrupt should be configured as edge or level
                sensitive.
    @param[in]  edge
                Whether one edge or both trigger an interrupt.
    @param[in]  event
                Whether the rising or the falling edge (high or low)
                should be used to trigger the interrupt.

    @section Example

    @code
    // Initialise gpio
    gpioInit();
    // Set GPIO1.8 to input
    gpioSetDir(1, 8, gpioDirection_Input);
    // Disable the internal pullup/down resistor on P1.8
    gpioSetPullup (&IOCON_PIO1_8, gpioPullupMode_Inactive);
    // Setup an interrupt on GPIO1.8
    gpioSetInterrupt(1,                               // Port
                     8,                               // Pin
                     gpioInterruptSense_Edge,         // Edge/Level Sensitive
                     gpioInterruptEdge_Single,        // Single/Double Edge
                     gpioInterruptEvent_ActiveHigh);  // Rising/Falling
    // Enable the interrupt
    gpioIntEnable(1, 8);
    @endcode
*/
/**************************************************************************/
void gpioSetInterrupt (uint32_t portNum, uint32_t bitPos, gpioInterruptSense_t sense, gpioInterruptEdge_t edge, gpioInterruptEvent_t event)
{
  if (!_gpioInitialised) gpioInit();

  // Get the appropriate register (handled this way to optimise code size)
  REG32 *gpiois  = &GPIO_GPIO0IS;   // Interrupt sense (edge or level sensitive)
  REG32 *gpioibe = &GPIO_GPIO0IBE;  // Interrupt both edges (0 = int controlled by GPIOIEV, 1 = both edges trigger interrupt)
  REG32 *gpioiev = &GPIO_GPIO0IEV;  // 0 = falling edge or low, 1 = rising edge or high (depending on GPIOIS)
  switch (portNum)
  {
    case 0:
      gpiois  = &GPIO_GPIO0IS;
      gpioibe = &GPIO_GPIO0IBE;
      gpioiev = &GPIO_GPIO0IEV;
      break;
    case 1:
      gpiois  = &GPIO_GPIO1IS;
      gpioibe = &GPIO_GPIO1IBE;
      gpioiev = &GPIO_GPIO1IEV;
      break;
    case 2:
      gpiois  = &GPIO_GPIO2IS;
      gpioibe = &GPIO_GPIO2IBE;
      gpioiev = &GPIO_GPIO2IEV;
      break;
    case 3:
      gpiois  = &GPIO_GPIO3IS;
      gpioibe = &GPIO_GPIO3IBE;
      gpioiev = &GPIO_GPIO3IEV;
      break;
  }

  if (sense == gpioInterruptSense_Edge)
  {
    *gpiois &= ~(0x1<<bitPos);
    edge == gpioInterruptEdge_Single ? (*gpioibe &= ~(0x1<<bitPos)) : (*gpioibe |= (0x1<<bitPos));
  }
  else
  {
    *gpiois |= (0x1<<bitPos);
  }

  event == gpioInterruptEvent_ActiveHigh ? (*gpioiev &= ~(0x1<<bitPos)) : (*gpioiev |= (0x1<<bitPos));

  return;
}

/**************************************************************************/
/*! 
    @brief Enables the interrupt mask for a specific port pin

    @param[in]  portNum
                The port number (0..3)
    @param[in]  bitPos
                The bit position (0..31)
*/<commit_msg>Fixed reversed bit on IEV<commit_after>/**************************************************************************/
/*! 
    @file     gpio.c
    @author   <NAME> (microBuilder.eu)
    @date     22 March 2010
    @version  0.10

    @section DESCRIPTION
	
    Controls the general purpose digital IO.

    @section LICENSE

    Software License Agreement (BSD License)

    Copyright (c) 2010, microBuilder SARL
    All rights reserved.

    Redistribution and use in source and binary forms, with or without
    modification, are permitted provided that the following conditions are met:
    1. Redistributions of source code must retain the above copyright
    notice, this list of conditions and the following disclaimer.
    2. Redistributions in binary form must reproduce the above copyright
    notice, this list of conditions and the following disclaimer in the
    documentation and/or other materials provided with the distribution.
    3. Neither the name of the copyright holders nor the
    names of its contributors may be used to endorse or promote products
    derived from this software without specific prior written permission.

    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY
    EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
    WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
    DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY
    DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
    (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
    LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
    ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
    (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
    SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/**************************************************************************/

#include "gpio.h"

#ifdef CFG_CHIBI
#include "drivers/rf/chibi/chb_drvr.h"
volatile uint32_t chibi_counter  = 0;
#endif

#ifdef CFG_ALTRESET
#include "core/cpu/cpu.h"
#endif

static bool _gpioInitialised = false;

/**************************************************************************/
/*! 
    @brief IRQ Handler for GPIO port 0 (currently checks pin 0.1)

    @note  By default, this IRQ handler is probably disabled in
           projectconfig.h (see GPIO_ENABLE_IRQ0), but you can use
           the code below as a model to implement this interrupt
           handler in an appropriate place in your project.
*/
/**************************************************************************/
#if defined GPIO_ENABLE_IRQ0
void PIOINT0_IRQHandler(void)
{
  uint32_t regVal;

  regVal = gpioIntStatus(0, 1);
  if (regVal)
  {
    gpioIntClear(0, 1);
  }		
  return;
}
#endif

/**************************************************************************/
/*! 
    @brief IRQ Handler for GPIO port 1 (currently checks pin 1.1)
*/
/**************************************************************************/
#if defined GPIO_ENABLE_IRQ1
void PIOINT1_IRQHandler(void)
{
  uint32_t regVal;

#if defined CFG_ALTRESET && CFG_ALTRESET_PORT == 1
  regVal = gpioIntStatus(CFG_ALTRESET_PORT, CFG_ALTRESET_PIN);
  if (regVal)
  {
    // Cause a reset and wait
    cpuReset();
  }
#endif

#ifdef CFG_CHIBI
  // Check for interrupt on 1.8
  regVal = gpioIntStatus(1, 8);
  if (regVal)
  {
    chibi_counter++;
    chb_ISR_Handler();
    gpioIntClear(1, 8);
  }		
#else
  regVal = gpioIntStatus(1, 1);
  if ( regVal )
  {
    gpioIntClear(1, 1);
  }
#endif

  return;
}
#endif

/**************************************************************************/
/*! 
    @brief IRQ Handler for GPIO port 2 (currently checks pin 2.1)

    @note  By default, this IRQ handler is probably disabled in
           projectconfig.h (see GPIO_ENABLE_IRQ2), but you can use
           the code below as a model to implement this interrupt
           handler in an appropriate place in your project.
*/
/**************************************************************************/
#if defined GPIO_ENABLE_IRQ2
void PIOINT2_IRQHandler(void)
{
  uint32_t regVal;

  regVal = gpioIntStatus(2, 1);
  if ( regVal )
  {
    gpioIntClear(2, 1);
  }		
  return;
}
#endif

/**************************************************************************/
/*! 
    @brief IRQ Handler for GPIO port 3 (currently checks pin 3.1)

    @note  By default, this IRQ handler is probably disabled in
           projectconfig.h (see GPIO_ENABLE_IRQ3), but you can use
           the code below as a model to implement this interrupt
           handler in an appropriate place in your project.
*/
/**************************************************************************/
#if defined GPIO_ENABLE_IRQ3
void PIOINT3_IRQHandler(void)
{
  uint32_t regVal;

  regVal = gpioIntStatus(3, 1);
  if ( regVal )
  {
    gpioIntClear(3, 1);
  }		
  return;
}
#endif

/**************************************************************************/
/*! 
    @brief Initialises GPIO and enables the GPIO interrupt
           handler for all GPIO ports.
*/
/**************************************************************************/
void gpioInit (void)
{
  /* Enable AHB clock to the GPIO domain. */
  SCB_SYSAHBCLKCTRL |= (SCB_SYSAHBCLKCTRL_GPIO);

  /* Set up NVIC when I/O pins are configured as external interrupts. */
  NVIC_EnableIRQ(EINT0_IRQn);
  NVIC_EnableIRQ(EINT1_IRQn);
  NVIC_EnableIRQ(EINT2_IRQn);
  NVIC_EnableIRQ(EINT3_IRQn);

  /* Set initialisation flag */
  _gpioInitialised = true;

  return;
}

/**************************************************************************/
/*! 
    @brief Sets the direction (input/output) for a specific port pin

    @param[in]  portNum
                The port number (0..3)
    @param[in]  bitPos
                The bit position (0..11)
    @param[in]  dir
                The pin direction (gpioDirection_Input or
                gpioDirection_Output)
*/
/**************************************************************************/
void gpioSetDir (uint32_t portNum, uint32_t bitPos, gpioDirection_t dir)
{
  if (!_gpioInitialised) gpioInit();

  // Get the appropriate register (handled this way to optimise code size)
  REG32 *gpiodir = &GPIO_GPIO0DIR;
  switch (portNum)
  {
    case 0:
      gpiodir = &GPIO_GPIO0DIR;
      break;
    case 1:
      gpiodir = &GPIO_GPIO1DIR;
      break;
    case 2:
      gpiodir = &GPIO_GPIO2DIR;
      break;
    case 3:
      gpiodir = &GPIO_GPIO3DIR;
      break;
  }

  // Toggle dir
  dir == gpioDirection_Output ? (*gpiodir |= (1 << bitPos)) : (*gpiodir &= ~(1 << bitPos));
}

/**************************************************************************/
/*! 
    @brief Sets the interrupt sense, event, etc.

    @param[in]  portNum
                The port number (0..3)
    @param[in]  bitPos
                The bit position (0..31)
    @param[in]  sense
                Whether the interrupt should be configured as edge or level
                sensitive.
    @param[in]  edge
                Whether one edge or both trigger an interrupt.
    @param[in]  event
                Whether the rising or the falling edge (high or low)
                should be used to trigger the interrupt.

    @section Example

    @code
    // Initialise gpio
    gpioInit();
    // Set GPIO1.8 to input
    gpioSetDir(1, 8, gpioDirection_Input);
    // Disable the internal pullup/down resistor on P1.8
    gpioSetPullup (&IOCON_PIO1_8, gpioPullupMode_Inactive);
    // Setup an interrupt on GPIO1.8
    gpioSetInterrupt(1,                               // Port
                     8,                               // Pin
                     gpioInterruptSense_Edge,         // Edge/Level Sensitive
                     gpioInterruptEdge_Single,        // Single/Double Edge
                     gpioInterruptEvent_ActiveHigh);  // Rising/Falling
    // Enable the interrupt
    gpioIntEnable(1, 8);
    @endcode
*/
/**************************************************************************/
void gpioSetInterrupt (uint32_t portNum, uint32_t bitPos, gpioInterruptSense_t sense, gpioInterruptEdge_t edge, gpioInterruptEvent_t event)
{
  if (!_gpioInitialised) gpioInit();

  // Get the appropriate register (handled this way to optimise code size)
  REG32 *gpiois  = &GPIO_GPIO0IS;   // Interrupt sense (edge or level sensitive)
  REG32 *gpioibe = &GPIO_GPIO0IBE;  // Interrupt both edges (0 = int controlled by GPIOIEV, 1 = both edges trigger interrupt)
  REG32 *gpioiev = &GPIO_GPIO0IEV;  // 0 = falling edge or low, 1 = rising edge or high (depending on GPIOIS)
  switch (portNum)
  {
    case 0:
      gpiois  = &GPIO_GPIO0IS;
      gpioibe = &GPIO_GPIO0IBE;
      gpioiev = &GPIO_GPIO0IEV;
      break;
    case 1:
      gpiois  = &GPIO_GPIO1IS;
      gpioibe = &GPIO_GPIO1IBE;
      gpioiev = &GPIO_GPIO1IEV;
      break;
    case 2:
      gpiois  = &GPIO_GPIO2IS;
      gpioibe = &GPIO_GPIO2IBE;
      gpioiev = &GPIO_GPIO2IEV;
      break;
    case 3:
      gpiois  = &GPIO_GPIO3IS;
      gpioibe = &GPIO_GPIO3IBE;
      gpioiev = &GPIO_GPIO3IEV;
      break;
  }

  if (sense == gpioInterruptSense_Edge)
  {
    *gpiois &= ~(0x1<<bitPos);
    edge == gpioInterruptEdge_Single ? (*gpioibe &= ~(0x1<<bitPos)) : (*gpioibe |= (0x1<<bitPos));
  }
  else
  {
    *gpiois |= (0x1<<bitPos);
  }

  event == gpioInterruptEvent_ActiveLow ? (*gpioiev &= ~(0x1<<bitPos)) : (*gpioiev |= (0x1<<bitPos));

  return;
}

/**************************************************************************/
/*! 
    @brief Enables the interrupt mask for a specific port pin

    @param[in]  portNum
                The port number (0..3)
    @param[in]  bitPos
                The bit position (0..31)
*/
{'fraction_non_alphanumeric': 0.20362152512114257, 'fraction_numerical': 0.01713848508033665, 'mean_word_length': 3.0854344655136487, 'pattern_counts': {'":': 0, '<': 37, '<?xml version=': 0, '>': 5, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 6, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
{'dir': 'git-commits-cleaned', 'id': '7343348', 'n_tokens_mistral': 6017, 'n_tokens_neox': 5477, 'n_words': 1810}