<commit_before>/*
 * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
 *
 * SPDX-License-Identifier: BSD-3-Clause
 */
#ifndef __PLAT_ARM_H__
#define __PLAT_ARM_H__

#include <arm_xlat_tables.h>
#include <bakery_lock.h>
#include <cassert.h>
#include <cpu_data.h>
#include <stdint.h>
#include <tzc_common.h>
#include <utils_def.h>

/*******************************************************************************
 * Forward declarations
 ******************************************************************************/
struct bl31_params;
struct meminfo;
struct image_info;
struct bl_params;

typedef struct arm_tzc_regions_info {
	unsigned long long base;
	unsigned long long end;
	tzc_region_attributes_t sec_attr;
	unsigned int nsaid_permissions;
} arm_tzc_regions_info_t;

/*******************************************************************************
 * Default mapping definition of the TrustZone Controller for ARM standard
 * platforms.
 * Configure:
 *   - Region 0 with no access;
 *   - Region 1 with secure access only;
 *   - the remaining DRAM regions access from the given Non-Secure masters.
 ******************************************************************************/
#if ENABLE_SPM
#define ARM_TZC_REGIONS_DEF						\
	{ARM_AP_TZC_DRAM1_BASE, ARM_EL3_TZC_DRAM1_END,			\
		TZC_REGION_S_RDWR, 0},					\
	{ARM_NS_DRAM1_BASE, ARM_NS_DRAM1_END, ARM_TZC_NS_DRAM_S_ACCESS, \
		PLAT_ARM_TZC_NS_DEV_ACCESS}, 				\
	{ARM_DRAM2_BASE, ARM_DRAM2_END, ARM_TZC_NS_DRAM_S_ACCESS,	\
		PLAT_ARM_TZC_NS_DEV_ACCESS},				\
	{ARM_SP_IMAGE_NS_BUF_BASE, (ARM_SP_IMAGE_NS_BUF_BASE +		\
		ARM_SP_IMAGE_NS_BUF_SIZE) - 1, TZC_REGION_S_NONE,	\
		PLAT_ARM_TZC_NS_DEV_ACCESS}

#else
#define ARM_TZC_REGIONS_DEF						\
	{ARM_AP_TZC_DRAM1_BASE, ARM_EL3_TZC_DRAM1_END,			\
		TZC_REGION_S_RDWR, 0},					\
	{ARM_NS_DRAM1_BASE, ARM_NS_DRAM1_END, ARM_TZC_NS_DRAM_S_ACCESS, \
		PLAT_ARM_TZC_NS_DEV_ACCESS},	 			\
	{ARM_DRAM2_BASE, ARM_DRAM2_END, ARM_TZC_NS_DRAM_S_ACCESS,	\
		PLAT_ARM_TZC_NS_DEV_ACCESS}
#endif

#define ARM_CASSERT_MMAP						\
	CASSERT((ARRAY_SIZE(plat_arm_mmap) + ARM_BL_REGIONS)		\
		<= MAX_MMAP_REGIONS,					\
		assert_max_mmap_regions);

/*
 * Utility functions common to ARM standard platforms
 */
void arm_setup_page_tables(uintptr_t total_base,
			size_t total_size,
			uintptr_t code_start,
			uintptr_t code_limit,<commit_msg>plat/arm: Fix incorrect bounds check in ARM_CASSERT_MMAP<commit_after>/*
 * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
 *
 * SPDX-License-Identifier: BSD-3-Clause
 */
#ifndef __PLAT_ARM_H__
#define __PLAT_ARM_H__

#include <arm_xlat_tables.h>
#include <bakery_lock.h>
#include <cassert.h>
#include <cpu_data.h>
#include <stdint.h>
#include <tzc_common.h>
#include <utils_def.h>

/*******************************************************************************
 * Forward declarations
 ******************************************************************************/
struct bl31_params;
struct meminfo;
struct image_info;
struct bl_params;

typedef struct arm_tzc_regions_info {
	unsigned long long base;
	unsigned long long end;
	tzc_region_attributes_t sec_attr;
	unsigned int nsaid_permissions;
} arm_tzc_regions_info_t;

/*******************************************************************************
 * Default mapping definition of the TrustZone Controller for ARM standard
 * platforms.
 * Configure:
 *   - Region 0 with no access;
 *   - Region 1 with secure access only;
 *   - the remaining DRAM regions access from the given Non-Secure masters.
 ******************************************************************************/
#if ENABLE_SPM
#define ARM_TZC_REGIONS_DEF						\
	{ARM_AP_TZC_DRAM1_BASE, ARM_EL3_TZC_DRAM1_END,			\
		TZC_REGION_S_RDWR, 0},					\
	{ARM_NS_DRAM1_BASE, ARM_NS_DRAM1_END, ARM_TZC_NS_DRAM_S_ACCESS, \
		PLAT_ARM_TZC_NS_DEV_ACCESS}, 				\
	{ARM_DRAM2_BASE, ARM_DRAM2_END, ARM_TZC_NS_DRAM_S_ACCESS,	\
		PLAT_ARM_TZC_NS_DEV_ACCESS},				\
	{ARM_SP_IMAGE_NS_BUF_BASE, (ARM_SP_IMAGE_NS_BUF_BASE +		\
		ARM_SP_IMAGE_NS_BUF_SIZE) - 1, TZC_REGION_S_NONE,	\
		PLAT_ARM_TZC_NS_DEV_ACCESS}

#else
#define ARM_TZC_REGIONS_DEF						\
	{ARM_AP_TZC_DRAM1_BASE, ARM_EL3_TZC_DRAM1_END,			\
		TZC_REGION_S_RDWR, 0},					\
	{ARM_NS_DRAM1_BASE, ARM_NS_DRAM1_END, ARM_TZC_NS_DRAM_S_ACCESS, \
		PLAT_ARM_TZC_NS_DEV_ACCESS},	 			\
	{ARM_DRAM2_BASE, ARM_DRAM2_END, ARM_TZC_NS_DRAM_S_ACCESS,	\
		PLAT_ARM_TZC_NS_DEV_ACCESS}
#endif

#define ARM_CASSERT_MMAP						  \
	CASSERT((ARRAY_SIZE(plat_arm_mmap) - 1) <= PLAT_ARM_MMAP_ENTRIES, \
		assert_plat_arm_mmap_mismatch);				  \
	CASSERT((PLAT_ARM_MMAP_ENTRIES + ARM_BL_REGIONS)		  \
		<= MAX_MMAP_REGIONS,					  \
		assert_max_mmap_regions);

/*
 * Utility functions common to ARM standard platforms
 */
void arm_setup_page_tables(uintptr_t total_base,
			size_t total_size,
			uintptr_t code_start,
			uintptr_t code_limit,
{'fraction_non_alphanumeric': 0.20164102564102565, 'fraction_numerical': 0.012512820512820513, 'mean_word_length': 5.562584118438762, 'pattern_counts': {'":': 0, '<': 20, '<?xml version=': 0, '>': 17, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
{'dir': 'git-commits-cleaned', 'id': '4992005', 'n_tokens_mistral': 2047, 'n_tokens_neox': 1854, 'n_words': 311}