<commit_before>/*
 * quatech_daqp_cs.c
 * Quatech DAQP PCMCIA data capture cards COMEDI client driver
 * Copyright (C) 2000, 2003 <NAME> <<EMAIL>>
 * The DAQP interface code in this file is released into the public domain.
 *
 * COMEDI - Linux Control and Measurement Device Interface
 * Copyright (C) 1998 <NAME> <<EMAIL>>
 * http://www.comedi.org/
 *
 * Documentation for the DAQP PCMCIA cards can be found on Quatech's site:
 *	ftp://ftp.quatech.com/Manuals/daqp-208.pdf
 *
 * This manual is for both the DAQP-208 and the DAQP-308.
 *
 * What works:
 * - A/D conversion
 *	- 8 channels
 *	- 4 gain ranges
 *	- ground ref or differential
 *	- single-shot and timed both supported
 * - D/A conversion, single-shot
 * - digital I/O
 *
 * What doesn't:
 * - any kind of triggering - external or D/A channel 1
 * - the card's optional expansion board
 * - the card's timer (for anything other than A/D conversion)
 * - D/A update modes other than immediate (i.e, timed)
 * - fancier timing modes
 * - setting card's FIFO buffer thresholds to anything but default
 */

/*
 * Driver: quatech_daqp_cs
 * Description: Quatech DAQP PCMCIA data capture cards
 * Devices: [Quatech] DAQP-208 (daqp), DAQP-308
 * Author: <NAME> <<EMAIL>>
 * Status: works
 */

#include <linux/module.h>
#include <linux/semaphore.h>
#include <linux/completion.h>

#include "../comedi_pcmcia.h"

/*
 * Register I/O map
 *
 * The D/A and timer registers can be accessed with 16-bit or 8-bit I/O
 * instructions. All other registers can only use 8-bit instructions.
 *
 * The FIFO and scanlist registers require two 8-bit instructions to
 * access the 16-bit data. Data is transferred LSB then MSB.
 */
#define DAQP_AI_FIFO_REG		0x00

#define DAQP_SCANLIST_REG		0x01
#define DAQP_SCANLIST_DIFFERENTIAL	BIT(14)
#define DAQP_SCANLIST_GAIN(x)		(((x) & 0x3) << 12)
#define DAQP_SCANLIST_CHANNEL(x)	(((x) & 0xf) << 8)
#define DAQP_SCANLIST_START		BIT(7)
#define DAQP_SCANLIST_EXT_GAIN(x)	(((x) & 0x3) << 4)
#define DAQP_SCANLIST_EXT_CHANNEL(x)	(((x) & 0xf) << 0)

#define DAQP_CTRL_REG			0x02
#define DAQP_CTRL_PACER_CLK(x)		(((x) & 0x3) << 6)
#define DAQP_CTRL_PACER_CLK_EXT		DAQP_CTRL_PACER_CLK(0)
#define DAQP_CTRL_PACER_CLK_5MHZ	DAQP_CTRL_PACER_CLK(1)
#define DAQP_CTRL_PACER_CLK_1MHZ	DAQP_CTRL_PACER_CLK(2)
#define DAQP_CTRL_PACER_CLK_100KHZ	DAQP_CTRL_PACER_CLK(3)
#define DAQP_CTRL_EXPANSION		BIT(5)
#define DAQP_CTRL_EOS_INT_ENA		BIT(4)
#define DAQP_CTRL_FIFO_INT_ENA		BIT(3)
#define DAQP_CTRL_TRIG_MODE		BIT(2)	/* 0=one-shot; 1=continuous */
#define DAQP_CTRL_TRIG_SRC		BIT(1)	/* 0=internal; 1=external */
#define DAQP_CTRL_TRIG_EDGE		BIT(0)	/* 0=rising; 1=falling */

#define DAQP_STATUS_REG			0x02
#define DAQP_STATUS_IDLE		BIT(7)
#define DAQP_STATUS_RUNNING		BIT(6)
#define DAQP_STATUS_DATA_LOST		BIT(5)
#define DAQP_STATUS_END_OF_SCAN		BIT(4)
#define DAQP_STATUS_FIFO_THRESHOLD	BIT(3)
#define DAQP_STATUS_FIFO_FULL		BIT(2)
#define DAQP_STATUS_FIFO_NEARFULL	BIT(1)
#define DAQP_STATUS_FIFO_EMPTY		BIT(0)
/* these bits clear when the status register is read */
#define DAQP_STATUS_EVENTS		(DAQP_STATUS_DATA_LOST |	\
					 DAQP_STATUS_END_OF_SCAN |	\
					 DAQP_STATUS_FIFO_THRESHOLD)

#define DAQP_DI_REG			0x03
#define DAQP_DO_REG			0x03

#define DAQP_PACER_LOW_REG		0x04
#define DAQP_PACER_MID_REG		0x05
#define DAQP_PACER_HIGH_REG		0x06

#define DAQP_CMD_REG			0x07
/* the monostable bits are self-clearing after the function is complete */
#define DAQP_CMD_ARM			BIT(7)	/* monostable */
#define DAQP_CMD_RSTF			BIT(6)	/* monostable */
#define DAQP_CMD_RSTQ			BIT(5)	/* monostable */
#define DAQP_CMD_STOP			BIT(4)	/* monostable */
#define DAQP_CMD_LATCH			BIT(3)	/* monostable */
#define DAQP_CMD_SCANRATE(x)		(((x) & 0x3) << 1)
#define DAQP_CMD_SCANRATE_100KHZ	DAQP_CMD_SCANRATE(0)
#define DAQP_CMD_SCANRATE_50KHZ		DAQP_CMD_SCANRATE(1)
#define DAQP_CMD_SCANRATE_25KHZ		DAQP_CMD_SCANRATE(2)
#define DAQP_CMD_FIFO_DATA		BIT(0)

#define DAQP_AO_REG			0x08
#define DAQP_TIMER_REG			0x0a
#define DAQP_AUX_REG			0x0f

#define DAQP_AUX_TRIGGER_TTL		0x00
#define DAQP_AUX_TRIGGER_ANALOG		0x80<commit_msg>staging: comedi: quatech_daqp_cs: document the 16-bit registers<commit_after>/*
 * quatech_daqp_cs.c
 * Quatech DAQP PCMCIA data capture cards COMEDI client driver
 * Copyright (C) 2000, 2003 <NAME> <<EMAIL>>
 * The DAQP interface code in this file is released into the public domain.
 *
 * COMEDI - Linux Control and Measurement Device Interface
 * Copyright (C) 1998 <NAME> <<EMAIL>>
 * http://www.comedi.org/
 *
 * Documentation for the DAQP PCMCIA cards can be found on Quatech's site:
 *	ftp://ftp.quatech.com/Manuals/daqp-208.pdf
 *
 * This manual is for both the DAQP-208 and the DAQP-308.
 *
 * What works:
 * - A/D conversion
 *	- 8 channels
 *	- 4 gain ranges
 *	- ground ref or differential
 *	- single-shot and timed both supported
 * - D/A conversion, single-shot
 * - digital I/O
 *
 * What doesn't:
 * - any kind of triggering - external or D/A channel 1
 * - the card's optional expansion board
 * - the card's timer (for anything other than A/D conversion)
 * - D/A update modes other than immediate (i.e, timed)
 * - fancier timing modes
 * - setting card's FIFO buffer thresholds to anything but default
 */

/*
 * Driver: quatech_daqp_cs
 * Description: Quatech DAQP PCMCIA data capture cards
 * Devices: [Quatech] DAQP-208 (daqp), DAQP-308
 * Author: <NAME> <<EMAIL>>
 * Status: works
 */

#include <linux/module.h>
#include <linux/semaphore.h>
#include <linux/completion.h>

#include "../comedi_pcmcia.h"

/*
 * Register I/O map
 *
 * The D/A and timer registers can be accessed with 16-bit or 8-bit I/O
 * instructions. All other registers can only use 8-bit instructions.
 *
 * The FIFO and scanlist registers require two 8-bit instructions to
 * access the 16-bit data. Data is transferred LSB then MSB.
 */
#define DAQP_AI_FIFO_REG		0x00

#define DAQP_SCANLIST_REG		0x01
#define DAQP_SCANLIST_DIFFERENTIAL	BIT(14)
#define DAQP_SCANLIST_GAIN(x)		(((x) & 0x3) << 12)
#define DAQP_SCANLIST_CHANNEL(x)	(((x) & 0xf) << 8)
#define DAQP_SCANLIST_START		BIT(7)
#define DAQP_SCANLIST_EXT_GAIN(x)	(((x) & 0x3) << 4)
#define DAQP_SCANLIST_EXT_CHANNEL(x)	(((x) & 0xf) << 0)

#define DAQP_CTRL_REG			0x02
#define DAQP_CTRL_PACER_CLK(x)		(((x) & 0x3) << 6)
#define DAQP_CTRL_PACER_CLK_EXT		DAQP_CTRL_PACER_CLK(0)
#define DAQP_CTRL_PACER_CLK_5MHZ	DAQP_CTRL_PACER_CLK(1)
#define DAQP_CTRL_PACER_CLK_1MHZ	DAQP_CTRL_PACER_CLK(2)
#define DAQP_CTRL_PACER_CLK_100KHZ	DAQP_CTRL_PACER_CLK(3)
#define DAQP_CTRL_EXPANSION		BIT(5)
#define DAQP_CTRL_EOS_INT_ENA		BIT(4)
#define DAQP_CTRL_FIFO_INT_ENA		BIT(3)
#define DAQP_CTRL_TRIG_MODE		BIT(2)	/* 0=one-shot; 1=continuous */
#define DAQP_CTRL_TRIG_SRC		BIT(1)	/* 0=internal; 1=external */
#define DAQP_CTRL_TRIG_EDGE		BIT(0)	/* 0=rising; 1=falling */

#define DAQP_STATUS_REG			0x02
#define DAQP_STATUS_IDLE		BIT(7)
#define DAQP_STATUS_RUNNING		BIT(6)
#define DAQP_STATUS_DATA_LOST		BIT(5)
#define DAQP_STATUS_END_OF_SCAN		BIT(4)
#define DAQP_STATUS_FIFO_THRESHOLD	BIT(3)
#define DAQP_STATUS_FIFO_FULL		BIT(2)
#define DAQP_STATUS_FIFO_NEARFULL	BIT(1)
#define DAQP_STATUS_FIFO_EMPTY		BIT(0)
/* these bits clear when the status register is read */
#define DAQP_STATUS_EVENTS		(DAQP_STATUS_DATA_LOST |	\
					 DAQP_STATUS_END_OF_SCAN |	\
					 DAQP_STATUS_FIFO_THRESHOLD)

#define DAQP_DI_REG			0x03
#define DAQP_DO_REG			0x03

#define DAQP_PACER_LOW_REG		0x04
#define DAQP_PACER_MID_REG		0x05
#define DAQP_PACER_HIGH_REG		0x06

#define DAQP_CMD_REG			0x07
/* the monostable bits are self-clearing after the function is complete */
#define DAQP_CMD_ARM			BIT(7)	/* monostable */
#define DAQP_CMD_RSTF			BIT(6)	/* monostable */
#define DAQP_CMD_RSTQ			BIT(5)	/* monostable */
#define DAQP_CMD_STOP			BIT(4)	/* monostable */
#define DAQP_CMD_LATCH			BIT(3)	/* monostable */
#define DAQP_CMD_SCANRATE(x)		(((x) & 0x3) << 1)
#define DAQP_CMD_SCANRATE_100KHZ	DAQP_CMD_SCANRATE(0)
#define DAQP_CMD_SCANRATE_50KHZ		DAQP_CMD_SCANRATE(1)
#define DAQP_CMD_SCANRATE_25KHZ		DAQP_CMD_SCANRATE(2)
#define DAQP_CMD_FIFO_DATA		BIT(0)

#define DAQP_AO_REG			0x08	/* and 0x09 (16-bit) */

#define DAQP_TIMER_REG			0x0a	/* and 0x0b (16-bit) */

#define DAQP_AUX_REG			0x0f

#define DAQP_AUX_TRIGGER_TTL		0x00
#define DAQP_AUX_TRIGGER_ANALOG		0x80
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