<commit_before>/* IBM_PROLOG_BEGIN_TAG                                                   */
/* This is an automatically generated prolog.                             */
/*                                                                        */
/* $Source: src/usr/diag/prdf/common/plat/p10/prdfP10Core.C $             */
/*                                                                        */
/* OpenPOWER HostBoot Project                                             */
/*                                                                        */
/* Contributors Listed Below - COPYRIGHT 2017,2020                        */
/* [+] International Business Machines Corp.                              */
/*                                                                        */
/*                                                                        */
/* Licensed under the Apache License, Version 2.0 (the "License");        */
/* you may not use this file except in compliance with the License.       */
/* You may obtain a copy of the License at                                */
/*                                                                        */
/*     http://www.apache.org/licenses/LICENSE-2.0                         */
/*                                                                        */
/* Unless required by applicable law or agreed to in writing, software    */
/* distributed under the License is distributed on an "AS IS" BASIS,      */
/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
/* implied. See the License for the specific language governing           */
/* permissions and limitations under the License.                         */
/*                                                                        */
/* IBM_PROLOG_END_TAG                                                     */
// Framework includes
#include <prdfPluginDef.H>
#include <iipServiceDataCollector.h>
#include <prdfExtensibleChip.H>
#include <prdfPluginMap.H>
#include <prdfErrlUtil.H>
#ifdef __HOSTBOOT_RUNTIME
  #include <hwas/common/hwas.H>
  #include <hwas/common/deconfigGard.H>
#endif

using namespace TARGETING;

namespace PRDF
{

using namespace PlatServices;

namespace p10_core
{
#ifdef __HOSTBOOT_RUNTIME
void maskIfCoreCs( ExtensibleChip * i_chip )
{
    int32_t l_rc = SUCCESS;

    ExtensibleChip * eq = getConnectedParent( i_chip, TYPE_EQ );

    do
    {
        // Get the EQ chiplet level mask registers.
        SCAN_COMM_REGISTER_CLASS * eq_chiplet_cs_fir_mask =
            eq->getRegister("EQ_CHIPLET_CS_FIR_MASK");

        SCAN_COMM_REGISTER_CLASS * eq_chiplet_re_fir_mask =
            eq->getRegister("EQ_CHIPLET_RE_FIR_MASK");

        SCAN_COMM_REGISTER_CLASS * eq_chiplet_ucs_fir_mask =
            eq->getRegister("EQ_CHIPLET_UCS_FIR_MASK");

        // Read values.
        l_rc  = eq_chiplet_cs_fir_mask->Read();
        l_rc |= eq_chiplet_re_fir_mask->Read();
        l_rc |= eq_chiplet_ucs_fir_mask->Read();

        if ( SUCCESS != l_rc ) break;

        uint8_t corePos = i_chip->getPos() % MAX_EC_PER_EQ; // 0-3

        // Mask analysis to the EQ_CORE_FIR depending on the core position
        eq_chiplet_cs_fir_mask->SetBit(5+corePos);
        eq_chiplet_re_fir_mask->SetBit(5+corePos);
        eq_chiplet_ucs_fir_mask->SetBit(5+corePos);

        eq_chiplet_cs_fir_mask->Write();
        eq_chiplet_re_fir_mask->Write();
        eq_chiplet_ucs_fir_mask->Write();

        // Clear the local checkstop summary bit on bit 2 of the RE chiplet FIR
        SCAN_COMM_REGISTER_CLASS * eq_chiplet_re_fir =
            eq->getRegister("EQ_CHIPLET_RE_FIR");
        l_rc = eq_chiplet_re_fir->ForceRead();

        if ( SUCCESS != l_rc ) break;

        if ( eq_chiplet_re_fir->IsBitSet(2) )
        {
            eq_chiplet_re_fir->ClearBit(2);
            eq_chiplet_re_fir->Write();
        }
    }while(0);
}

void rtDcnfgCore( ExtensibleChip * i_chip )
{
    TargetHandle_t coreTgt = i_chip->getTrgt();

    // Get the Global Errorlog
    errlHndl_t globalErrl =
        ServiceGeneratorClass::ThisServiceGenerator().getErrl();

    // Call Deconfig
    errlHndl_t errl = nullptr;
    errl = HWAS::theDeconfigGard().deconfigureTargetAtRuntime( coreTgt,
                       HWAS::DeconfigGard::FULLY_AT_RUNTIME, globalErrl );

    if (errl)
    {
        PRDF_ERR( "[EC::rtDcnfgCore] Deconfig failed on core %x",
                  getHuid(coreTgt));
        PRDF_COMMIT_ERRL( errl, ERRL_ACTION_REPORT );
    }
}
#endif

/**
 * @brief  Plugin function called after analysis is complete but before PRD
 *         exits.
 * @param  i_chip    EC chip.
 * @param  io_sc     The step code data struct.
 * @note   This is especially useful for any analysis that still needs to be
 *         done after the framework clears the FIR bits that were at attention.
 * @return SUCCESS.
 */
int32_t PostAnalysis( ExtensibleChip * i_chip,
                      STEP_CODE_DATA_STRUCT & io_sc )
{
    #ifdef __HOSTBOOT_RUNTIME
    if ( io_sc.service_data->isProcCoreCS() )
    {
        ExtensibleChip * n_chip = getNeighborCore(i_chip);
        maskIfCoreCs(i_chip);
        rtDcnfgCore(i_chip);
        if (n_chip != nullptr)
        {
            maskIfCoreCs(n_chip);
        }
    }
    else
    {
        int32_t l_rc = restartTraceArray(i_chip->getTrgt());
        if (SUCCESS != l_rc)<commit_msg>PRD: No longer deconfig cores at runtime for unit checkstop<commit_after>/* IBM_PROLOG_BEGIN_TAG                                                   */
/* This is an automatically generated prolog.                             */
/*                                                                        */
/* $Source: src/usr/diag/prdf/common/plat/p10/prdfP10Core.C $             */
/*                                                                        */
/* OpenPOWER HostBoot Project                                             */
/*                                                                        */
/* Contributors Listed Below - COPYRIGHT 2017,2020                        */
/* [+] International Business Machines Corp.                              */
/*                                                                        */
/*                                                                        */
/* Licensed under the Apache License, Version 2.0 (the "License");        */
/* you may not use this file except in compliance with the License.       */
/* You may obtain a copy of the License at                                */
/*                                                                        */
/*     http://www.apache.org/licenses/LICENSE-2.0                         */
/*                                                                        */
/* Unless required by applicable law or agreed to in writing, software    */
/* distributed under the License is distributed on an "AS IS" BASIS,      */
/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
/* implied. See the License for the specific language governing           */
/* permissions and limitations under the License.                         */
/*                                                                        */
/* IBM_PROLOG_END_TAG                                                     */
// Framework includes
#include <prdfPluginDef.H>
#include <iipServiceDataCollector.h>
#include <prdfExtensibleChip.H>
#include <prdfPluginMap.H>
#include <prdfErrlUtil.H>
#ifdef __HOSTBOOT_RUNTIME
  #include <hwas/common/hwas.H>
  #include <hwas/common/deconfigGard.H>
#endif

using namespace TARGETING;

namespace PRDF
{

using namespace PlatServices;

namespace p10_core
{
#ifdef __HOSTBOOT_RUNTIME
void maskIfCoreCs( ExtensibleChip * i_chip )
{
    int32_t l_rc = SUCCESS;

    ExtensibleChip * eq = getConnectedParent( i_chip, TYPE_EQ );

    do
    {
        // Get the EQ chiplet level mask registers.
        SCAN_COMM_REGISTER_CLASS * eq_chiplet_cs_fir_mask =
            eq->getRegister("EQ_CHIPLET_CS_FIR_MASK");

        SCAN_COMM_REGISTER_CLASS * eq_chiplet_re_fir_mask =
            eq->getRegister("EQ_CHIPLET_RE_FIR_MASK");

        SCAN_COMM_REGISTER_CLASS * eq_chiplet_ucs_fir_mask =
            eq->getRegister("EQ_CHIPLET_UCS_FIR_MASK");

        // Read values.
        l_rc  = eq_chiplet_cs_fir_mask->Read();
        l_rc |= eq_chiplet_re_fir_mask->Read();
        l_rc |= eq_chiplet_ucs_fir_mask->Read();

        if ( SUCCESS != l_rc ) break;

        uint8_t corePos = i_chip->getPos() % MAX_EC_PER_EQ; // 0-3

        // Mask analysis to the EQ_CORE_FIR depending on the core position
        eq_chiplet_cs_fir_mask->SetBit(5+corePos);
        eq_chiplet_re_fir_mask->SetBit(5+corePos);
        eq_chiplet_ucs_fir_mask->SetBit(5+corePos);

        eq_chiplet_cs_fir_mask->Write();
        eq_chiplet_re_fir_mask->Write();
        eq_chiplet_ucs_fir_mask->Write();

        // Clear the local checkstop summary bit on bit 2 of the RE chiplet FIR
        SCAN_COMM_REGISTER_CLASS * eq_chiplet_re_fir =
            eq->getRegister("EQ_CHIPLET_RE_FIR");
        l_rc = eq_chiplet_re_fir->ForceRead();

        if ( SUCCESS != l_rc ) break;

        if ( eq_chiplet_re_fir->IsBitSet(2) )
        {
            eq_chiplet_re_fir->ClearBit(2);
            eq_chiplet_re_fir->Write();
        }
    }while(0);
}

#endif

/**
 * @brief  Plugin function called after analysis is complete but before PRD
 *         exits.
 * @param  i_chip    EC chip.
 * @param  io_sc     The step code data struct.
 * @note   This is especially useful for any analysis that still needs to be
 *         done after the framework clears the FIR bits that were at attention.
 * @return SUCCESS.
 */
int32_t PostAnalysis( ExtensibleChip * i_chip,
                      STEP_CODE_DATA_STRUCT & io_sc )
{
    #ifdef __HOSTBOOT_RUNTIME
    if ( io_sc.service_data->isProcCoreCS() )
    {
        ExtensibleChip * n_chip = getNeighborCore(i_chip);
        maskIfCoreCs(i_chip);
        if (n_chip != nullptr)
        {
            maskIfCoreCs(n_chip);
        }

        // NOTE: We no longer need to do a runtime deconfig of the core here as
        // in P10 there is now support for non-fatal unit checkstops at runtime.
        // We want to avoid runtime deconfiguring of the core to avoid problems
        // that it can potentially cause for MPIPL and HWPs.
    }
    else
    {
        int32_t l_rc = restartTraceArray(i_chip->getTrgt());
        if (SUCCESS != l_rc)
{'fraction_non_alphanumeric': 0.08622502628811778, 'fraction_numerical': 0.006691520887104483, 'mean_word_length': 1.5387041980101916, 'pattern_counts': {'":': 0, '<': 17, '<?xml version=': 0, '>': 58, 'https://': 0, 'lorem ipsum': 0, 'www.': 2, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 62, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
{'dir': 'git-commits-cleaned', 'id': '1782319', 'n_tokens_mistral': 3020, 'n_tokens_neox': 2898, 'n_words': 690}