<commit_before>#
set -x
set -e
scripts/importbvi.py -o PCIEWRAPPER.bsv -I PcieWrap -P PcieWrap \
    -n pl_link_partner_gen2_supported \
    -n cfg_mgmt_wr_rw1c_as_rw \
    -n pipe_gen3_out \
    -n pipe_userclk1_in \
    -n pipe_userclk2_in \
    -n pl_link_gen2_cap \
    -f cfg_aer -f cfg_ds -f cfg_err -f cfg_interrupt \
    -f cfg_mgmt -f cfg_msg -f cfg_pmcsr -f cfg_pm \
    -f cfg_root_control \
    -f pipe -f pl_link -f pci_exp -f pcie_drp \
    xilinx/pcie_7x_v2_1/synth/pcie_7x_0.v<commit_msg>generate PCIEWRAPPER from files checked into import_components.git<commit_after>#
set -x
set -e
scripts/importbvi.py -o PCIEWRAPPER.bsv -I PcieWrap -P PcieWrap \
    -n pl_link_partner_gen2_supported \
    -n cfg_mgmt_wr_rw1c_as_rw \
    -n pipe_gen3_out \
    -n pipe_userclk1_in \
    -n pipe_userclk2_in \
    -n pl_link_gen2_cap \
    -c user_clk_out \
    -r user_reset_out \
    -f cfg_aer -f cfg_ds -f cfg_err -f cfg_interrupt \
    -f cfg_mgmt -f cfg_msg -f cfg_pmcsr -f cfg_pm \
    -f cfg_root_control \
    -f pipe -f pl_link -f pci_exp -f pcie_drp \
    -p lanes \
    ../../import_components/Xilinx/generated/kc705/pcie_7x_0/synth/pcie_7x_0.v

#    xilinx/pcie_7x_v2_1/synth/pcie_7x_0.v
{'fraction_non_alphanumeric': 0.09393183707398171, 'fraction_numerical': 0.024106400665004156, 'mean_word_length': 2.4597701149425286, 'pattern_counts': {'":': 0, '<': 3, '<?xml version=': 0, '>': 3, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
{'dir': 'git-commits-cleaned', 'id': '4995629', 'n_tokens_mistral': 564, 'n_tokens_neox': 562, 'n_words': 114}