<commit_before>; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -slp-vectorizer -slp-vectorize-hor -slp-vectorize-hor-store -S < %s -mtriple=x86_64-apple-macosx -mcpu=corei7-avx -mattr=+avx | FileCheck %s

;void Distance(float *p1, int p2, unsigned long p3[], float p4[]) {
;  long a = p3[0] = 5;
;  p1 += p2;
;  p4[3] += p1[a];
;  p3[0] >>= 5;
;  p3[1] >>= 5;
;  p3[2] >>= 5;
;  p3[3] >>= 5;
;  p1 += p2;
;  p4[0] += p1[p3[0] & a];
;}

define void @_Z8DistanceIlLi5EEvPfiPmS0_(float* %p1, i32 %p2, i64* %p3, float* %p4) {
; CHECK-LABEL: @_Z8DistanceIlLi5EEvPfiPmS0_(
; CHECK-NEXT:  entry:
; CHECK-NEXT:    store i64 5, i64* [[P3:%.*]], align 8
; CHECK-NEXT:    [[IDX_EXT:%.*]] = sext i32 [[P2:%.*]] to i64
; CHECK-NEXT:    [[ADD_PTR:%.*]] = getelementptr inbounds float, float* [[P1:%.*]], i64 [[IDX_EXT]]
; CHECK-NEXT:    [[ARRAYIDX1:%.*]] = getelementptr inbounds float, float* [[ADD_PTR]], i64 5
; CHECK-NEXT:    [[TMP0:%.*]] = load float, float* [[ARRAYIDX1]], align 4
; CHECK-NEXT:    [[ARRAYIDX2:%.*]] = getelementptr inbounds float, float* [[P4:%.*]], i64 3
; CHECK-NEXT:    [[TMP1:%.*]] = load float, float* [[ARRAYIDX2]], align 4
; CHECK-NEXT:    [[ADD:%.*]] = fadd float [[TMP0]], [[TMP1]]
; CHECK-NEXT:    store float [[ADD]], float* [[ARRAYIDX2]], align 4
; CHECK-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds i64, i64* [[P3]], i64 1
; CHECK-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds i64, i64* [[P3]], i64 2
; CHECK-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds i64, i64* [[P3]], i64 3
; CHECK-NEXT:    [[TMP2:%.*]] = bitcast i64* [[P3]] to <4 x i64>*
; CHECK-NEXT:    [[TMP3:%.*]] = load <4 x i64>, <4 x i64>* [[TMP2]], align 8
; CHECK-NEXT:    [[TMP4:%.*]] = lshr <4 x i64> [[TMP3]], <i64 5, i64 5, i64 5, i64 5>
; CHECK-NEXT:    [[TMP5:%.*]] = bitcast i64* [[P3]] to <4 x i64>*
; CHECK-NEXT:    store <4 x i64> [[TMP4]], <4 x i64>* [[TMP5]], align 8
; CHECK-NEXT:    [[ADD_PTR11:%.*]] = getelementptr inbounds float, float* [[ADD_PTR]], i64 [[IDX_EXT]]
; CHECK-NEXT:    [[TMP6:%.*]] = extractelement <4 x i64> [[TMP4]], i32 0
; CHECK-NEXT:    [[AND:%.*]] = and i64 [[TMP6]], 5
; CHECK-NEXT:    [[ARRAYIDX13:%.*]] = getelementptr inbounds float, float* [[ADD_PTR11]], i64 [[AND]]
; CHECK-NEXT:    [[TMP7:%.*]] = load float, float* [[ARRAYIDX13]], align 4
; CHECK-NEXT:    [[TMP8:%.*]] = load float, float* [[P4]], align 4
; CHECK-NEXT:    [[ADD15:%.*]] = fadd float [[TMP7]], [[TMP8]]
; CHECK-NEXT:    store float [[ADD15]], float* [[P4]], align 4
; CHECK-NEXT:    ret void
;
entry:
  store i64 5, i64* %p3, align 8
  %idx.ext = sext i32 %p2 to i64
  %add.ptr = getelementptr inbounds float, float* %p1, i64 %idx.ext
  %arrayidx1 = getelementptr inbounds float, float* %add.ptr, i64 5
  %0 = load float, float* %arrayidx1, align 4
  %arrayidx2 = getelementptr inbounds float, float* %p4, i64 3
  %1 = load float, float* %arrayidx2, align 4
  %add = fadd float %0, %1
  store float %add, float* %arrayidx2, align 4
  %2 = load i64, i64* %p3, align 8
  %shr = lshr i64 %2, 5
  store i64 %shr, i64* %p3, align 8
  %arrayidx4 = getelementptr inbounds i64, i64* %p3, i64 1
  %3 = load i64, i64* %arrayidx4, align 8
  %shr5 = lshr i64 %3, 5
  store i64 %shr5, i64* %arrayidx4, align 8
  %arrayidx6 = getelementptr inbounds i64, i64* %p3, i64 2
  %4 = load i64, i64* %arrayidx6, align 8
  %shr7 = lshr i64 %4, 5
  store i64 %shr7, i64* %arrayidx6, align 8
  %arrayidx8 = getelementptr inbounds i64, i64* %p3, i64 3
  %5 = load i64, i64* %arrayidx8, align 8
  %shr9 = lshr i64 %5, 5
  store i64 %shr9, i64* %arrayidx8, align 8
  %add.ptr11 = getelementptr inbounds float, float* %add.ptr, i64 %idx.ext
  %and = and i64 %shr, 5
  %arrayidx13 = getelementptr inbounds float, float* %add.ptr11, i64 %and
  %6 = load float, float* %arrayidx13, align 4
  %7 = load float, float* %p4, align 4
  %add15 = fadd float %6, %7
  store float %add15, float* %p4, align 4
  ret void
}

define void @store_reverse(i64* %p3) {
; CHECK-LABEL: @store_reverse(
; CHECK-NEXT:  entry:
; CHECK-NEXT:    [[TMP0:%.*]] = load i64, i64* [[P3:%.*]], align 8
; CHECK-NEXT:    [[ARRAYIDX1:%.*]] = getelementptr inbounds i64, i64* [[P3]], i64 8
; CHECK-NEXT:    [[TMP1:%.*]] = load i64, i64* [[ARRAYIDX1]], align 8
; CHECK-NEXT:    [[SHL:%.*]] = shl i64 [[TMP0]], [[TMP1]]
; CHECK-NEXT:    [[ARRAYIDX2:%.*]] = getelementptr inbounds i64, i64* [[P3]], i64 7
; CHECK-NEXT:    store i64 [[SHL]], i64* [[ARRAYIDX2]], align 8
; CHECK-NEXT:    [[ARRAYIDX3:%.*]] = getelementptr inbounds i64, i64* [[P3]], i64 1
; CHECK-NEXT:    [[TMP2:%.*]] = load i64, i64* [[ARRAYIDX3]], align 8
; CHECK-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds i64, i64* [[P3]], i64 9
; CHECK-NEXT:    [[TMP3:%.*]] = load i64, i64* [[ARRAYIDX4]], align 8
; CHECK-NEXT:    [[SHL5:%.*]] = shl i64 [[TMP2]], [[TMP3]]
; CHECK-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds i64, i64* [[P3]], i64 6
; CHECK-NEXT:    store i64 [[SHL5]], i64* [[ARRAYIDX6]], align 8
; CHECK-NEXT:    [[ARRAYIDX7:%.*]] = getelementptr inbounds i64, i64* [[P3]], i64 2
; CHECK-NEXT:    [[TMP4:%.*]] = load i64, i64* [[ARRAYIDX7]], align 8
; CHECK-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds i64, i64* [[P3]], i64 10
; CHECK-NEXT:    [[TMP5:%.*]] = load i64, i64* [[ARRAYIDX8]], align 8
; CHECK-NEXT:    [[SHL9:%.*]] = shl i64 [[TMP4]], [[TMP5]]
; CHECK-NEXT:    [[ARRAYIDX10:%.*]] = getelementptr inbounds i64, i64* [[P3]], i64 5
; CHECK-NEXT:    store i64 [[SHL9]], i64* [[ARRAYIDX10]], align 8
; CHECK-NEXT:    [[ARRAYIDX11:%.*]] = getelementptr inbounds i64, i64* [[P3]], i64 3
; CHECK-NEXT:    [[TMP6:%.*]] = load i64, i64* [[ARRAYIDX11]], align 8
; CHECK-NEXT:    [[ARRAYIDX12:%.*]] = getelementptr inbounds i64, i64* [[P3]], i64 11
; CHECK-NEXT:    [[TMP7:%.*]] = load i64, i64* [[ARRAYIDX12]], align 8
; CHECK-NEXT:    [[SHL13:%.*]] = shl i64 [[TMP6]], [[TMP7]]
; CHECK-NEXT:    [[ARRAYIDX14:%.*]] = getelementptr inbounds i64, i64* [[P3]], i64 4
; CHECK-NEXT:    store i64 [[SHL13]], i64* [[ARRAYIDX14]], align 8
; CHECK-NEXT:    ret void
;
entry:
  %0 = load i64, i64* %p3, align 8
  %arrayidx1 = getelementptr inbounds i64, i64* %p3, i64 8
  %1 = load i64, i64* %arrayidx1, align 8
  %shl = shl i64 %0, %1
  %arrayidx2 = getelementptr inbounds i64, i64* %p3, i64 7
  store i64 %shl, i64* %arrayidx2, align 8
  %arrayidx3 = getelementptr inbounds i64, i64* %p3, i64 1
  %2 = load i64, i64* %arrayidx3, align 8<commit_msg>[SLP] Fix the test for the reversed stores, NFC.<commit_after>; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -slp-vectorizer -slp-vectorize-hor -slp-vectorize-hor-store -S < %s -mtriple=x86_64-apple-macosx -mcpu=corei7-avx -mattr=+avx2 | FileCheck %s

;void Distance(float *p1, int p2, unsigned long p3[], float p4[]) {
;  long a = p3[0] = 5;
;  p1 += p2;
;  p4[3] += p1[a];
;  p3[0] >>= 5;
;  p3[1] >>= 5;
;  p3[2] >>= 5;
;  p3[3] >>= 5;
;  p1 += p2;
;  p4[0] += p1[p3[0] & a];
;}

define void @_Z8DistanceIlLi5EEvPfiPmS0_(float* %p1, i32 %p2, i64* %p3, float* %p4) {
; CHECK-LABEL: @_Z8DistanceIlLi5EEvPfiPmS0_(
; CHECK-NEXT:  entry:
; CHECK-NEXT:    store i64 5, i64* [[P3:%.*]], align 8
; CHECK-NEXT:    [[IDX_EXT:%.*]] = sext i32 [[P2:%.*]] to i64
; CHECK-NEXT:    [[ADD_PTR:%.*]] = getelementptr inbounds float, float* [[P1:%.*]], i64 [[IDX_EXT]]
; CHECK-NEXT:    [[ARRAYIDX1:%.*]] = getelementptr inbounds float, float* [[ADD_PTR]], i64 5
; CHECK-NEXT:    [[TMP0:%.*]] = load float, float* [[ARRAYIDX1]], align 4
; CHECK-NEXT:    [[ARRAYIDX2:%.*]] = getelementptr inbounds float, float* [[P4:%.*]], i64 3
; CHECK-NEXT:    [[TMP1:%.*]] = load float, float* [[ARRAYIDX2]], align 4
; CHECK-NEXT:    [[ADD:%.*]] = fadd float [[TMP0]], [[TMP1]]
; CHECK-NEXT:    store float [[ADD]], float* [[ARRAYIDX2]], align 4
; CHECK-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds i64, i64* [[P3]], i64 1
; CHECK-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds i64, i64* [[P3]], i64 2
; CHECK-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds i64, i64* [[P3]], i64 3
; CHECK-NEXT:    [[TMP2:%.*]] = bitcast i64* [[P3]] to <4 x i64>*
; CHECK-NEXT:    [[TMP3:%.*]] = load <4 x i64>, <4 x i64>* [[TMP2]], align 8
; CHECK-NEXT:    [[TMP4:%.*]] = lshr <4 x i64> [[TMP3]], <i64 5, i64 5, i64 5, i64 5>
; CHECK-NEXT:    [[TMP5:%.*]] = bitcast i64* [[P3]] to <4 x i64>*
; CHECK-NEXT:    store <4 x i64> [[TMP4]], <4 x i64>* [[TMP5]], align 8
; CHECK-NEXT:    [[ADD_PTR11:%.*]] = getelementptr inbounds float, float* [[ADD_PTR]], i64 [[IDX_EXT]]
; CHECK-NEXT:    [[TMP6:%.*]] = extractelement <4 x i64> [[TMP4]], i32 0
; CHECK-NEXT:    [[AND:%.*]] = and i64 [[TMP6]], 5
; CHECK-NEXT:    [[ARRAYIDX13:%.*]] = getelementptr inbounds float, float* [[ADD_PTR11]], i64 [[AND]]
; CHECK-NEXT:    [[TMP7:%.*]] = load float, float* [[ARRAYIDX13]], align 4
; CHECK-NEXT:    [[TMP8:%.*]] = load float, float* [[P4]], align 4
; CHECK-NEXT:    [[ADD15:%.*]] = fadd float [[TMP7]], [[TMP8]]
; CHECK-NEXT:    store float [[ADD15]], float* [[P4]], align 4
; CHECK-NEXT:    ret void
;
entry:
  store i64 5, i64* %p3, align 8
  %idx.ext = sext i32 %p2 to i64
  %add.ptr = getelementptr inbounds float, float* %p1, i64 %idx.ext
  %arrayidx1 = getelementptr inbounds float, float* %add.ptr, i64 5
  %0 = load float, float* %arrayidx1, align 4
  %arrayidx2 = getelementptr inbounds float, float* %p4, i64 3
  %1 = load float, float* %arrayidx2, align 4
  %add = fadd float %0, %1
  store float %add, float* %arrayidx2, align 4
  %2 = load i64, i64* %p3, align 8
  %shr = lshr i64 %2, 5
  store i64 %shr, i64* %p3, align 8
  %arrayidx4 = getelementptr inbounds i64, i64* %p3, i64 1
  %3 = load i64, i64* %arrayidx4, align 8
  %shr5 = lshr i64 %3, 5
  store i64 %shr5, i64* %arrayidx4, align 8
  %arrayidx6 = getelementptr inbounds i64, i64* %p3, i64 2
  %4 = load i64, i64* %arrayidx6, align 8
  %shr7 = lshr i64 %4, 5
  store i64 %shr7, i64* %arrayidx6, align 8
  %arrayidx8 = getelementptr inbounds i64, i64* %p3, i64 3
  %5 = load i64, i64* %arrayidx8, align 8
  %shr9 = lshr i64 %5, 5
  store i64 %shr9, i64* %arrayidx8, align 8
  %add.ptr11 = getelementptr inbounds float, float* %add.ptr, i64 %idx.ext
  %and = and i64 %shr, 5
  %arrayidx13 = getelementptr inbounds float, float* %add.ptr11, i64 %and
  %6 = load float, float* %arrayidx13, align 4
  %7 = load float, float* %p4, align 4
  %add15 = fadd float %6, %7
  store float %add15, float* %p4, align 4
  ret void
}

define void @store_reverse(i64* %p3) {
; CHECK-LABEL: @store_reverse(
; CHECK-NEXT:  entry:
; CHECK-NEXT:    [[ARRAYIDX1:%.*]] = getelementptr inbounds i64, i64* [[P3:%.*]], i64 8
; CHECK-NEXT:    [[ARRAYIDX2:%.*]] = getelementptr inbounds i64, i64* [[P3]], i64 7
; CHECK-NEXT:    [[ARRAYIDX3:%.*]] = getelementptr inbounds i64, i64* [[P3]], i64 1
; CHECK-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds i64, i64* [[P3]], i64 9
; CHECK-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds i64, i64* [[P3]], i64 6
; CHECK-NEXT:    [[ARRAYIDX7:%.*]] = getelementptr inbounds i64, i64* [[P3]], i64 2
; CHECK-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds i64, i64* [[P3]], i64 10
; CHECK-NEXT:    [[ARRAYIDX10:%.*]] = getelementptr inbounds i64, i64* [[P3]], i64 5
; CHECK-NEXT:    [[ARRAYIDX11:%.*]] = getelementptr inbounds i64, i64* [[P3]], i64 3
; CHECK-NEXT:    [[TMP0:%.*]] = bitcast i64* [[P3]] to <4 x i64>*
; CHECK-NEXT:    [[TMP1:%.*]] = load <4 x i64>, <4 x i64>* [[TMP0]], align 8
; CHECK-NEXT:    [[TMP2:%.*]] = shufflevector <4 x i64> [[TMP1]], <4 x i64> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
; CHECK-NEXT:    [[ARRAYIDX12:%.*]] = getelementptr inbounds i64, i64* [[P3]], i64 11
; CHECK-NEXT:    [[TMP3:%.*]] = bitcast i64* [[ARRAYIDX1]] to <4 x i64>*
; CHECK-NEXT:    [[TMP4:%.*]] = load <4 x i64>, <4 x i64>* [[TMP3]], align 8
; CHECK-NEXT:    [[TMP5:%.*]] = shufflevector <4 x i64> [[TMP4]], <4 x i64> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
; CHECK-NEXT:    [[TMP6:%.*]] = shl <4 x i64> [[TMP2]], [[TMP5]]
; CHECK-NEXT:    [[ARRAYIDX14:%.*]] = getelementptr inbounds i64, i64* [[P3]], i64 4
; CHECK-NEXT:    [[TMP7:%.*]] = bitcast i64* [[ARRAYIDX14]] to <4 x i64>*
; CHECK-NEXT:    store <4 x i64> [[TMP6]], <4 x i64>* [[TMP7]], align 8
; CHECK-NEXT:    ret void
;
entry:
  %0 = load i64, i64* %p3, align 8
  %arrayidx1 = getelementptr inbounds i64, i64* %p3, i64 8
  %1 = load i64, i64* %arrayidx1, align 8
  %shl = shl i64 %0, %1
  %arrayidx2 = getelementptr inbounds i64, i64* %p3, i64 7
  store i64 %shl, i64* %arrayidx2, align 8
  %arrayidx3 = getelementptr inbounds i64, i64* %p3, i64 1
  %2 = load i64, i64* %arrayidx3, align 8
{'fraction_non_alphanumeric': 0.21198632859073205, 'fraction_numerical': 0.10030999125665686, 'mean_word_length': 3.765909090909091, 'pattern_counts': {'":': 0, '<': 41, '<?xml version=': 0, '>': 55, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
{'dir': 'git-commits-cleaned', 'id': '5826951', 'n_tokens_mistral': 5691, 'n_tokens_neox': 5386, 'n_words': 1578}