<commit_before>/**
 * @file arasan.c
 * @brief Arasan ethernet driver
 * @author <NAME> <<EMAIL>>
 * @version 0.1
 * @date 27.12.2016
 */

#include <errno.h>
#include <sys/mman.h>

#include <util/log.h>

#include <drivers/common/memory.h>
#include <hal/reg.h>
#include <kernel/printk.h>
#include <kernel/irq.h>
#include <mem/misc/pool.h>

#include <net/inetdevice.h>
#include <net/l0/net_entry.h>
#include <net/l2/ethernet.h>
#include <net/netdevice.h>
#include <net/skbuff.h>
#include <net/util/show_packet.h>
#include <util/log.h>

#include <embox/unit.h>
#include <framework/mod/options.h>

/* Internal I/O space mapping */
#define BASE_ADDR  OPTION_GET(NUMBER, base_addr)
#define ARASAN_IRQ OPTION_GET(NUMBER, irq_num)

#define MAC_ADDRESS1_HIGH  (BASE_ADDR + 0x0120)
#define MAC_ADDRESS1_MED   (BASE_ADDR + 0x0124)
#define MAC_ADDRESS1_LOW   (BASE_ADDR + 0x0128)

static int arasan_xmit(struct net_device *dev, struct sk_buff *skb) {
	return 0;
}

static int arasan_open(struct net_device *dev) {
	return 0;
}

static int arasan_set_macaddr(struct net_device *dev, const void *addr) {
	uint32_t mac_hi, mac_mid, mac_lo;
	const uint8_t *_macaddr = addr;

	log_debug("addr = %x:%x:%x:%x:%x:%x",
		_macaddr[0], _macaddr[1], _macaddr[2],
		_macaddr[3], _macaddr[4], _macaddr[5]);

	mac_lo  = (_macaddr[5] << 8) |
	          (_macaddr[4] << 0);

	mac_mid = (_macaddr[3] << 8) |
	          (_macaddr[2] << 0);

	mac_hi  = (_macaddr[1] << 8) |
	          (_macaddr[0] << 0);

	REG32_STORE(MAC_ADDRESS1_HIGH, mac_hi);
	REG32_STORE(MAC_ADDRESS1_MED, mac_mid);
	REG32_STORE(MAC_ADDRESS1_LOW, mac_lo);

	return 0;
}

static const struct net_driver arasan_drv_ops = {
	.xmit = arasan_xmit,
	.start = arasan_open,
	.set_macaddr = arasan_set_macaddr
};

static irq_return_t arasan_int_handler(unsigned int irq_num, void *dev_id) {

	return 0;
}

EMBOX_UNIT_INIT(arasan_init);
static int arasan_init(void) {
        struct net_device *nic;

        if (NULL == (nic = etherdev_alloc(0))) {
                return -ENOMEM;
        }

	irq_attach(ARASAN_IRQ, arasan_int_handler, 0, nic, "arasan");

        nic->drv_ops = &arasan_drv_ops;

	return inetdev_register_dev(nic);
}

static struct periph_memory_desc arasan_mem = {
	.start = BASE_ADDR,
	.len   = 0x200
};

PERIPH_MEMORY_DEFINE(arasan_mem);
<commit_msg>arasan: Add more register offsets<commit_after>/**
 * @file arasan.c
 * @brief Arasan ethernet driver
 * @author <NAME> <<EMAIL>>
 * @version 0.1
 * @date 27.12.2016
 */

#include <errno.h>
#include <sys/mman.h>

#include <util/log.h>

#include <drivers/common/memory.h>
#include <hal/reg.h>
#include <kernel/printk.h>
#include <kernel/irq.h>
#include <mem/misc/pool.h>

#include <net/inetdevice.h>
#include <net/l0/net_entry.h>
#include <net/l2/ethernet.h>
#include <net/netdevice.h>
#include <net/skbuff.h>
#include <net/util/show_packet.h>
#include <util/log.h>

#include <embox/unit.h>
#include <framework/mod/options.h>

/* Internal I/O space mapping */
#define BASE_ADDR  OPTION_GET(NUMBER, base_addr)
#define ARASAN_IRQ OPTION_GET(NUMBER, irq_num)

#define DMA_CONFIGURATION                         (BASE_ADDR + 0x0000)
#define DMA_CONTROL                               (BASE_ADDR + 0x0004)
#define DMA_STATUS_AND_IRQ                        (BASE_ADDR + 0x0008)
#define DMA_INTERRUPT_ENABLE                      (BASE_ADDR + 0x000C)
#define DMA_TRANSMIT_AUTO_POLL_COUNTER            (BASE_ADDR + 0x0010)
#define DMA_TRANSMIT_POLL_DEMAND                  (BASE_ADDR + 0x0014)
#define DMA_RECEIVE_POLL_DEMAND                   (BASE_ADDR + 0x0018)
#define DMA_TRANSMIT_BASE_ADDRESS                 (BASE_ADDR + 0x001C)
#define DMA_RECEIVE_BASE_ADDRESS                  (BASE_ADDR + 0x0020)
#define DMA_MISSED_FRAME_COUNTER                  (BASE_ADDR + 0x0024)
#define DMA_STOP_FLUSH_COUNTER                    (BASE_ADDR + 0x0028)
#define DMA_RECEIVE_INTERRUPT_MITIGATION          (BASE_ADDR + 0x002C)
#define DMA_CURRENT_TRANSMIT_DESCRIPTOR_POINTER   (BASE_ADDR + 0x0030)
#define DMA_CURRENT_TRANSMIT_BUFFER_POINTER       (BASE_ADDR + 0x0034)
#define DMA_CURRENT_RECEIVE_DESCRIPTOR_POINTER    (BASE_ADDR + 0x0038)
#define DMA_CURRENT_RECEIVE_BUFFER_POINTER        (BASE_ADDR + 0x003C)

#define MAC_GLOBAL_CONTROL                        (BASE_ADDR + 0x0100)
#define MAC_TRANSMIT_CONTROL                      (BASE_ADDR + 0x0104)
#define MAC_RECEIVE_CONTROL                       (BASE_ADDR + 0x0108)
#define MAC_MAXIMUM_FRAME_SIZE                    (BASE_ADDR + 0x010C)
#define MAC_TRANSMIT_JABBER_SIZE                  (BASE_ADDR + 0x0110)
#define MAC_RECEIVE_JABBER_SIZE                   (BASE_ADDR + 0x0114)
#define MAC_ADDRESS_CONTROL                       (BASE_ADDR + 0x0118)
#define MAC_MDIO_CLOCK_DIVISION_CONTROL           (BASE_ADDR + 0x011C)
#define MAC_ADDRESS1_HIGH                         (BASE_ADDR + 0x0120)
#define MAC_ADDRESS1_MED                          (BASE_ADDR + 0x0124)
#define MAC_ADDRESS1_LOW                          (BASE_ADDR + 0x0128)
#define MAC_ADDRESS2_HIGH                         (BASE_ADDR + 0x012C)
#define MAC_ADDRESS2_MED                          (BASE_ADDR + 0x0130)
#define MAC_ADDRESS2_LOW                          (BASE_ADDR + 0x0134)
#define MAC_ADDRESS3_HIGH                         (BASE_ADDR + 0x0138)
#define MAC_ADDRESS3_MED                          (BASE_ADDR + 0x013C)
#define MAC_ADDRESS3_LOW                          (BASE_ADDR + 0x0140)
#define MAC_ADDRESS4_HIGH                         (BASE_ADDR + 0x0144)
#define MAC_ADDRESS4_MED                          (BASE_ADDR + 0x0148)
#define MAC_ADDRESS4_LOW                          (BASE_ADDR + 0x014C)
#define MAC_HASH_TABLE1                           (BASE_ADDR + 0x0150)
#define MAC_HASH_TABLE2                           (BASE_ADDR + 0x0154)
#define MAC_HASH_TABLE3                           (BASE_ADDR + 0x0158)
#define MAC_HASH_TABLE4                           (BASE_ADDR + 0x015C)

#define MAC_MDIO_CONTROL                          (BASE_ADDR + 0x01A0)
#define MAC_MDIO_DATA                             (BASE_ADDR + 0x01A4)
#define MAC_RX_STATCTR_CONTROL                    (BASE_ADDR + 0x01A8)
#define MAC_RX_STATCTR_DATA_HIGH                  (BASE_ADDR + 0x01AC)
#define MAC_RX_STATCTR_DATA_LOW                   (BASE_ADDR + 0x01B0)
#define MAC_TX_STATCTR_CONTROL                    (BASE_ADDR + 0x01B4)
#define MAC_TX_STATCTR_DATA_HIGH                  (BASE_ADDR + 0x01B8)
#define MAC_TX_STATCTR_DATA_LOW                   (BASE_ADDR + 0x01BC)
#define MAC_TRANSMIT_FIFO_ALMOST_FULL             (BASE_ADDR + 0x01C0)
#define MAC_TRANSMIT_PACKET_START_THRESHOLD       (BASE_ADDR + 0x01C4)
#define MAC_RECEIVE_PACKET_START_THRESHOLD        (BASE_ADDR + 0x01C8)
#define MAC_TRANSMIT_FIFO_ALMOST_EMPTY_THRESHOLD  (BASE_ADDR + 0x01CC)
#define MAC_INTERRUPT                             (BASE_ADDR + 0x01E0)
#define MAC_INTERRUPT_ENABLE                      (BASE_ADDR + 0x01E4)
#define MAC_VLAN_TPID1                            (BASE_ADDR + 0x01E8)
#define MAC_VLAN_TPID2                            (BASE_ADDR + 0x01EC)
#define MAC_VLAN_TPID3                            (BASE_ADDR + 0x01F0)

static int arasan_xmit(struct net_device *dev, struct sk_buff *skb) {
	return 0;
}

static int arasan_open(struct net_device *dev) {
	return 0;
}

static int arasan_set_macaddr(struct net_device *dev, const void *addr) {
	uint32_t mac_hi, mac_mid, mac_lo;
	const uint8_t *_macaddr = addr;

	log_debug("addr = %x:%x:%x:%x:%x:%x",
		_macaddr[0], _macaddr[1], _macaddr[2],
		_macaddr[3], _macaddr[4], _macaddr[5]);

	mac_lo  = (_macaddr[5] << 8) |
	          (_macaddr[4] << 0);

	mac_mid = (_macaddr[3] << 8) |
	          (_macaddr[2] << 0);

	mac_hi  = (_macaddr[1] << 8) |
	          (_macaddr[0] << 0);

	REG32_STORE(MAC_ADDRESS1_HIGH, mac_hi);
	REG32_STORE(MAC_ADDRESS1_MED, mac_mid);
	REG32_STORE(MAC_ADDRESS1_LOW, mac_lo);

	return 0;
}

static const struct net_driver arasan_drv_ops = {
	.xmit = arasan_xmit,
	.start = arasan_open,
	.set_macaddr = arasan_set_macaddr
};

static irq_return_t arasan_int_handler(unsigned int irq_num, void *dev_id) {

	return 0;
}

EMBOX_UNIT_INIT(arasan_init);
static int arasan_init(void) {
        struct net_device *nic;

        if (NULL == (nic = etherdev_alloc(0))) {
                return -ENOMEM;
        }

	irq_attach(ARASAN_IRQ, arasan_int_handler, 0, nic, "arasan");

        nic->drv_ops = &arasan_drv_ops;

	return inetdev_register_dev(nic);
}

static struct periph_memory_desc arasan_mem = {
	.start = BASE_ADDR,
	.len   = 0x200
};

PERIPH_MEMORY_DEFINE(arasan_mem);

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