<commit_before>// RUN: %clang_cc1 -triple x86_64-unknown-unknown -verify -emit-llvm -o - %s \
// RUN:   | FileCheck -check-prefix=CHECK-X86-64 %s
// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -verify -emit-llvm -o - %s \
// RUN:   | FileCheck -check-prefix=CHECK-PPC64 %s
//
// Tests for bitfield access patterns in C++ with special attention to
// conformance to C++11 memory model requirements.

namespace N1 {
  // Ensure that neither loads nor stores to bitfields are not widened into
  // other memory locations. (PR13691)
  //
  // NOTE: We could potentially widen loads based on their alignment if we are
  // comfortable requiring that subsequent memory locations within the
  // alignment-widened load are not volatile.
  struct S {
    char a;<commit_msg>Add a test case that I've been using to clarify the bitfield layout for both LE and BE targets.<commit_after>// RUN: %clang_cc1 -triple x86_64-unknown-unknown -verify -emit-llvm -o - %s \
// RUN:   | FileCheck -check-prefix=CHECK-X86-64 %s
// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -verify -emit-llvm -o - %s \
// RUN:   | FileCheck -check-prefix=CHECK-PPC64 %s
//
// Tests for bitfield access patterns in C++ with special attention to
// conformance to C++11 memory model requirements.

namespace N0 {
  // Test basic bitfield layout access across interesting byte and word
  // boundaries on both little endian and big endian platforms.
  struct __attribute__((packed)) S {
    unsigned b00 : 14;
    unsigned b01 : 2;
    unsigned b20 : 6;
    unsigned b21 : 2;
    unsigned b30 : 30;
    unsigned b31 : 2;
    unsigned b70 : 6;
    unsigned b71 : 2;
  };
  unsigned read00(S* s) {
    // CHECK-X86-64: define i32 @_ZN2N06read00
    // CHECK-X86-64:   %[[ptr:.*]]   = bitcast %{{.*}}* %{{.*}} to i64*
    // CHECK-X86-64:   %[[val:.*]]   = load i64* %[[ptr]]
    // CHECK-X86-64:   %[[and:.*]]   = and i64 %[[val]], 16383
    // CHECK-X86-64:   %[[trunc:.*]] = trunc i64 %[[and]] to i32
    // CHECK-X86-64:                   ret i32 %[[trunc]]
    // CHECK-PPC64: define zeroext i32 @_ZN2N06read00
    // CHECK-PPC64:   %[[ptr:.*]]   = bitcast %{{.*}}* %{{.*}} to i64*
    // CHECK-PPC64:   %[[val:.*]]   = load i64* %[[ptr]]
    // CHECK-PPC64:   %[[shr:.*]]   = lshr i64 %[[val]], 50
    // CHECK-PPC64:   %[[trunc:.*]] = trunc i64 %[[shr]] to i32
    // CHECK-PPC64:                   ret i32 %[[trunc]]
    return s->b00;
  }
  unsigned read01(S* s) {
    // CHECK-X86-64: define i32 @_ZN2N06read01
    // CHECK-X86-64:   %[[ptr:.*]]   = bitcast %{{.*}}* %{{.*}} to i64*
    // CHECK-X86-64:   %[[val:.*]]   = load i64* %[[ptr]]
    // CHECK-X86-64:   %[[shr:.*]]   = lshr i64 %[[val]], 14
    // CHECK-X86-64:   %[[and:.*]]   = and i64 %[[shr]], 3
    // CHECK-X86-64:   %[[trunc:.*]] = trunc i64 %[[and]] to i32
    // CHECK-X86-64:                   ret i32 %[[trunc]]
    // CHECK-PPC64: define zeroext i32 @_ZN2N06read01
    // CHECK-PPC64:   %[[ptr:.*]]   = bitcast %{{.*}}* %{{.*}} to i64*
    // CHECK-PPC64:   %[[val:.*]]   = load i64* %[[ptr]]
    // CHECK-PPC64:   %[[shr:.*]]   = lshr i64 %[[val]], 48
    // CHECK-PPC64:   %[[and:.*]]   = and i64 %[[shr]], 3
    // CHECK-PPC64:   %[[trunc:.*]] = trunc i64 %[[and]] to i32
    // CHECK-PPC64:                   ret i32 %[[trunc]]
    return s->b01;
  }
  unsigned read20(S* s) {
    // CHECK-X86-64: define i32 @_ZN2N06read20
    // CHECK-X86-64:   %[[ptr:.*]]   = bitcast %{{.*}}* %{{.*}} to i64*
    // CHECK-X86-64:   %[[val:.*]]   = load i64* %[[ptr]]
    // CHECK-X86-64:   %[[shr:.*]]   = lshr i64 %[[val]], 16
    // CHECK-X86-64:   %[[and:.*]]   = and i64 %[[shr]], 63
    // CHECK-X86-64:   %[[trunc:.*]] = trunc i64 %[[and]] to i32
    // CHECK-X86-64:                   ret i32 %[[trunc]]
    // CHECK-PPC64: define zeroext i32 @_ZN2N06read20
    // CHECK-PPC64:   %[[ptr:.*]]   = bitcast %{{.*}}* %{{.*}} to i64*
    // CHECK-PPC64:   %[[val:.*]]   = load i64* %[[ptr]]
    // CHECK-PPC64:   %[[shr:.*]]   = lshr i64 %[[val]], 42
    // CHECK-PPC64:   %[[and:.*]]   = and i64 %[[shr]], 63
    // CHECK-PPC64:   %[[trunc:.*]] = trunc i64 %[[and]] to i32
    // CHECK-PPC64:                   ret i32 %[[trunc]]
    return s->b20;
  }
  unsigned read21(S* s) {
    // CHECK-X86-64: define i32 @_ZN2N06read21
    // CHECK-X86-64:   %[[ptr:.*]]   = bitcast %{{.*}}* %{{.*}} to i64*
    // CHECK-X86-64:   %[[val:.*]]   = load i64* %[[ptr]]
    // CHECK-X86-64:   %[[shr:.*]]   = lshr i64 %[[val]], 22
    // CHECK-X86-64:   %[[and:.*]]   = and i64 %[[shr]], 3
    // CHECK-X86-64:   %[[trunc:.*]] = trunc i64 %[[and]] to i32
    // CHECK-X86-64:                   ret i32 %[[trunc]]
    // CHECK-PPC64: define zeroext i32 @_ZN2N06read21
    // CHECK-PPC64:   %[[ptr:.*]]   = bitcast %{{.*}}* %{{.*}} to i64*
    // CHECK-PPC64:   %[[val:.*]]   = load i64* %[[ptr]]
    // CHECK-PPC64:   %[[shr:.*]]   = lshr i64 %[[val]], 40
    // CHECK-PPC64:   %[[and:.*]]   = and i64 %[[shr]], 3
    // CHECK-PPC64:   %[[trunc:.*]] = trunc i64 %[[and]] to i32
    // CHECK-PPC64:                   ret i32 %[[trunc]]
    return s->b21;
  }
  unsigned read30(S* s) {
    // CHECK-X86-64: define i32 @_ZN2N06read30
    // CHECK-X86-64:   %[[ptr:.*]]   = bitcast %{{.*}}* %{{.*}} to i64*
    // CHECK-X86-64:   %[[val:.*]]   = load i64* %[[ptr]]
    // CHECK-X86-64:   %[[shr:.*]]   = lshr i64 %[[val]], 24
    // CHECK-X86-64:   %[[and:.*]]   = and i64 %[[shr]], 1073741823
    // CHECK-X86-64:   %[[trunc:.*]] = trunc i64 %[[and]] to i32
    // CHECK-X86-64:                   ret i32 %[[trunc]]
    // CHECK-PPC64: define zeroext i32 @_ZN2N06read30
    // CHECK-PPC64:   %[[ptr:.*]]   = bitcast %{{.*}}* %{{.*}} to i64*
    // CHECK-PPC64:   %[[val:.*]]   = load i64* %[[ptr]]
    // CHECK-PPC64:   %[[shr:.*]]   = lshr i64 %[[val]], 10
    // CHECK-PPC64:   %[[and:.*]]   = and i64 %[[shr]], 1073741823
    // CHECK-PPC64:   %[[trunc:.*]] = trunc i64 %[[and]] to i32
    // CHECK-PPC64:                   ret i32 %[[trunc]]
    return s->b30;
  }
  unsigned read31(S* s) {
    // CHECK-X86-64: define i32 @_ZN2N06read31
    // CHECK-X86-64:   %[[ptr:.*]]   = bitcast %{{.*}}* %{{.*}} to i64*
    // CHECK-X86-64:   %[[val:.*]]   = load i64* %[[ptr]]
    // CHECK-X86-64:   %[[shr:.*]]   = lshr i64 %[[val]], 54
    // CHECK-X86-64:   %[[and:.*]]   = and i64 %[[shr]], 3
    // CHECK-X86-64:   %[[trunc:.*]] = trunc i64 %[[and]] to i32
    // CHECK-X86-64:                   ret i32 %[[trunc]]
    // CHECK-PPC64: define zeroext i32 @_ZN2N06read31
    // CHECK-PPC64:   %[[ptr:.*]]   = bitcast %{{.*}}* %{{.*}} to i64*
    // CHECK-PPC64:   %[[val:.*]]   = load i64* %[[ptr]]
    // CHECK-PPC64:   %[[shr:.*]]   = lshr i64 %[[val]], 8
    // CHECK-PPC64:   %[[and:.*]]   = and i64 %[[shr]], 3
    // CHECK-PPC64:   %[[trunc:.*]] = trunc i64 %[[and]] to i32
    // CHECK-PPC64:                   ret i32 %[[trunc]]
    return s->b31;
  }
  unsigned read70(S* s) {
    // CHECK-X86-64: define i32 @_ZN2N06read70
    // CHECK-X86-64:   %[[ptr:.*]]   = bitcast %{{.*}}* %{{.*}} to i64*
    // CHECK-X86-64:   %[[val:.*]]   = load i64* %[[ptr]]
    // CHECK-X86-64:   %[[shr:.*]]   = lshr i64 %[[val]], 56
    // CHECK-X86-64:   %[[and:.*]]   = and i64 %[[shr]], 63
    // CHECK-X86-64:   %[[trunc:.*]] = trunc i64 %[[and]] to i32
    // CHECK-X86-64:                   ret i32 %[[trunc]]
    // CHECK-PPC64: define zeroext i32 @_ZN2N06read70
    // CHECK-PPC64:   %[[ptr:.*]]   = bitcast %{{.*}}* %{{.*}} to i64*
    // CHECK-PPC64:   %[[val:.*]]   = load i64* %[[ptr]]
    // CHECK-PPC64:   %[[shr:.*]]   = lshr i64 %[[val]], 2
    // CHECK-PPC64:   %[[and:.*]]   = and i64 %[[shr]], 63
    // CHECK-PPC64:   %[[trunc:.*]] = trunc i64 %[[and]] to i32
    // CHECK-PPC64:                   ret i32 %[[trunc]]
    return s->b70;
  }
  unsigned read71(S* s) {
    // CHECK-X86-64: define i32 @_ZN2N06read71
    // CHECK-X86-64:   %[[ptr:.*]]   = bitcast %{{.*}}* %{{.*}} to i64*
    // CHECK-X86-64:   %[[val:.*]]   = load i64* %[[ptr]]
    // CHECK-X86-64:   %[[shr:.*]]   = lshr i64 %[[val]], 62
    // CHECK-X86-64:   %[[trunc:.*]] = trunc i64 %[[shr]] to i32
    // CHECK-X86-64:                   ret i32 %[[trunc]]
    // CHECK-PPC64: define zeroext i32 @_ZN2N06read71
    // CHECK-PPC64:   %[[ptr:.*]]   = bitcast %{{.*}}* %{{.*}} to i64*
    // CHECK-PPC64:   %[[val:.*]]   = load i64* %[[ptr]]
    // CHECK-PPC64:   %[[and:.*]]   = and i64 %[[val]], 3
    // CHECK-PPC64:   %[[trunc:.*]] = trunc i64 %[[and]] to i32
    // CHECK-PPC64:                   ret i32 %[[trunc]]
    return s->b71;
  }
}

namespace N1 {
  // Ensure that neither loads nor stores to bitfields are not widened into
  // other memory locations. (PR13691)
  //
  // NOTE: We could potentially widen loads based on their alignment if we are
  // comfortable requiring that subsequent memory locations within the
  // alignment-widened load are not volatile.
  struct S {
    char a;
{'fraction_non_alphanumeric': 0.23871547271502358, 'fraction_numerical': 0.0921850437907029, 'mean_word_length': 2.0713793103448275, 'pattern_counts': {'":': 0, '<': 3, '<?xml version=': 0, '>': 11, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
{'dir': 'git-commits-cleaned', 'id': '6247634', 'n_tokens_mistral': 4108, 'n_tokens_neox': 3575, 'n_words': 861}