<commit_before>--------------------------------------------------------------------------
-- Copyright (c) 2007-2010, ETH Zurich.
-- All rights reserved.
--
-- This file is distributed under the terms in the attached LICENSE file.
-- If you do not find this file, copies can be found by writing to:
-- ETH Zurich D-INFK, Haldeneggsteig 4, CH-8092 Zurich. Attn: Systems Group.
--
-- Architectural definitions for Barrelfish on ARMv5 ISA.
--
-- The build target is the integratorcp board on QEMU with the default
-- ARM926EJ-S cpu.
--
--------------------------------------------------------------------------

module ARMv8 where

import HakeTypes
import Path
import qualified Config
import qualified ArchDefaults

-------------------------------------------------------------------------
--
-- Architecture specific definitions for ARM
--
-------------------------------------------------------------------------

arch = "armv8"
archFamily = "aarch64"

compiler = "aarch64-apm-linux-gnu-gcc"
objcopy  = "aarch64-apm-linux-gnu-objcopy"
objdump  = "aarch64-apm-linux-gnu-objdump"
ar       = "aarch64-apm-linux-gnu-ar"
ranlib   = "aarch64-apm-linux-gnu-ranlib"
cxxcompiler = "aarch64-apm-linux-gnu-g++"

ourCommonFlags = [ Str "-fno-unwind-tables",
                   Str "-Wno-packed-bitfield-compat",
                   Str "-fno-stack-protector",
                   Str "-mcpu=cortex-a57",
                   Str "-march=armv8-a",
                   Str "-mabi=lp64",
                   Str "-DPIC_REGISTER=X10",
                   Str "-fPIE",
                   Str "-ffixed-r9",
                   Str "-DTHREAD_REGISTER=X9",
                   Str "-D__ARM_CORTEX__",<commit_msg>Seperated the tool prefix from the tool name for ARMv8.<commit_after>--------------------------------------------------------------------------
-- Copyright (c) 2007-2010, ETH Zurich.
-- All rights reserved.
--
-- This file is distributed under the terms in the attached LICENSE file.
-- If you do not find this file, copies can be found by writing to:
-- ETH Zurich D-INFK, Haldeneggsteig 4, CH-8092 Zurich. Attn: Systems Group.
--
-- Architectural definitions for Barrelfish on ARMv5 ISA.
--
-- The build target is the integratorcp board on QEMU with the default
-- ARM926EJ-S cpu.
--
--------------------------------------------------------------------------

module ARMv8 where

import HakeTypes
import Path
import qualified Config
import qualified ArchDefaults

-------------------------------------------------------------------------
--
-- Architecture specific definitions for ARM
--
-------------------------------------------------------------------------

arch = "armv8"
archFamily = "aarch64"

toolprefix = "aarch64-none-elf-"

compiler = toolprefix ++ "gcc"
objcopy  = toolprefix ++ "objcopy"
objdump  = toolprefix ++ "objdump"
ar       = toolprefix ++ "ar"
ranlib   = toolprefix ++ "ranlib"
cxxcompiler = toolprefix ++ "g++"

ourCommonFlags = [ Str "-fno-unwind-tables",
                   Str "-Wno-packed-bitfield-compat",
                   Str "-fno-stack-protector",
                   Str "-mcpu=cortex-a57",
                   Str "-march=armv8-a",
                   Str "-mabi=lp64",
                   Str "-DPIC_REGISTER=X10",
                   Str "-fPIE",
                   Str "-ffixed-r9",
                   Str "-DTHREAD_REGISTER=X9",
                   Str "-D__ARM_CORTEX__",
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