<commit_before>from collections import deque

from hwt.hdl.constants import NOP
from hwt.simulator.agentBase import SyncAgentBase


class RdSyncedAgent(SyncAgentBase):
    """
    Simulation/verification agent for RdSynced interface
    """
    def __init__(self, intf, allowNoReset=True):
        super().__init__(intf, allowNoReset=allowNoReset)
        self.actualData = NOP
        self.data = deque()
        self._rd = self.getRd(intf)

    def getRd(self, intf):
        return intf.rd

    def isRd(self):
        return self._rd.read()

    def wrRd(self, val):
        self._rd.write(val)

    def setEnable_asMonitor(self, en, sim):
        super(RdSyncedAgent, self).setEnable_asMonitor(en, sim)
        if not en:
            self.wrRd(0)

    def monitor(self, sim):
        """Collect data from interface"""
        yield sim.waitReadOnly()
        if self.notReset(sim) and self._enabled:
            yield sim.waitWriteOnly()
            self.wrRd(1)

            yield sim.waitReadOnly()
            d = self.doRead(sim)
            self.data.append(d)
        else:
            yield sim.waitWriteOnly()
            self.wrRd(0)

    def doRead(self, sim):
        """extract data from interface"""
        return self.intf.data.read()

    def doWrite(self, sim, data):
        """write data to interface"""
        self.intf.data.write(data)

    def driver(self, sim):
        """Push data to interface"""
        yield sim.waitWriteOnly()
        if self.actualData is NOP and self.data:
            self.actualData = self.data.popleft()

        do = self.actualData is not NOP

        if do:
            self.doWrite(sim, self.actualData)
        else:
            self.doWrite(sim, None)

        yield sim.waitReadOnly()
        en = self.notReset(sim) and self._enabled
        if not (en and do):
            return

        rd = self.isRd()
        if en:
            try:
                rd = int(rd)
            except ValueError:
                raise AssertionError(
                    ("%r: ready signal for interface %r is in invalid state,"<commit_msg>RdSyncedAgent: avoid useless rd read<commit_after>from collections import deque

from hwt.hdl.constants import NOP
from hwt.simulator.agentBase import SyncAgentBase


class RdSyncedAgent(SyncAgentBase):
    """
    Simulation/verification agent for RdSynced interface
    """
    def __init__(self, intf, allowNoReset=True):
        super().__init__(intf, allowNoReset=allowNoReset)
        self.actualData = NOP
        self.data = deque()
        self._rd = self.getRd(intf)

    def getRd(self, intf):
        return intf.rd

    def isRd(self):
        return self._rd.read()

    def wrRd(self, val):
        self._rd.write(val)

    def setEnable_asMonitor(self, en, sim):
        super(RdSyncedAgent, self).setEnable_asMonitor(en, sim)
        if not en:
            self.wrRd(0)

    def monitor(self, sim):
        """Collect data from interface"""
        yield sim.waitReadOnly()
        if self.notReset(sim) and self._enabled:
            yield sim.waitWriteOnly()
            self.wrRd(1)

            yield sim.waitReadOnly()
            d = self.doRead(sim)
            self.data.append(d)
        else:
            yield sim.waitWriteOnly()
            self.wrRd(0)

    def doRead(self, sim):
        """extract data from interface"""
        return self.intf.data.read()

    def doWrite(self, sim, data):
        """write data to interface"""
        self.intf.data.write(data)

    def driver(self, sim):
        """Push data to interface"""
        yield sim.waitWriteOnly()
        if self.actualData is NOP and self.data:
            self.actualData = self.data.popleft()

        do = self.actualData is not NOP

        if do:
            self.doWrite(sim, self.actualData)
        else:
            self.doWrite(sim, None)

        yield sim.waitReadOnly()
        en = self.notReset(sim) and self._enabled
        if not (en and do):
            return

        if en:
            rd = self.isRd()
            try:
                rd = int(rd)
            except ValueError:
                raise AssertionError(
                    ("%r: ready signal for interface %r is in invalid state,"
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