<commit_before>{
	"BASE_DIR":"~/projects/ibuilder_project",
	"board":"dionysus",
	"PROJECT_NAME":"example_project",
	"TEMPLATE":"wishbone_template.json",
	"INTERFACE":{
		"filename":"ft_master_interface.v",
		"bind":{
			"i_ftdi_clk":{
				"loc":"ftdi_clk",
				"direction":"input"
			},
			"io_ftdi_data[7:0]":{
				"loc":"d[7:0]",
				"direction":"inout"
			},
			"i_ftdi_txe_n":{
				"loc":"txe_n",
				"direction":"input"
			},
			"o_ftdi_wr_n":{
				"loc":"wr_n",
				"direction":"output"
			},
			"i_ftdi_rde_n":{
				"loc":"rxe_n",
				"direction":"input"
			},
			"o_ftdi_rd_n":{
				"loc":"rd_n",
				"direction":"output"
			},
			"o_ftdi_oe_n":{
				"loc":"oe_n",
				"direction":"output"
			},
			"o_ftdi_siwu":{
				"loc":"siwua",
				"direction":"output"
			},
			"i_ftdi_suspend_n":{
				"loc":"suspend_n",
				"direction":"input"
			}
		}
	},
	"SLAVES":{
		"gpio1":{
			"filename":"wb_gpio.v",
			"bind":{
				"gpio_out[1:0]":{
					"loc":"led[1:0]",
					"direction":"output"
				},
				"gpio_in[3:2]":{
					"loc":"button[1:0]",
					"direction":"input"
				}
			}
  	},
    "lax1":{
      "filename":"wb_logic_analyzer.v",
      "bind":{
        "o_la_uart_tx":{
          "loc":"s0",
          "direction":"output"
        },
        "i_la_uart_rx":{
          "loc":"s1",
          "direction":"input"
        }
      }
    }
  },
  "MEMORY":{
		"mem1":{
			"filename":"wb_sdram.v",
			"bind":{
	
				"o_sdram_clk":{
					"loc":"sdram_clk",
					"direction":"output"
				},
				"o_sdram_cke":{
					"loc":"cke",
					"direction":"output"
				},
				"o_sdram_cs_n":{
					"loc":"cs_n",
					"direction":"output"
				},
				"o_sdram_ras":{
					"loc":"ras",
					"direction":"output"
				},
				"o_sdram_cas":{
					"loc":"cas",
					"direction":"output"
				},
				"o_sdram_we":{
					"loc":"we",
					"direction":"output"
				},
				"o_sdram_bank[1:0]":{
					"loc":"ba[1:0]",
					"direction":"output"
				},
				"o_sdram_addr[11:0]":{
					"loc":"a[11:0]",
					"direction":"output"
				},
				"io_sdram_data[15:0]":{
					"loc":"dq[15:0]",
					"direction":"inout"
				},
				"o_sdram_data_mask[1]":{
					"loc":"dqmh",
					"direction":"output"
				},
				"o_sdram_data_mask[0]":{
					"loc":"dqml",
					"direction":"output"
				}

			}
		}
	},
  "internal_bind":{
    "lax1_i_la_clk" : {
      "signal":"mem1_o_ext_sdram_clk"
    },
    "lax1_i_la_data[0]":{
      "signal":"ras"
    },
    "lax1_i_la_data[1]":{
      "signal":"cas"
    },
    "lax1_i_la_data[2]":{
      "signal":"we"
    },
    "lax1_i_la_data[13:3]":{
      "signal":"a[10:0]"
    },
    "lax1_i_la_data[15:14]":{
      "signal":"ba[1:0]"
    },
    "lax1_i_la_data[31:16]":{
      "signal":"dq[15:0]"
    },
    "lax1_i_la_ext_trig":{
      "signal":"0"
    }
  },
	"bind":{
	},
	
	"constraint_files":[
	]

}<commit_msg>moved the clk and rst into the 'bind' field<commit_after>{
	"BASE_DIR":"~/projects/ibuilder_project",
	"board":"dionysus",
	"PROJECT_NAME":"example_project",
	"TEMPLATE":"wishbone_template.json",
	"INTERFACE":{
		"filename":"ft_master_interface.v",
		"bind":{
			"i_ftdi_clk":{
				"loc":"ftdi_clk",
				"direction":"input"
			},
			"io_ftdi_data[7:0]":{
				"loc":"d[7:0]",
				"direction":"inout"
			},
			"i_ftdi_txe_n":{
				"loc":"txe_n",
				"direction":"input"
			},
			"o_ftdi_wr_n":{
				"loc":"wr_n",
				"direction":"output"
			},
			"i_ftdi_rde_n":{
				"loc":"rxe_n",
				"direction":"input"
			},
			"o_ftdi_rd_n":{
				"loc":"rd_n",
				"direction":"output"
			},
			"o_ftdi_oe_n":{
				"loc":"oe_n",
				"direction":"output"
			},
			"o_ftdi_siwu":{
				"loc":"siwua",
				"direction":"output"
			},
			"i_ftdi_suspend_n":{
				"loc":"suspend_n",
				"direction":"input"
			}
		}
	},
	"SLAVES":{
		"gpio1":{
			"filename":"wb_gpio.v",
			"bind":{
				"gpio_out[1:0]":{
					"loc":"led[1:0]",
					"direction":"output"
				},
				"gpio_in[3:2]":{
					"loc":"button[1:0]",
					"direction":"input"
				}
			}
  	},
    "lax1":{
      "filename":"wb_logic_analyzer.v",
      "bind":{
        "o_la_uart_tx":{
          "loc":"s0",
          "direction":"output"
        },
        "i_la_uart_rx":{
          "loc":"s1",
          "direction":"input"
        }
      }
    }
  },
  "MEMORY":{
		"mem1":{
			"filename":"wb_sdram.v",
			"bind":{
	
				"o_sdram_clk":{
					"loc":"sdram_clk",
					"direction":"output"
				},
				"o_sdram_cke":{
					"loc":"cke",
					"direction":"output"
				},
				"o_sdram_cs_n":{
					"loc":"cs_n",
					"direction":"output"
				},
				"o_sdram_ras":{
					"loc":"ras",
					"direction":"output"
				},
				"o_sdram_cas":{
					"loc":"cas",
					"direction":"output"
				},
				"o_sdram_we":{
					"loc":"we",
					"direction":"output"
				},
				"o_sdram_bank[1:0]":{
					"loc":"ba[1:0]",
					"direction":"output"
				},
				"o_sdram_addr[11:0]":{
					"loc":"a[11:0]",
					"direction":"output"
				},
				"io_sdram_data[15:0]":{
					"loc":"dq[15:0]",
					"direction":"inout"
				},
				"o_sdram_data_mask[1]":{
					"loc":"dqmh",
					"direction":"output"
				},
				"o_sdram_data_mask[0]":{
					"loc":"dqml",
					"direction":"output"
				}

			}
		}
	},
  "internal_bind":{
    "lax1_i_la_clk" : {
      "signal":"mem1_o_ext_sdram_clk"
    },
    "lax1_i_la_data[0]":{
      "signal":"ras"
    },
    "lax1_i_la_data[1]":{
      "signal":"cas"
    },
    "lax1_i_la_data[2]":{
      "signal":"we"
    },
    "lax1_i_la_data[13:3]":{
      "signal":"a[10:0]"
    },
    "lax1_i_la_data[15:14]":{
      "signal":"ba[1:0]"
    },
    "lax1_i_la_data[31:16]":{
      "signal":"dq[15:0]"
    },
    "lax1_i_la_ext_trig":{
      "signal":"0"
    }
  },
	"bind":{
    "clk":{
      "direction":"input",
      "loc":"clk"
    },
    "rst":{
      "direction":"input",
      "loc":"rst"
    }
	},
	
	"constraint_files":[
	]

}
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