<commit_before>--  This spec has been automatically generated from STM32F46_79x.svd

pragma Restrictions (No_Elaboration_Code);
pragma Ada_2012;

with HAL;
with System;

package STM32_SVD.SDIO is
   pragma Preelaborate;

   ---------------
   -- Registers --
   ---------------

   --------------------
   -- POWER_Register --
   --------------------

   subtype POWER_PWRCTRL_Field is HAL.UInt2;

   --  power control register
   type POWER_Register is record
      --  PWRCTRL
      PWRCTRL       : POWER_PWRCTRL_Field := 16#0#;
      --  unspecified
      Reserved_2_31 : HAL.UInt30 := 16#0#;
   end record
     with Volatile_Full_Access, Size => 32,
          Bit_Order => System.Low_Order_First;

   for POWER_Register use record
      PWRCTRL       at 0 range 0 .. 1;
      Reserved_2_31 at 0 range 2 .. 31;
   end record;

   --------------------
   -- CLKCR_Register --
   --------------------

   subtype CLKCR_CLKDIV_Field is HAL.Byte;
   subtype CLKCR_WIDBUS_Field is HAL.UInt2;

   --  SDI clock control register
   type CLKCR_Register is record
      --  Clock divide factor
      CLKDIV         : CLKCR_CLKDIV_Field := 16#0#;
      --  Clock enable bit
      CLKEN          : Boolean := False;
      --  Power saving configuration bit
      PWRSAV         : Boolean := False;
      --  Clock divider bypass enable bit
      BYPASS         : Boolean := False;
      --  Wide bus mode enable bit
      WIDBUS         : CLKCR_WIDBUS_Field := 16#0#;
      --  SDIO_CK dephasing selection bit
      NEGEDGE        : Boolean := False;
      --  HW Flow Control enable
      HWFC_EN        : Boolean := False;
      --  unspecified
      Reserved_15_31 : HAL.UInt17 := 16#0#;
   end record
     with Volatile_Full_Access, Size => 32,
          Bit_Order => System.Low_Order_First;

   for CLKCR_Register use record
      CLKDIV         at 0 range 0 .. 7;
      CLKEN          at 0 range 8 .. 8;
      PWRSAV         at 0 range 9 .. 9;
      BYPASS         at 0 range 10 .. 10;
      WIDBUS         at 0 range 11 .. 12;
      NEGEDGE        at 0 range 13 .. 13;
      HWFC_EN        at 0 range 14 .. 14;
      Reserved_15_31 at 0 range 15 .. 31;
   end record;

   ------------------
   -- CMD_Register --
   ------------------

   subtype CMD_CMDINDEX_Field is HAL.UInt6;
   subtype CMD_WAITRESP_Field is HAL.UInt2;

   --  command register
   type CMD_Register is record
      --  Command index
      CMDINDEX       : CMD_CMDINDEX_Field := 16#0#;
      --  Wait for response bits
      WAITRESP       : CMD_WAITRESP_Field := 16#0#;
      --  CPSM waits for interrupt request
      WAITINT        : Boolean := False;
      --  CPSM Waits for ends of data transfer (CmdPend internal signal).
      WAITPEND       : Boolean := False;
      --  Command path state machine (CPSM) Enable bit
      CPSMEN         : Boolean := False;
      --  SD I/O suspend command
      SDIOSuspend    : Boolean := False;
      --  Enable CMD completion
      ENCMDcompl     : Boolean := False;
      --  not Interrupt Enable
      nIEN           : Boolean := False;
      --  CE-ATA command
      CE_ATACMD      : Boolean := False;
      --  unspecified
      Reserved_15_31 : HAL.UInt17 := 16#0#;
   end record
     with Volatile_Full_Access, Size => 32,
          Bit_Order => System.Low_Order_First;

   for CMD_Register use record
      CMDINDEX       at 0 range 0 .. 5;
      WAITRESP       at 0 range 6 .. 7;
      WAITINT        at 0 range 8 .. 8;
      WAITPEND       at 0 range 9 .. 9;
      CPSMEN         at 0 range 10 .. 10;
      SDIOSuspend    at 0 range 11 .. 11;
      ENCMDcompl     at 0 range 12 .. 12;
      nIEN           at 0 range 13 .. 13;
      CE_ATACMD      at 0 range 14 .. 14;
      Reserved_15_31 at 0 range 15 .. 31;
   end record;

   ----------------------
   -- RESPCMD_Register --
   ----------------------

   subtype RESPCMD_RESPCMD_Field is HAL.UInt6;

   --  command response register
   type RESPCMD_Register is record
      --  Read-only. Response command index
      RESPCMD       : RESPCMD_RESPCMD_Field;
      --  unspecified
      Reserved_6_31 : HAL.UInt26;
   end record
     with Volatile_Full_Access, Size => 32,
          Bit_Order => System.Low_Order_First;

   for RESPCMD_Register use record
      RESPCMD       at 0 range 0 .. 5;
      Reserved_6_31 at 0 range 6 .. 31;
   end record;

   -------------------
   -- DLEN_Register --
   -------------------

   subtype DLEN_DATALENGTH_Field is HAL.UInt25;

   --  data length register
   type DLEN_Register is record
      --  Data length value
      DATALENGTH     : DLEN_DATALENGTH_Field := 16#0#;
      --  unspecified
      Reserved_25_31 : HAL.UInt7 := 16#0#;
   end record
     with Volatile_Full_Access, Size => 32,
          Bit_Order => System.Low_Order_First;

   for DLEN_Register use record
      DATALENGTH     at 0 range 0 .. 24;
      Reserved_25_31 at 0 range 25 .. 31;
   end record;

   --------------------
   -- DCTRL_Register --
   --------------------

   subtype DCTRL_DBLOCKSIZE_Field is HAL.UInt4;

   --  data control register
   type DCTRL_Register is record
      --  DTEN
      DTEN           : Boolean := False;
      --  Data transfer direction selection
      DTDIR          : Boolean := False;
      --  Data transfer mode selection 1: Stream or SDIO multibyte data
      --  transfer.
      DTMODE         : Boolean := False;
      --  DMA enable bit
      DMAEN          : Boolean := False;
      --  Data block size
      DBLOCKSIZE     : DCTRL_DBLOCKSIZE_Field := 16#0#;
      --  Read wait start
      RWSTART        : Boolean := False;
      --  Read wait stop
      RWSTOP         : Boolean := False;
      --  Read wait mode
      RWMOD          : Boolean := False;
      --  SD I/O enable functions<commit_msg>Add enums in the SDIO SVD interface.<commit_after>--  This spec has been automatically generated from STM32F46_79x.svd

pragma Restrictions (No_Elaboration_Code);
pragma Ada_2012;

with HAL;
with System;

package STM32_SVD.SDIO is
   pragma Preelaborate;

   ---------------
   -- Registers --
   ---------------

   --------------------
   -- POWER_Register --
   --------------------

   --  PWRCTRL
   type PWRCTRL_Field is
     (
      --  The clock to card is stopped.
      Power_Off,
      --  The card is clocked.
      Power_On)
     with Size => 2;
   for PWRCTRL_Field use
     (Power_Off => 0,
      Power_On => 3);

   --  power control register
   type POWER_Register is record
      --  PWRCTRL
      PWRCTRL       : PWRCTRL_Field := Power_Off;
      --  unspecified
      Reserved_2_31 : HAL.UInt30 := 16#0#;
   end record
     with Volatile_Full_Access, Size => 32,
          Bit_Order => System.Low_Order_First;

   for POWER_Register use record
      PWRCTRL       at 0 range 0 .. 1;
      Reserved_2_31 at 0 range 2 .. 31;
   end record;

   --------------------
   -- CLKCR_Register --
   --------------------

   subtype CLKCR_CLKDIV_Field is HAL.Byte;

   --  Wide bus mode enable bit
   type WIDBUS_Field is
     (
      --  Default bus mode: SDMMC_D0 is used.
      Bus_Wide_1B,
      --  4-wide bus mode: SDMMC_D[3:0] used.
      Bus_Wide_4B,
      --  8-wide bus mode: SDMMC_D[7:0] used.
      Bus_Wide_8B)
     with Size => 2;
   for WIDBUS_Field use
     (Bus_Wide_1B => 0,
      Bus_Wide_4B => 1,
      Bus_Wide_8B => 2);

   --  SDIO_CK dephasing selection bit
   type NEGEDGE_Field is
     (
      --  Cmd and Data changed on the SDMMCCLK falling edge succeeding the
      --  rising edge of SDMMC_CK.
      Edge_Rising,
      --  Cmd and Data changed on the SDMMC_CK falling edge.
      Edge_Falling)
     with Size => 1;
   for NEGEDGE_Field use
     (Edge_Rising => 0,
      Edge_Falling => 1);

   --  SDI clock control register
   type CLKCR_Register is record
      --  Clock divide factor
      CLKDIV         : CLKCR_CLKDIV_Field := 16#0#;
      --  Clock enable bit
      CLKEN          : Boolean := False;
      --  Power saving configuration bit
      PWRSAV         : Boolean := False;
      --  Clock divider bypass enable bit
      BYPASS         : Boolean := False;
      --  Wide bus mode enable bit
      WIDBUS         : WIDBUS_Field := Bus_Wide_1B;
      --  SDIO_CK dephasing selection bit
      NEGEDGE        : NEGEDGE_Field := Edge_Rising;
      --  HW Flow Control enable
      HWFC_EN        : Boolean := False;
      --  unspecified
      Reserved_15_31 : HAL.UInt17 := 16#0#;
   end record
     with Volatile_Full_Access, Size => 32,
          Bit_Order => System.Low_Order_First;

   for CLKCR_Register use record
      CLKDIV         at 0 range 0 .. 7;
      CLKEN          at 0 range 8 .. 8;
      PWRSAV         at 0 range 9 .. 9;
      BYPASS         at 0 range 10 .. 10;
      WIDBUS         at 0 range 11 .. 12;
      NEGEDGE        at 0 range 13 .. 13;
      HWFC_EN        at 0 range 14 .. 14;
      Reserved_15_31 at 0 range 15 .. 31;
   end record;

   ------------------
   -- CMD_Register --
   ------------------

   subtype CMD_CMDINDEX_Field is HAL.UInt6;

   --  Wait for response bits
   type WAITRESP_Field is
     (
      --  No response, expect CMDSENT flag.
      No_Response,
      --  Short response, expect CMDREND or CCRCFAIL flag.
      Short_Response,
      --  Long response, expect CMDREND or CCRCFAIL flag.
      Long_Response)
     with Size => 2;
   for WAITRESP_Field use
     (No_Response => 0,
      Short_Response => 1,
      Long_Response => 3);

   --  command register
   type CMD_Register is record
      --  Command index
      CMDINDEX       : CMD_CMDINDEX_Field := 16#0#;
      --  Wait for response bits
      WAITRESP       : WAITRESP_Field := No_Response;
      --  CPSM waits for interrupt request
      WAITINT        : Boolean := False;
      --  CPSM Waits for ends of data transfer (CmdPend internal signal).
      WAITPEND       : Boolean := False;
      --  Command path state machine (CPSM) Enable bit
      CPSMEN         : Boolean := False;
      --  SD I/O suspend command
      SDIOSuspend    : Boolean := False;
      --  Enable CMD completion
      ENCMDcompl     : Boolean := False;
      --  not Interrupt Enable
      nIEN           : Boolean := False;
      --  CE-ATA command
      CE_ATACMD      : Boolean := False;
      --  unspecified
      Reserved_15_31 : HAL.UInt17 := 16#0#;
   end record
     with Volatile_Full_Access, Size => 32,
          Bit_Order => System.Low_Order_First;

   for CMD_Register use record
      CMDINDEX       at 0 range 0 .. 5;
      WAITRESP       at 0 range 6 .. 7;
      WAITINT        at 0 range 8 .. 8;
      WAITPEND       at 0 range 9 .. 9;
      CPSMEN         at 0 range 10 .. 10;
      SDIOSuspend    at 0 range 11 .. 11;
      ENCMDcompl     at 0 range 12 .. 12;
      nIEN           at 0 range 13 .. 13;
      CE_ATACMD      at 0 range 14 .. 14;
      Reserved_15_31 at 0 range 15 .. 31;
   end record;

   ----------------------
   -- RESPCMD_Register --
   ----------------------

   subtype RESPCMD_RESPCMD_Field is HAL.UInt6;

   --  command response register
   type RESPCMD_Register is record
      --  Read-only. Response command index
      RESPCMD       : RESPCMD_RESPCMD_Field;
      --  unspecified
      Reserved_6_31 : HAL.UInt26;
   end record
     with Volatile_Full_Access, Size => 32,
          Bit_Order => System.Low_Order_First;

   for RESPCMD_Register use record
      RESPCMD       at 0 range 0 .. 5;
      Reserved_6_31 at 0 range 6 .. 31;
   end record;

   -------------------
   -- DLEN_Register --
   -------------------

   subtype DLEN_DATALENGTH_Field is HAL.UInt25;

   --  data length register
   type DLEN_Register is record
      --  Data length value
      DATALENGTH     : DLEN_DATALENGTH_Field := 16#0#;
      --  unspecified
      Reserved_25_31 : HAL.UInt7 := 16#0#;
   end record
     with Volatile_Full_Access, Size => 32,
          Bit_Order => System.Low_Order_First;

   for DLEN_Register use record
      DATALENGTH     at 0 range 0 .. 24;
      Reserved_25_31 at 0 range 25 .. 31;
   end record;

   --------------------
   -- DCTRL_Register --
   --------------------

   --  Data transfer direction selection
   type DTDIR_Field is
     (
      --  Data is sent to the card
      Controller_To_Card,
      --  Data is read from the card
      Card_To_Controller)
     with Size => 1;
   for DTDIR_Field use
     (Controller_To_Card => 0,
      Card_To_Controller => 1);

   --  Data transfer mode selection 1: Stream or SDIO multibyte data transfer.
   type DTMODE_Field is
     (
      --  Block data transfer
      Block,
      --  Stream or SDIO multibyte data transfer
      Stream)
     with Size => 1;
   for DTMODE_Field use
     (Block => 0,
      Stream => 1);

   --  Data block size
   type DBLOCKSIZE_Field is
     (
      --  Block length = 2**0 = 1 byte
      Block_1B,
      --  Block length = 2**1 = 2 byte
      Block_2B,
      --  Block length = 2**2 = 4 byte
      Block_4B,
      --  Block length = 2**3 = 8 byte
      Block_8B,
      --  Block length = 2**4 = 16 byte
      Block_16B,
      --  Block length = 2**5 = 32 byte
      Block_32B,
      --  Block length = 2**6 = 64 byte
      Block_64B,
      --  Block length = 2**7 = 128 byte
      Block_128B,
      --  Block length = 2**8 = 256 byte
      Block_256B,
      --  Block length = 2**9 = 512 byte
      Block_512B,
      --  Block length = 2**10 = 1024 byte
      Block_1024B,
      --  Block length = 2**11 = 2048 byte
      Block_2048B,
      --  Block length = 2**12 = 4096 byte
      Block_4096B,
      --  Block length = 2**13 = 8192 byte
      Block_8192B,
      --  Block length = 2**14 = 16384 byte
      Block_16384B)
     with Size => 4;
   for DBLOCKSIZE_Field use
     (Block_1B => 0,
      Block_2B => 1,
      Block_4B => 2,
      Block_8B => 3,
      Block_16B => 4,
      Block_32B => 5,
      Block_64B => 6,
      Block_128B => 7,
      Block_256B => 8,
      Block_512B => 9,
      Block_1024B => 10,
      Block_2048B => 11,
      Block_4096B => 12,
      Block_8192B => 13,
      Block_16384B => 14);

   --  data control register
   type DCTRL_Register is record
      --  DTEN
      DTEN           : Boolean := False;
      --  Data transfer direction selection
      DTDIR          : DTDIR_Field := Controller_To_Card;
      --  Data transfer mode selection 1: Stream or SDIO multibyte data
      --  transfer.
      DTMODE         : DTMODE_Field := Block;
      --  DMA enable bit
      DMAEN          : Boolean := False;
      --  Data block size
      DBLOCKSIZE     : DBLOCKSIZE_Field := Block_1B;
      --  Read wait start
      RWSTART        : Boolean := False;
      --  Read wait stop
      RWSTOP         : Boolean := False;
      --  Read wait mode
      RWMOD          : Boolean := False;
      --  SD I/O enable functions
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