Q:

GND plane close to LVDS differential pair?

I have two LVDS differential pairs on my PCB, running from a connector. On the connector, I have the following sequence of nets:

GND
LVDS+
LVDS-
GND
LVDS+
LVDS-
GND

This is as I have seen suggested:

So the GNDs pins are very close to the LVDS pins. However, advice I have seen regarding LVDS PCB layouts suggests that I should keep some clearance between the LVDS tracks and anything else, including the GND plane. This seem to be conflicting advice.
What's the best way to lay out the LVDS tracks running from my connector?

Continue the GND plane close to the track as it is on the connector? Or leave clearance and risk an impedance change?

Added: There is also an unbroken ground plane underneath the differential pairs.

A:

If you remember that a differential signal is really just two single-ended signals that happen to have signals that change in the opposite direction at the same time, it's fairly simple to see what to do.
1) Make sure you have half the differential impedance between the individual traces and the reference plane below. For LVDS that would be 50R trace impedance. Notice that distance to the other trace in the pair as well as other Cu will impact the impedance. Use a 2D field solver to do this (The best free tool I have found is TNT).
2) Make sure you don't have too much crosstalk between any traces (this includes crosstalk between the two traces of that pair, although this is often not much of an issue - see note below). 
Yes this may be contradictory advice to what you may read in some app notes, but do your own research in books like the two excellent books on signal integrity by Lee Ritchey (you can legally get the first one "Right the First Time, volume I" as a free or cheap download on the net).

Note on #2: You will (obviously) also have crosstalk between the two
  traces of the pair. And at just the point where the signals switch
  (both signals switch at the same time). The end result of that is a
  degradation of the edge rate.
Now if you follow advice #1 you will have more than plenty spacing
  between the two traces that this will normally not be a problem for
  your circuit. Actually most often analysis show that this is not a
  likely issue. It is just mentioned here for completeness.

Does this help you? I will be happy to expand the answer.

