Q:

Why would IO pins be tied to VCC or GND with 0 Ohm resistor on FPGA Dev Board?

I have a cheap Altera Cyclone II EP2C5T144C8 Dev Board and a few (4) of the IO/LVDS pins are shorted to VCC or GND as shown in the schematic segment below. The pins are also brought out to headers on the board.
The only things I can think of for why they are there are:

They are meant to be left non-populated (but were accidentally populated) for the user to add pull-up/pull-down resistors
They are somehow helping power the FPGA

Is there any reason a direct short to VCC/GND would be desirable for an IO pin on a Dev Board? Can I remove these resistors without negatively impacting the board's performance?

A:

There are different packages for the FPGA.  Different packages with different options.
On the 144 pin EP2C8 version of the Altera Cyclone II EP2C5T144C8 Dev Board, pins 26 and 81 are VCCINT and pins 27 and 80 are GND.  
The \$ 0\Omega\$ resistors allow different parts to share the same development board.

EP2C8 & EP2C8A Device Pin-Out
EP2C5T144 Board Diagram

