Q:

Error profiling with embedded assembly language in C++ code

I found this article on the efficiency of std::vector::push_back, the associated code can be found here. I tried it myself and I got an illegal instruction (core dumped), gdb indicates the error occurs on line 37.
I compiled using gcc 4.7.2, on a computer with:
$ sudo dmidecode -t processor
# dmidecode 2.11
SMBIOS 2.5 present.

Handle 0x0400, DMI type 4, 40 bytes
Processor Information
    Socket Designation: CPU
    Type: Central Processor
    Family: Core 2 Duo
    Manufacturer: Intel
    ID: 7A 06 01 00 FF FB EB BF
    Signature: Type 0, Family 6, Model 23, Stepping 10
    Flags:
        FPU (Floating-point unit on-chip)
        VME (Virtual mode extension)
        DE (Debugging extension)
        PSE (Page size extension)
        TSC (Time stamp counter)
        MSR (Model specific registers)
        PAE (Physical address extension)
        MCE (Machine check exception)
        CX8 (CMPXCHG8 instruction supported)
        APIC (On-chip APIC hardware supported)
        SEP (Fast system call)
        MTRR (Memory type range registers)
        PGE (Page global enable)
        MCA (Machine check architecture)
        CMOV (Conditional move instruction supported)
        PAT (Page attribute table)
        PSE-36 (36-bit page size extension)
        CLFSH (CLFLUSH instruction supported)
        DS (Debug store)
        ACPI (ACPI supported)
        MMX (MMX technology supported)
        FXSR (FXSAVE and FXSTOR instructions supported)
        SSE (Streaming SIMD extensions)
        SSE2 (Streaming SIMD extensions 2)
        SS (Self-snoop)
        HTT (Multi-threading)
        TM (Thermal monitor supported)
        PBE (Pending break enabled)
    Version: Not Specified
    Voltage: 1.2 V
    External Clock: 1333 MHz
    Max Speed: 5200 MHz
    Current Speed: 3000 MHz
    Status: Populated, Enabled
    Upgrade: Socket LGA775
    L1 Cache Handle: 0x0700
    L2 Cache Handle: 0x0701
    L3 Cache Handle: Not Provided
    Serial Number: Not Specified
    Asset Tag: Not Specified
    Part Number: Not Specified
    Core Count: 2
    Core Enabled: 2
    Thread Count: 2
    Characteristics:
        64-bit capable

What is the problem here? How can I get this code to work? I also tried with icpc 13.1.0 but this also failed.
Edit: I'm using Ubuntu 12.10 64-bit.

A:

Your CPU doesn't support the RDTSCP instruction. It's a Core i7 instruction, and your processor is an earlier generation (Merom-L).
You should be able to use RDTSC instead. See, for example, Difference between rdtscp, rdtsc : memory and cpuid / rdtsc?

