Q:

How do I simplify these repetitive make targets?

Consider these targets:
test/masterfiles/efl_data/efl_class_cmd_regcmp.json: \
  test/masterfiles/efl_data/efl_class_cmd_regcmp.csv
   $(CSVTOJSON) -b efl_class_cmd_regcmp < $< > $@

test/masterfiles/efl_data/efl_class_returnszero.json: \
  test/masterfiles/efl_data/efl_class_returnszero.csv
   $(CSVTOJSON) -b efl_class_returnszero < $< > $@

test/masterfiles/efl_data/efl_class_expression.json: \
  test/masterfiles/efl_data/efl_class_expression.csv
   $(CSVTOJSON) -b efl_class_expression < $< > $@

The pattern efl_class_some_word is repeated in the target, the dependency, and the recipe to make the target. What I can I do to reduce these rules to a single rule? Then normal use of %, $@, and @< does not seem to apply.

A:

Write a pattern rule:
EFL_PARTS = cmd_regcmp returnszero expression

EFL_DIR = test/masterfiles/efl_data

$(EFL_DIR)/%.json: $(EFL_DIR)/%.csv
        $(CSVTOJSON) -b $* < $< > $@

all: $(patsubst %,$(EFL_DIR)/efl_class_%.json,$(EFL_PARTS))
.PHONY: all

