Q:

CPU Switches from Kernel mode to User Mode on X86 : When and How?

When and how does CPU Switch from  Kernel mode to User Mode On X86 : What exactly does it do? How does it makes this transition?

A:

In x86 protected mode, the current privilege level that the CPU is executing in is controlled by the two least significant bits of the CS register (the RPL field of the segment selector).
So a switch from kernel mode (CPL=0) to user mode (CPL=3) is accomplished by replacing a kernel-mode CS value with a user-mode one.  There's many ways to do this, but one typical one is an IRET instruction which pops the EIP, CS and EFLAGS registers from the stack.

A:

iret does this for example. See the code here (INTERRUPT_RETURN macro)

