# Path: basil/utils/utils.py
# def logging(fn):
#     def wrapped(*args, **kargs):
# def lsbits(b):
# def bitvector_to_byte_array(bitvector):
# def bitarray_to_byte_array(bitarr):
#     def tobytes(v):
#     def tobytes(v):
# 
# Path: basil/RL/RegisterLayer.py
# class RegisterLayer(Base):
#     def __init__(self, driver, conf):
#         super(RegisterLayer, self).__init__(conf)
#         self._drv = driver
# 
#     def init(self):
#         super(RegisterLayer, self).init()
# 
#     def __getattr__(self, name):
#         if not self.is_initialized:  # this test allows attributes to be set in the __init__ method
#             raise AttributeError("'%s' has no attribute '%s'" % (self.__class__.__name__, name))
#         else:
#             attr = getattr(self._drv, name)
#             # for compatibility with RegisterHardwareLayer:
#             # prevent wrting to a register twice
#             if not isinstance(attr, Callable):
#                 return attr
# 
#             def method(*args, **kargs):
#                 arg = ()
#                 if 'arg_names' in self._conf:
#                     for i in range(len(args)):
#                         kargs[self._conf['arg_names'][i]] = args[i]
#                 else:
#                     arg = args
# 
#                 if 'arg_add' in self._conf:
#                     for argn in self._conf['arg_add']:
#                         kargs[argn] = self._conf['arg_add'][argn]
# 
#                 return attr(*arg, **kargs)
# 
#             return method
# 
#     def __setattr__(self, name, value):
#         if not self.is_initialized:  # this test allows attributes to be set in the __init__ method
#             super(RegisterLayer, self).__setattr__(name, value)
#         else:
#             try:
#                 setattr(self._drv, name, value)
#             except Exception:
#                 super(RegisterLayer, self).__setattr__(name, value)


from bitarray import bitarray
from basil.utils import utils
from basil.RL.RegisterLayer import RegisterLayer
from six.moves import range
        else:
            raise ValueError('Item does not exist')

    def __setitem__(self, key, value):
        self._tracks[key] = value

    def clear(self):
        'Clear tracks in memory - all zero'
        for track in self._tracks:
            self._tracks[track].setall(False)

    def write(self, size=-1):
        if size == -1:
            size = self._conf["seq_size"]

        bv = bitarray(self._conf["seq_width"] * size)
        for i in range(size):
            for track in self._conf['tracks']:
                bit = 0
                if self._conf["seq_width"] >= 8:
                    bit = i * self._conf["seq_width"] + self._conf["seq_width"] - 1 - track['position']
                elif self._conf["seq_width"] == 4:
                    if i % 2 == 0:
                        bit = (i + 1) * self._conf["seq_width"] + self._conf["seq_width"] - 1 - track['position']
                    else:
                        bit = (i - 1) * self._conf["seq_width"] + self._conf["seq_width"] - 1 - track['position']
                else:
                    raise NotImplementedError("To be implemented.")
                bv[bit] = self._tracks[track['name']][i]


# Path: basil/utils/utils.py
# def logging(fn):
#     def wrapped(*args, **kargs):
# def lsbits(b):
# def bitvector_to_byte_array(bitvector):
# def bitarray_to_byte_array(bitarr):
#     def tobytes(v):
#     def tobytes(v):
# 
# Path: basil/RL/RegisterLayer.py
# class RegisterLayer(Base):
#     def __init__(self, driver, conf):
#         super(RegisterLayer, self).__init__(conf)
#         self._drv = driver
# 
#     def init(self):
#         super(RegisterLayer, self).init()
# 
#     def __getattr__(self, name):
#         if not self.is_initialized:  # this test allows attributes to be set in the __init__ method
#             raise AttributeError("'%s' has no attribute '%s'" % (self.__class__.__name__, name))
#         else:
#             attr = getattr(self._drv, name)
#             # for compatibility with RegisterHardwareLayer:
#             # prevent wrting to a register twice
#             if not isinstance(attr, Callable):
#                 return attr
# 
#             def method(*args, **kargs):
#                 arg = ()
#                 if 'arg_names' in self._conf:
#                     for i in range(len(args)):
#                         kargs[self._conf['arg_names'][i]] = args[i]
#                 else:
#                     arg = args
# 
#                 if 'arg_add' in self._conf:
#                     for argn in self._conf['arg_add']:
#                         kargs[argn] = self._conf['arg_add'][argn]
# 
#                 return attr(*arg, **kargs)
# 
#             return method
# 
#     def __setattr__(self, name, value):
#         if not self.is_initialized:  # this test allows attributes to be set in the __init__ method
#             super(RegisterLayer, self).__setattr__(name, value)
#         else:
#             try:
#                 setattr(self._drv, name, value)
#             except Exception:
#                 super(RegisterLayer, self).__setattr__(name, value)


# Path: basil/RL/TrackRegister.py
from bitarray import bitarray
from basil.utils import utils
from basil.RL.RegisterLayer import RegisterLayer
from six.moves import range

        else:
            raise ValueError('Item does not exist')

    def __setitem__(self, key, value):
        self._tracks[key] = value

    def clear(self):
        'Clear tracks in memory - all zero'
        for track in self._tracks:
            self._tracks[track].setall(False)

    def write(self, size=-1):
        if size == -1:
            size = self._conf["seq_size"]

        bv = bitarray(self._conf["seq_width"] * size)
        for i in range(size):
            for track in self._conf['tracks']:
                bit = 0
                if self._conf["seq_width"] >= 8:
                    bit = i * self._conf["seq_width"] + self._conf["seq_width"] - 1 - track['position']
                elif self._conf["seq_width"] == 4:
                    if i % 2 == 0:
                        bit = (i + 1) * self._conf["seq_width"] + self._conf["seq_width"] - 1 - track['position']
                    else:
                        bit = (i - 1) * self._conf["seq_width"] + self._conf["seq_width"] - 1 - track['position']
                else:
                    raise NotImplementedError("To be implemented.")
                bv[bit] = self._tracks[track['name']][i]


        ba = utils.bitarray_to_byte_array(bv)