# Path: VM/util.py
# class Instruction(metaclass=InstructionMeta):
#     """
#     This class is here for convenience purposes only since it's much simpler (a.k.a. easier to type) to inherit from a class
#      than to use some weird metaclass. Also, all classes inheriting this one are automagically registered by the metaclass.
#     """
#     ...
# 
# Path: VM/misc.py
# def parity(num: int) -> int:
#     """
#     Calculate the parity of the least significant byte of a number.
#     See: https://graphics.stanford.edu/~seander/bithacks.html#ParityWith64Bits
#     :param num: The byte to calculate the parity of.
#     :return:
#     """
# 
#     return ((((num & 0xFF) * 0x0101010101010101) & 0x8040201008040201) % 0x1FF) & 1
# 
# def sign_extend(num: int, nbytes: int) -> int:
#     # TODO: this is basically converting an unsigned number to signed. Maybe rename the function?
#     """
#     See: https://stackoverflow.com/a/32031543/4354477
#     :param num: The integer to sign-extend
#     :param nbytes: The number of bytes _in that integer_.
#     :return:
#     """
#     if num < 0:
#         return num
#     
#     sign_bit = 1 << (nbytes * 8 - 1)
#     return (num & (sign_bit - 1)) - (num & sign_bit)


import enum
    import logging
from ..util import Instruction
from ..misc import parity, sign_extend
from functools import partialmethod as P
    from ..debug import debug_operand, debug_register_operand
            dividend = (high << (sz * 8)) + low
        
        if idiv:
            dividend = sign_extend(dividend, sz * 2)

        quot, rem = dividend // divisor, dividend % divisor

        if quot > MAXVALS[sz]:
            raise RuntimeError('Divide error')

        vm.reg.set(0, sz, quot)  # AL/AX/EAX
        if sz == 1:
            vm.reg.set(4, sz, rem)  # AH
        else:
            vm.reg.set(2, sz, rem)  # DX/EDX

        if __debug__:
            logger.debug(
                '%sdiv %s=%d, %s=%d',
                'i' if idiv else '',
                debug_register_operand(0, sz), dividend,
                debug_operand(RM, sz), divisor
            )

        return True


####################
# IMUL
####################

# Path: VM/util.py
# class Instruction(metaclass=InstructionMeta):
#     """
#     This class is here for convenience purposes only since it's much simpler (a.k.a. easier to type) to inherit from a class
#      than to use some weird metaclass. Also, all classes inheriting this one are automagically registered by the metaclass.
#     """
#     ...
# 
# Path: VM/misc.py
# def parity(num: int) -> int:
#     """
#     Calculate the parity of the least significant byte of a number.
#     See: https://graphics.stanford.edu/~seander/bithacks.html#ParityWith64Bits
#     :param num: The byte to calculate the parity of.
#     :return:
#     """
# 
#     return ((((num & 0xFF) * 0x0101010101010101) & 0x8040201008040201) % 0x1FF) & 1
# 
# def sign_extend(num: int, nbytes: int) -> int:
#     # TODO: this is basically converting an unsigned number to signed. Maybe rename the function?
#     """
#     See: https://stackoverflow.com/a/32031543/4354477
#     :param num: The integer to sign-extend
#     :param nbytes: The number of bytes _in that integer_.
#     :return:
#     """
#     if num < 0:
#         return num
#     
#     sign_bit = 1 << (nbytes * 8 - 1)
#     return (num & (sign_bit - 1)) - (num & sign_bit)


# Path: VM/instructions/math.py
import enum
    import logging
from ..util import Instruction
from ..misc import parity, sign_extend
from functools import partialmethod as P
    from ..debug import debug_operand, debug_register_operand

            dividend = (high << (sz * 8)) + low
        
        if idiv:
            dividend = sign_extend(dividend, sz * 2)

        quot, rem = dividend // divisor, dividend % divisor

        if quot > MAXVALS[sz]:
            raise RuntimeError('Divide error')

        vm.reg.set(0, sz, quot)  # AL/AX/EAX
        if sz == 1:
            vm.reg.set(4, sz, rem)  # AH
        else:
            vm.reg.set(2, sz, rem)  # DX/EDX

        if __debug__:
            logger.debug(
                '%sdiv %s=%d, %s=%d',
                'i' if idiv else '',
                debug_register_operand(0, sz), dividend,
                debug_operand(RM, sz), divisor
            )

        return True


####################
# IMUL
####################

class IMUL(Instruction):