# Path: backend/ir.py
# class VirtualRegister(object):
# class I32(VirtualRegister):
# class I16(VirtualRegister):
# class I8(VirtualRegister):
# class Pointer(VirtualRegister):
# class ConstantInt(object):
# class ConstantI32(ConstantInt):
# class ConstantI8(ConstantInt):
# class Instruction(object):
# class Binop(Instruction):
# class Unop(Instruction):
# class Call(Instruction):
# class LoadGlobalAddr(Instruction):
# class LoadParamAddr(Instruction):
# class LoadLocalAddr(Instruction):
# class LoadConstant(Instruction):
# class Deref(Instruction):
# class Store(Instruction):
# class Terminator(Instruction):
# class Ret(Terminator):
# class Branch(Terminator):
# class Jmp(Terminator):
# class Phi(Instruction):
# class Move(Instruction):
#     def __init__(self):
#     def isPhysical(self):
#     def __repr__(self):
#     def getSize(self):
#     def getSize(self):
#     def getSize(self):
#     def getSize(self):
#     def getSize(self):
#     def __init__(self,v):
#     def __repr__(self):
#     def __init__(self):
#     def getDagDisplayText(self):
#     def isTerminator(self):
#     def isBranch(self):
#     def swapVar(self,old,new):
#     def swapRead(self,old,new):
#     def swapAssigned(self,old,new):
#     def asm(self):
#     def getSuccessors(self):
#     def setSuccessors(self,new):
#     def swapSuccessor(self,old,new):
#     def getStackSlots(self):
#     def readsMem(self):
#     def writesMem(self):
#     def isMD(self):
#     def isMove(self):
#     def isCall(self):
#     def getClobberedRegisters(self):
#     def getPreClobberedRegisters(self):
#     def __init__(self,op,res,l,r):
#     def getDagDisplayText(self):
#     def __repr__(self):
#     def __init__(self,op,res,arg):
#     def __repr__(self):
#     def __init__(self,label):
#     def __repr__(self):
#     def isCall(self):
#     def readsMem(self):
#     def writesMem(self):
#     def __init__(self,res,sym):
#     def __repr__(self):
#     def __init__(self,res,sym):
#     def __repr__(self):
#     def __init__(self,res,sym):
#     def __repr__(self):
#     def getStackSlots(self):
#     def __init__(self,res,const):
#     def __repr__(self):
#     def __init__(self,out,p):
#     def __repr__(self):
#     def readsMem(self):
#     def __init__(self,p,val):
#     def __repr__(self):
#     def writesMem(self):
#     def isTerminator(self):
#     def getTemplateLookupStr(self):
#     def __init__(self,v=None):
#     def __repr__(self):
#     def __init__(self,v,t,f):
#     def __repr__(self):
#     def __init__(self,dest):
#     def __repr__(self):
#     def __init__(self,lhs,args):
#     def __repr__(self):
#     def __init__(self,l,r):
#     def isMove(self):
#     def __repr__(self):
# 
# Path: backend/standardmachine.py
# class Register(object):
# class StandardMachine(target.Target):
#     def __init__(self,name):
#     def canContain(self,t):
#     def __repr__(self):
#     def isPhysical(self):
#     def translateModule(self,m,ofile):
#     def translateFunction(self,f,ofile):
#     def calleeSaveRegisters(self,func,ig):
#     def dagFixups(self,dag):
#     def blockFixups(self,block):
#     def removePhiNodes(self,f):
#         def cmpFunction(i1,i2):
#     def preEmitCleanup(self,f):
#     def doIROpt(self,func):
#     def callingConventions(self,func):
#     def doInstructionSelection(self,func):
#     def prologAndEpilog(self,func):
#     def getEpilog(self,stackSize):
#     def getProlog(self,stackSize):
#     def getRegisters(self):
#     def getMatchableInstructions(self):
#     def getPossibleRegisters(self,v):
# 
# Path: backend/machineinstruction.py
# class MI(Instruction):
#     def __init__(self,node=None):
#     def asm(self):
#     def getDagDisplayText(self):
#     def isMD(self):
#     def __repr__(self):
#     def match(cls,node):
#     def replace(cls,node,inst):


from backend import  ir
from backend import standardmachine
from backend import machineinstruction
from backend.instructionselector import *
import backend.selectiondag as seldag
import x86md

    def asm(self):
        
        if self.slot.offset != None:
            return "mov -%d(%%ebp), %%%s"%(self.slot.offset,self.assigned[0])
        else:
            return "mov -XXX(%%ebp), %%%s"%(self.assigned[0])
    
    def getStackSlots(self):
        return [self.slot]

class X86StackLoadI8(machineinstruction.MI):
    def __init__(self,reg,slot):
        machineinstruction.MI.__init__(self)
        self.slot = slot
        self.assigned = [reg]

    def asm(self):
        
        if self.slot.offset != None:
            return "mov -%d(%%ebp), %%%s"%(self.slot.offset,self.assigned[0])
        else:
            return "mov -XXX(%%ebp), %%%s"%(self.assigned[0])
    
    def getStackSlots(self):
        return [self.slot]    


class X86StackSaveI32(machineinstruction.MI):
    def __init__(self,reg, slot):

# Path: backend/ir.py
# class VirtualRegister(object):
# class I32(VirtualRegister):
# class I16(VirtualRegister):
# class I8(VirtualRegister):
# class Pointer(VirtualRegister):
# class ConstantInt(object):
# class ConstantI32(ConstantInt):
# class ConstantI8(ConstantInt):
# class Instruction(object):
# class Binop(Instruction):
# class Unop(Instruction):
# class Call(Instruction):
# class LoadGlobalAddr(Instruction):
# class LoadParamAddr(Instruction):
# class LoadLocalAddr(Instruction):
# class LoadConstant(Instruction):
# class Deref(Instruction):
# class Store(Instruction):
# class Terminator(Instruction):
# class Ret(Terminator):
# class Branch(Terminator):
# class Jmp(Terminator):
# class Phi(Instruction):
# class Move(Instruction):
#     def __init__(self):
#     def isPhysical(self):
#     def __repr__(self):
#     def getSize(self):
#     def getSize(self):
#     def getSize(self):
#     def getSize(self):
#     def getSize(self):
#     def __init__(self,v):
#     def __repr__(self):
#     def __init__(self):
#     def getDagDisplayText(self):
#     def isTerminator(self):
#     def isBranch(self):
#     def swapVar(self,old,new):
#     def swapRead(self,old,new):
#     def swapAssigned(self,old,new):
#     def asm(self):
#     def getSuccessors(self):
#     def setSuccessors(self,new):
#     def swapSuccessor(self,old,new):
#     def getStackSlots(self):
#     def readsMem(self):
#     def writesMem(self):
#     def isMD(self):
#     def isMove(self):
#     def isCall(self):
#     def getClobberedRegisters(self):
#     def getPreClobberedRegisters(self):
#     def __init__(self,op,res,l,r):
#     def getDagDisplayText(self):
#     def __repr__(self):
#     def __init__(self,op,res,arg):
#     def __repr__(self):
#     def __init__(self,label):
#     def __repr__(self):
#     def isCall(self):
#     def readsMem(self):
#     def writesMem(self):
#     def __init__(self,res,sym):
#     def __repr__(self):
#     def __init__(self,res,sym):
#     def __repr__(self):
#     def __init__(self,res,sym):
#     def __repr__(self):
#     def getStackSlots(self):
#     def __init__(self,res,const):
#     def __repr__(self):
#     def __init__(self,out,p):
#     def __repr__(self):
#     def readsMem(self):
#     def __init__(self,p,val):
#     def __repr__(self):
#     def writesMem(self):
#     def isTerminator(self):
#     def getTemplateLookupStr(self):
#     def __init__(self,v=None):
#     def __repr__(self):
#     def __init__(self,v,t,f):
#     def __repr__(self):
#     def __init__(self,dest):
#     def __repr__(self):
#     def __init__(self,lhs,args):
#     def __repr__(self):
#     def __init__(self,l,r):
#     def isMove(self):
#     def __repr__(self):
# 
# Path: backend/standardmachine.py
# class Register(object):
# class StandardMachine(target.Target):
#     def __init__(self,name):
#     def canContain(self,t):
#     def __repr__(self):
#     def isPhysical(self):
#     def translateModule(self,m,ofile):
#     def translateFunction(self,f,ofile):
#     def calleeSaveRegisters(self,func,ig):
#     def dagFixups(self,dag):
#     def blockFixups(self,block):
#     def removePhiNodes(self,f):
#         def cmpFunction(i1,i2):
#     def preEmitCleanup(self,f):
#     def doIROpt(self,func):
#     def callingConventions(self,func):
#     def doInstructionSelection(self,func):
#     def prologAndEpilog(self,func):
#     def getEpilog(self,stackSize):
#     def getProlog(self,stackSize):
#     def getRegisters(self):
#     def getMatchableInstructions(self):
#     def getPossibleRegisters(self,v):
# 
# Path: backend/machineinstruction.py
# class MI(Instruction):
#     def __init__(self,node=None):
#     def asm(self):
#     def getDagDisplayText(self):
#     def isMD(self):
#     def __repr__(self):
#     def match(cls,node):
#     def replace(cls,node,inst):


# Path: backend/x86/x86.py
from backend import  ir
from backend import standardmachine
from backend import machineinstruction
from backend.instructionselector import *
import backend.selectiondag as seldag
import x86md


    def asm(self):
        
        if self.slot.offset != None:
            return "mov -%d(%%ebp), %%%s"%(self.slot.offset,self.assigned[0])
        else:
            return "mov -XXX(%%ebp), %%%s"%(self.assigned[0])
    
    def getStackSlots(self):
        return [self.slot]

class X86StackLoadI8(machineinstruction.MI):
    def __init__(self,reg,slot):
        machineinstruction.MI.__init__(self)
        self.slot = slot
        self.assigned = [reg]

    def asm(self):
        
        if self.slot.offset != None:
            return "mov -%d(%%ebp), %%%s"%(self.slot.offset,self.assigned[0])
        else:
            return "mov -XXX(%%ebp), %%%s"%(self.assigned[0])
    
    def getStackSlots(self):
        return [self.slot]    


class X86StackSaveI32(machineinstruction.MI):
    def __init__(self,reg, slot):

        machineinstruction.MI.__init__(self)