# Path: chips/compiler/exceptions.py
# class C2CHIPError(Exception):
# 
#     def __init__(self, message, filename=None, lineno=None):
#         self.message = message
#         if filename is not None:
#             self.filename = os.path.abspath(filename)
#         else:
#             self.filename = None
#         self.lineno = lineno
# 
#     def __str__(self):
#         return self.message + " in line %s at file %s" % (
#             self.lineno,
#             self.filename
#         )
# 
# Path: chips/compiler/python_model.py
# def to_32_signed(a):
# def to_64_signed(a):
# def generate_python_model(
#         debug,
#         input_file,
#         name,
#         instructions,
#         allocator,
#         inputs,
#         outputs,
#         profile=False
# ):
#     def __init__(
#             self,
#             debug,
#             instructions,
#             memory_content,
#             input_files,
#             output_files,
#             inputs, outputs,
#             profile=False
#     ):
#     def simulation_reset(self):
#     def get_line(self):
#     def get_file(self):
#     def get_profile(self):
#     def get_registers(self):
#     def get_memory(self):
#     def get_instruction(self):
#     def get_program_counter(self):
#     def set_breakpoint(self, f, l):
#     def clear_breakpoint(self, f, l):
#     def step_into(self):
#     def step_over(self):
#     def simulation_step(self):
# class PythonModel:


import os
import itertools
import tempfile
import shutil
import inspect
import textwrap
import subprocess
import chips.compiler.compiler
from chips.compiler.exceptions import C2CHIPError
from chips.compiler.python_model import StopSim
from chips_c import bits_to_float, float_to_bits, bits_to_double, double_to_bits, join_words, high_word, low_word
        self.model, component_inputs, component_outputs, component_name = ret

        self.component_name = component_name
        if component_name not in chip.components:
            chip.components[component_name] = self

        # check that correct number of wires have been passed in
        if len(component_inputs) != len(self.inputs):
            for i in component_inputs:
                print "component inputs:"
            for i in self.inputs:
                print "instance inputs:"
            raise C2CHIPError(
                "Instance %s does not have the right number or inputs" % (
                    component_name))

        if len(component_outputs) != len(self.outputs):
            raise C2CHIPError(
                "Instance %s does not have the right number or outputs" % (
                    component_name))

        # check for multiple sources or sinks
        for i in inputs.values():
            if i.sink is not None:
                raise C2CHIPError(
                    "%s already has a sink" % i.name, i.filename, i.lineno)
            i.sink = self

        for i in outputs.values():
            if i.source is not None:

# Path: chips/compiler/exceptions.py
# class C2CHIPError(Exception):
# 
#     def __init__(self, message, filename=None, lineno=None):
#         self.message = message
#         if filename is not None:
#             self.filename = os.path.abspath(filename)
#         else:
#             self.filename = None
#         self.lineno = lineno
# 
#     def __str__(self):
#         return self.message + " in line %s at file %s" % (
#             self.lineno,
#             self.filename
#         )
# 
# Path: chips/compiler/python_model.py
# def to_32_signed(a):
# def to_64_signed(a):
# def generate_python_model(
#         debug,
#         input_file,
#         name,
#         instructions,
#         allocator,
#         inputs,
#         outputs,
#         profile=False
# ):
#     def __init__(
#             self,
#             debug,
#             instructions,
#             memory_content,
#             input_files,
#             output_files,
#             inputs, outputs,
#             profile=False
#     ):
#     def simulation_reset(self):
#     def get_line(self):
#     def get_file(self):
#     def get_profile(self):
#     def get_registers(self):
#     def get_memory(self):
#     def get_instruction(self):
#     def get_program_counter(self):
#     def set_breakpoint(self, f, l):
#     def clear_breakpoint(self, f, l):
#     def step_into(self):
#     def step_over(self):
#     def simulation_step(self):
# class PythonModel:


# Path: chips/api/api.py
import os
import itertools
import tempfile
import shutil
import inspect
import textwrap
import subprocess
import chips.compiler.compiler
from chips.compiler.exceptions import C2CHIPError
from chips.compiler.python_model import StopSim
from chips_c import bits_to_float, float_to_bits, bits_to_double, double_to_bits, join_words, high_word, low_word

        self.model, component_inputs, component_outputs, component_name = ret

        self.component_name = component_name
        if component_name not in chip.components:
            chip.components[component_name] = self

        # check that correct number of wires have been passed in
        if len(component_inputs) != len(self.inputs):
            for i in component_inputs:
                print "component inputs:"
            for i in self.inputs:
                print "instance inputs:"
            raise C2CHIPError(
                "Instance %s does not have the right number or inputs" % (
                    component_name))

        if len(component_outputs) != len(self.outputs):
            raise C2CHIPError(
                "Instance %s does not have the right number or outputs" % (
                    component_name))

        # check for multiple sources or sinks
        for i in inputs.values():
            if i.sink is not None:
                raise C2CHIPError(
                    "%s already has a sink" % i.name, i.filename, i.lineno)
            i.sink = self

        for i in outputs.values():
            if i.source is not None:

                raise C2CHIPError(