# Path: MC6809/components/cpu_utils/instruction_caller.py
# def opcode(*opcodes):
#     """A decorator for opcodes"""
#     def decorator(func):
#         setattr(func, "_is_opcode", True)
#         setattr(func, "_opcodes", opcodes)
#         return func
#     return decorator
# 
# Path: MC6809/components/MC6809data/MC6809_op_data.py
# REG_A = "A"
# 
# REG_B = "B"
# 
# REG_CC = "CC"
# 
# REG_DP = "DP"
# 
# REG_PC = "PC"
# 
# REG_U = "U"
# 
# REG_X = "X"
# 
# REG_Y = "Y"


from MC6809.components.cpu_utils.instruction_caller import opcode
from MC6809.components.MC6809data.MC6809_op_data import REG_A, REG_B, REG_CC, REG_DP, REG_PC, REG_U, REG_X, REG_Y

        source code forms: b7 b6 b5 b4 b3 b2 b1 b0 PC U Y X DP B A CC = pull
        order

        CC bits "HNZVC": ccccc
        """
        assert register in (self.system_stack_pointer, self.user_stack_pointer)

        def pull(register_str, stack_pointer):
            reg_obj = self.register_str2object[register_str]

            reg_width = reg_obj.WIDTH  # 8 / 16
            if reg_width == 8:
                data = self.pull_byte(stack_pointer)
            else:
                assert reg_width == 16
                data = self.pull_word(stack_pointer)

            reg_obj.set(data)

#        log.debug("$%x PUL%s:", self.program_counter, register.name)

        # m = postbyte
        if m & 0x01:
            pull(REG_CC, register)  # 8 bit condition code register
        if m & 0x02:
            pull(REG_A, register)  # 8 bit accumulator
        if m & 0x04:
            pull(REG_B, register)  # 8 bit accumulator
        if m & 0x08:

# Path: MC6809/components/cpu_utils/instruction_caller.py
# def opcode(*opcodes):
#     """A decorator for opcodes"""
#     def decorator(func):
#         setattr(func, "_is_opcode", True)
#         setattr(func, "_opcodes", opcodes)
#         return func
#     return decorator
# 
# Path: MC6809/components/MC6809data/MC6809_op_data.py
# REG_A = "A"
# 
# REG_B = "B"
# 
# REG_CC = "CC"
# 
# REG_DP = "DP"
# 
# REG_PC = "PC"
# 
# REG_U = "U"
# 
# REG_X = "X"
# 
# REG_Y = "Y"


# Path: MC6809/components/mc6809_stack.py
from MC6809.components.cpu_utils.instruction_caller import opcode
from MC6809.components.MC6809data.MC6809_op_data import REG_A, REG_B, REG_CC, REG_DP, REG_PC, REG_U, REG_X, REG_Y


        source code forms: b7 b6 b5 b4 b3 b2 b1 b0 PC U Y X DP B A CC = pull
        order

        CC bits "HNZVC": ccccc
        """
        assert register in (self.system_stack_pointer, self.user_stack_pointer)

        def pull(register_str, stack_pointer):
            reg_obj = self.register_str2object[register_str]

            reg_width = reg_obj.WIDTH  # 8 / 16
            if reg_width == 8:
                data = self.pull_byte(stack_pointer)
            else:
                assert reg_width == 16
                data = self.pull_word(stack_pointer)

            reg_obj.set(data)

#        log.debug("$%x PUL%s:", self.program_counter, register.name)

        # m = postbyte
        if m & 0x01:
            pull(REG_CC, register)  # 8 bit condition code register
        if m & 0x02:
            pull(REG_A, register)  # 8 bit accumulator
        if m & 0x04:
            pull(REG_B, register)  # 8 bit accumulator
        if m & 0x08:

            pull(REG_DP, register)  # 8 bit direct page register