# Path: MC6809/components/cpu_utils/instruction_caller.py
# def opcode(*opcodes):
#     """A decorator for opcodes"""
#     def decorator(func):
#         setattr(func, "_is_opcode", True)
#         setattr(func, "_opcodes", opcodes)
#         return func
#     return decorator
# 
# Path: MC6809/utils/bits.py
# def get_bit(value, bit):
#     """
#     return 1 or 0 from the bit at the given offset >bit<, e.g.:
# 
#     >>> get_bit(0x01, bit=0) # 00000001
#     1
#     >>> get_bit(0xfd, bit=1) # 11111101
#     0
#     >>> get_bit(int('10000000', 2), bit=7)
#     1
#     >>> get_bit(int('01111111', 2), bit=7)
#     0
#     >>> get_bit(int('1111000011110000', 2), bit=11)
#     0
#     >>> get_bit(int('1111000011110000', 2), bit=12)
#     1
#     """
#     return 0 if value & 2 ** bit == 0 else 1


from MC6809.components.cpu_utils.instruction_caller import opcode
from MC6809.utils.bits import get_bit
#            self.program_counter,
#            m, r, ea,
#            self.cfg.mem_info.get_shortest(ea)
#        ))
        return ea, r & 0xff

    @opcode(0x44, 0x54)  # LSRA / LSRB (inherent)
    def instruction_LSR_register(self, opcode, register):
        """ Logical shift right accumulator """
        a = register.value
        r = self.LSR(a)
#        log.debug("$%x LSR %s value $%x >> 1 = $%x" % (
#            self.program_counter,
#            register.name, a, r
#        ))
        register.set(r)

    def ASR(self, a):
        """
        ASR (Arithmetic Shift Right) alias LSR (Logical Shift Right)

        Shifts all bits of the register one place to the right. Bit seven is held
        constant. Bit zero is shifted into the C (carry) bit.

        source code forms: ASR Q; ASRA; ASRB

        CC bits "HNZVC": uaa-s
        """
        r = (a >> 1) | (a & 0x80)
        self.clear_NZC()

# Path: MC6809/components/cpu_utils/instruction_caller.py
# def opcode(*opcodes):
#     """A decorator for opcodes"""
#     def decorator(func):
#         setattr(func, "_is_opcode", True)
#         setattr(func, "_opcodes", opcodes)
#         return func
#     return decorator
# 
# Path: MC6809/utils/bits.py
# def get_bit(value, bit):
#     """
#     return 1 or 0 from the bit at the given offset >bit<, e.g.:
# 
#     >>> get_bit(0x01, bit=0) # 00000001
#     1
#     >>> get_bit(0xfd, bit=1) # 11111101
#     0
#     >>> get_bit(int('10000000', 2), bit=7)
#     1
#     >>> get_bit(int('01111111', 2), bit=7)
#     0
#     >>> get_bit(int('1111000011110000', 2), bit=11)
#     0
#     >>> get_bit(int('1111000011110000', 2), bit=12)
#     1
#     """
#     return 0 if value & 2 ** bit == 0 else 1


# Path: MC6809/components/mc6809_ops_logic.py
from MC6809.components.cpu_utils.instruction_caller import opcode
from MC6809.utils.bits import get_bit

#            self.program_counter,
#            m, r, ea,
#            self.cfg.mem_info.get_shortest(ea)
#        ))
        return ea, r & 0xff

    @opcode(0x44, 0x54)  # LSRA / LSRB (inherent)
    def instruction_LSR_register(self, opcode, register):
        """ Logical shift right accumulator """
        a = register.value
        r = self.LSR(a)
#        log.debug("$%x LSR %s value $%x >> 1 = $%x" % (
#            self.program_counter,
#            register.name, a, r
#        ))
        register.set(r)

    def ASR(self, a):
        """
        ASR (Arithmetic Shift Right) alias LSR (Logical Shift Right)

        Shifts all bits of the register one place to the right. Bit seven is held
        constant. Bit zero is shifted into the C (carry) bit.

        source code forms: ASR Q; ASRA; ASRB

        CC bits "HNZVC": uaa-s
        """
        r = (a >> 1) | (a & 0x80)
        self.clear_NZC()

        self.C = get_bit(a, bit=0)  # same as: self.C |= (a & 1)