# Path: MC6809/components/cpu_utils/instruction_caller.py
# def opcode(*opcodes):
#     """A decorator for opcodes"""
#     def decorator(func):
#         setattr(func, "_is_opcode", True)
#         setattr(func, "_opcodes", opcodes)
#         return func
#     return decorator


from MC6809.components.cpu_utils.instruction_caller import opcode

    @opcode(  # Software interrupt (absolute indirect)
        0x113f,  # SWI3 (inherent)
    )
    def instruction_SWI3(self, opcode, ea, m):
        """
        All of the processor registers are pushed onto the hardware stack (with
        the exception of the hardware stack pointer itself), and control is
        transferred through the software interrupt 3 vector. This interrupt does
        not mask (disable) the normal and fast interrupts.

        source code forms: SWI3

        CC bits "HNZVC": -----
        """
        raise NotImplementedError(f"${opcode:x} SWI3")

    @opcode(  # Synchronize with interrupt line
        0x13,  # SYNC (inherent)
    )
    def instruction_SYNC(self, opcode):
        """
        FAST SYNC WAIT FOR DATA Interrupt! LDA DISC DATA FROM DISC AND CLEAR
        INTERRUPT STA ,X+ PUT IN BUFFER DECB COUNT IT, DONE? BNE FAST GO AGAIN
        IF NOT.

        source code forms: SYNC

        CC bits "HNZVC": -----
        """

# Path: MC6809/components/cpu_utils/instruction_caller.py
# def opcode(*opcodes):
#     """A decorator for opcodes"""
#     def decorator(func):
#         setattr(func, "_is_opcode", True)
#         setattr(func, "_opcodes", opcodes)
#         return func
#     return decorator


# Path: MC6809/components/mc6809_interrupt.py
from MC6809.components.cpu_utils.instruction_caller import opcode


    @opcode(  # Software interrupt (absolute indirect)
        0x113f,  # SWI3 (inherent)
    )
    def instruction_SWI3(self, opcode, ea, m):
        """
        All of the processor registers are pushed onto the hardware stack (with
        the exception of the hardware stack pointer itself), and control is
        transferred through the software interrupt 3 vector. This interrupt does
        not mask (disable) the normal and fast interrupts.

        source code forms: SWI3

        CC bits "HNZVC": -----
        """
        raise NotImplementedError(f"${opcode:x} SWI3")

    @opcode(  # Synchronize with interrupt line
        0x13,  # SYNC (inherent)
    )
    def instruction_SYNC(self, opcode):
        """
        FAST SYNC WAIT FOR DATA Interrupt! LDA DISC DATA FROM DISC AND CLEAR
        INTERRUPT STA ,X+ PUT IN BUFFER DECB COUNT IT, DONE? BNE FAST GO AGAIN
        IF NOT.

        source code forms: SYNC

        CC bits "HNZVC": -----
        """

        raise NotImplementedError(f"${opcode:x} SYNC")